drivers/gpu/drm/nouveau/dispnv50/core907d.c

   1 /*
   2  * Copyright 2018 Red Hat Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  */
  22 #include "core.h"
  23 #include "head.h"
  24
  25 #include <nvif/push507c.h>
  26 #include <nvif/timer.h>
  27
  28 #include <nvhw/class/cl907d.h>
  29
  30 #include "nouveau_bo.h"
  31
  32 int
  33 core907d_caps_init(struct nouveau_drm *drm, struct nv50_disp *disp)
  34 {
  35         struct nv50_core *core = disp->core;
  36         struct nouveau_bo *bo = disp->sync;
  37         s64 time;
  38         int ret;
  39
  40         NVBO_WR32(bo, NV50_DISP_CORE_NTFY, NV907D_CORE_NOTIFIER_3, CAPABILITIES_4,
  41                                      NVDEF(NV907D_CORE_NOTIFIER_3, CAPABILITIES_4, DONE, FALSE));
  42
  43         ret = core507d_read_caps(disp);
  44         if (ret < 0)
  45                 return ret;
  46
  47         time = nvif_msec(core->chan.base.device, 2000ULL,
  48                          if (NVBO_TD32(bo, NV50_DISP_CORE_NTFY,
  49                                        NV907D_CORE_NOTIFIER_3, CAPABILITIES_4, DONE, ==, TRUE))
  50                                  break;
  51                          usleep_range(1, 2);
  52                          );
  53         if (time < 0)
  54                 NV_ERROR(drm, "core caps notifier timeout\n");
  55
  56         return 0;
  57 }
  58
  59 static const struct nv50_core_func
  60 core907d = {
  61         .init = core507d_init,
  62         .ntfy_init = core507d_ntfy_init,
  63         .caps_init = core907d_caps_init,
  64         .ntfy_wait_done = core507d_ntfy_wait_done,
  65         .update = core507d_update,
  66         .head = &head907d,
  67 #if IS_ENABLED(CONFIG_DEBUG_FS)
  68         .crc = &crc907d,
  69 #endif
  70         .dac = &dac907d,
  71         .sor = &sor907d,
  72 };
  73
  74 int
  75 core907d_new(struct nouveau_drm *drm, s32 oclass, struct nv50_core **pcore)
  76 {
  77         return core507d_new_(&core907d, drm, oclass, pcore);
  78 }