drivers/gpu/drm/rcar-du/rcar_du_crtc.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * rcar_du_crtc.h  --  R-Car Display Unit CRTCs
   4  *
   5  * Copyright (C) 2013-2015 Renesas Electronics Corporation
   6  *
   7  * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
   8  */
   9
  10 #ifndef __RCAR_DU_CRTC_H__
  11 #define __RCAR_DU_CRTC_H__
  12
  13 #include <linux/mutex.h>
  14 #include <linux/spinlock.h>
  15 #include <linux/wait.h>
  16
  17 #include <drm/drm_crtc.h>
  18 #include <drm/drm_writeback.h>
  19
  20 #include <media/vsp1.h>
  21
  22 struct rcar_du_group;
  23 struct rcar_du_vsp;
  24
  25 /**
  26  * struct rcar_du_crtc - the CRTC, representing a DU superposition processor
  27  * @crtc: base DRM CRTC
  28  * @dev: the DU device
  29  * @clock: the CRTC functional clock
  30  * @extclock: external pixel dot clock (optional)
  31  * @mmio_offset: offset of the CRTC registers in the DU MMIO block
  32  * @index: CRTC hardware index
  33  * @initialized: whether the CRTC has been initialized and clocks enabled
  34  * @dsysr: cached value of the DSYSR register
  35  * @vblank_enable: whether vblank events are enabled on this CRTC
  36  * @event: event to post when the pending page flip completes
  37  * @flip_wait: wait queue used to signal page flip completion
  38  * @vblank_lock: protects vblank_wait and vblank_count
  39  * @vblank_wait: wait queue used to signal vertical blanking
  40  * @vblank_count: number of vertical blanking interrupts to wait for
  41  * @group: CRTC group this CRTC belongs to
  42  * @cmm: CMM associated with this CRTC
  43  * @vsp: VSP feeding video to this CRTC
  44  * @vsp_pipe: index of the VSP pipeline feeding video to this CRTC
  45  * @writeback: the writeback connector
  46  */
  47 struct rcar_du_crtc {
  48         struct drm_crtc crtc;
  49
  50         struct rcar_du_device *dev;
  51         struct clk *clock;
  52         struct clk *extclock;
  53         unsigned int mmio_offset;
  54         unsigned int index;
  55         bool initialized;
  56
  57         u32 dsysr;
  58
  59         bool vblank_enable;
  60         struct drm_pending_vblank_event *event;
  61         wait_queue_head_t flip_wait;
  62
  63         spinlock_t vblank_lock;
  64         wait_queue_head_t vblank_wait;
  65         unsigned int vblank_count;
  66
  67         struct rcar_du_group *group;
  68         struct platform_device *cmm;
  69         struct rcar_du_vsp *vsp;
  70         unsigned int vsp_pipe;
  71
  72         const char *const *sources;
  73         unsigned int sources_count;
  74
  75         struct drm_writeback_connector writeback;
  76 };
  77
  78 #define to_rcar_crtc(c)         container_of(c, struct rcar_du_crtc, crtc)
  79 #define wb_to_rcar_crtc(c)      container_of(c, struct rcar_du_crtc, writeback)
  80
  81 /**
  82  * struct rcar_du_crtc_state - Driver-specific CRTC state
  83  * @state: base DRM CRTC state
  84  * @crc: CRC computation configuration
  85  * @outputs: bitmask of the outputs (enum rcar_du_output) driven by this CRTC
  86  */
  87 struct rcar_du_crtc_state {
  88         struct drm_crtc_state state;
  89
  90         struct vsp1_du_crc_config crc;
  91         unsigned int outputs;
  92 };
  93
  94 #define to_rcar_crtc_state(s) container_of(s, struct rcar_du_crtc_state, state)
  95
  96 enum rcar_du_output {
  97         RCAR_DU_OUTPUT_DPAD0,
  98         RCAR_DU_OUTPUT_DPAD1,
  99         RCAR_DU_OUTPUT_LVDS0,
 100         RCAR_DU_OUTPUT_LVDS1,
 101         RCAR_DU_OUTPUT_HDMI0,
 102         RCAR_DU_OUTPUT_HDMI1,
 103         RCAR_DU_OUTPUT_TCON,
 104         RCAR_DU_OUTPUT_MAX,
 105 };
 106
 107 int rcar_du_crtc_create(struct rcar_du_group *rgrp, unsigned int swindex,
 108                         unsigned int hwindex);
 109
 110 void rcar_du_crtc_finish_page_flip(struct rcar_du_crtc *rcrtc);
 111
 112 void rcar_du_crtc_dsysr_clr_set(struct rcar_du_crtc *rcrtc, u32 clr, u32 set);
 113
 114 #endif /* __RCAR_DU_CRTC_H__ */