drivers/gpu/drm/tegra/drm.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (C) 2012 Avionic Design GmbH
   4  * Copyright (C) 2012-2016 NVIDIA CORPORATION.  All rights reserved.
   5  */
   6
   7 #include <linux/bitops.h>
   8 #include <linux/host1x.h>
   9 #include <linux/idr.h>
  10 #include <linux/iommu.h>
  11 #include <linux/module.h>
  12 #include <linux/platform_device.h>
  13
  14 #include <drm/drm_atomic.h>
  15 #include <drm/drm_atomic_helper.h>
  16 #include <drm/drm_debugfs.h>
  17 #include <drm/drm_drv.h>
  18 #include <drm/drm_fourcc.h>
  19 #include <drm/drm_ioctl.h>
  20 #include <drm/drm_prime.h>
  21 #include <drm/drm_vblank.h>
  22
  23 #include "drm.h"
  24 #include "gem.h"
  25
  26 #define DRIVER_NAME "tegra"
  27 #define DRIVER_DESC "NVIDIA Tegra graphics"
  28 #define DRIVER_DATE "20120330"
  29 #define DRIVER_MAJOR 0
  30 #define DRIVER_MINOR 0
  31 #define DRIVER_PATCHLEVEL 0
  32
  33 #define CARVEOUT_SZ SZ_64M
  34 #define CDMA_GATHER_FETCHES_MAX_NB 16383
  35
  36 struct tegra_drm_file {
  37         struct idr contexts;
  38         struct mutex lock;
  39 };
  40
  41 static int tegra_atomic_check(struct drm_device *drm,
  42                               struct drm_atomic_state *state)
  43 {
  44         int err;
  45
  46         err = drm_atomic_helper_check(drm, state);
  47         if (err < 0)
  48                 return err;
  49
  50         return tegra_display_hub_atomic_check(drm, state);
  51 }
  52
  53 static const struct drm_mode_config_funcs tegra_drm_mode_config_funcs = {
  54         .fb_create = tegra_fb_create,
  55 #ifdef CONFIG_DRM_FBDEV_EMULATION
  56         .output_poll_changed = drm_fb_helper_output_poll_changed,
  57 #endif
  58         .atomic_check = tegra_atomic_check,
  59         .atomic_commit = drm_atomic_helper_commit,
  60 };
  61
  62 static void tegra_atomic_commit_tail(struct drm_atomic_state *old_state)
  63 {
  64         struct drm_device *drm = old_state->dev;
  65         struct tegra_drm *tegra = drm->dev_private;
  66
  67         if (tegra->hub) {
  68                 drm_atomic_helper_commit_modeset_disables(drm, old_state);
  69                 tegra_display_hub_atomic_commit(drm, old_state);
  70                 drm_atomic_helper_commit_planes(drm, old_state, 0);
  71                 drm_atomic_helper_commit_modeset_enables(drm, old_state);
  72                 drm_atomic_helper_commit_hw_done(old_state);
  73                 drm_atomic_helper_wait_for_vblanks(drm, old_state);
  74                 drm_atomic_helper_cleanup_planes(drm, old_state);
  75         } else {
  76                 drm_atomic_helper_commit_tail_rpm(old_state);
  77         }
  78 }
  79
  80 static const struct drm_mode_config_helper_funcs
  81 tegra_drm_mode_config_helpers = {
  82         .atomic_commit_tail = tegra_atomic_commit_tail,
  83 };
  84
  85 static int tegra_drm_open(struct drm_device *drm, struct drm_file *filp)
  86 {
  87         struct tegra_drm_file *fpriv;
  88
  89         fpriv = kzalloc(sizeof(*fpriv), GFP_KERNEL);
  90         if (!fpriv)
  91                 return -ENOMEM;
  92
  93         idr_init_base(&fpriv->contexts, 1);
  94         mutex_init(&fpriv->lock);
  95         filp->driver_priv = fpriv;
  96
  97         return 0;
  98 }
  99
 100 static void tegra_drm_context_free(struct tegra_drm_context *context)
 101 {
 102         context->client->ops->close_channel(context);
 103         kfree(context);
 104 }
 105
 106 static struct host1x_bo *
 107 host1x_bo_lookup(struct drm_file *file, u32 handle)
 108 {
 109         struct drm_gem_object *gem;
 110         struct tegra_bo *bo;
 111
 112         gem = drm_gem_object_lookup(file, handle);
 113         if (!gem)
 114                 return NULL;
 115
 116         bo = to_tegra_bo(gem);
 117         return &bo->base;
 118 }
 119
 120 static int host1x_reloc_copy_from_user(struct host1x_reloc *dest,
 121                                        struct drm_tegra_reloc __user *src,
 122                                        struct drm_device *drm,
 123                                        struct drm_file *file)
 124 {
 125         u32 cmdbuf, target;
 126         int err;
 127
 128         err = get_user(cmdbuf, &src->cmdbuf.handle);
 129         if (err < 0)
 130                 return err;
 131
 132         err = get_user(dest->cmdbuf.offset, &src->cmdbuf.offset);
 133         if (err < 0)
 134                 return err;
 135
 136         err = get_user(target, &src->target.handle);
 137         if (err < 0)
 138                 return err;
 139
 140         err = get_user(dest->target.offset, &src->target.offset);
 141         if (err < 0)
 142                 return err;
 143
 144         err = get_user(dest->shift, &src->shift);
 145         if (err < 0)
 146                 return err;
 147
 148         dest->flags = HOST1X_RELOC_READ | HOST1X_RELOC_WRITE;
 149
 150         dest->cmdbuf.bo = host1x_bo_lookup(file, cmdbuf);
 151         if (!dest->cmdbuf.bo)
 152                 return -ENOENT;
 153
 154         dest->target.bo = host1x_bo_lookup(file, target);
 155         if (!dest->target.bo)
 156                 return -ENOENT;
 157
 158         return 0;
 159 }
 160
 161 int tegra_drm_submit(struct tegra_drm_context *context,
 162                      struct drm_tegra_submit *args, struct drm_device *drm,
 163                      struct drm_file *file)
 164 {
 165         struct host1x_client *client = &context->client->base;
 166         unsigned int num_cmdbufs = args->num_cmdbufs;
 167         unsigned int num_relocs = args->num_relocs;
 168         struct drm_tegra_cmdbuf __user *user_cmdbufs;
 169         struct drm_tegra_reloc __user *user_relocs;
 170         struct drm_tegra_syncpt __user *user_syncpt;
 171         struct drm_tegra_syncpt syncpt;
 172         struct host1x *host1x = dev_get_drvdata(drm->dev->parent);
 173         struct drm_gem_object **refs;
 174         struct host1x_syncpt *sp;
 175         struct host1x_job *job;
 176         unsigned int num_refs;
 177         int err;
 178
 179         user_cmdbufs = u64_to_user_ptr(args->cmdbufs);
 180         user_relocs = u64_to_user_ptr(args->relocs);
 181         user_syncpt = u64_to_user_ptr(args->syncpts);
 182
 183         /* We don't yet support other than one syncpt_incr struct per submit */
 184         if (args->num_syncpts != 1)
 185                 return -EINVAL;
 186
 187         /* We don't yet support waitchks */
 188         if (args->num_waitchks != 0)
 189                 return -EINVAL;
 190
 191         job = host1x_job_alloc(context->channel, args->num_cmdbufs,
 192                                args->num_relocs);
 193         if (!job)
 194                 return -ENOMEM;
 195
 196         job->num_relocs = args->num_relocs;
 197         job->client = client;
 198         job->class = client->class;
 199         job->serialize = true;
 200
 201         /*
 202          * Track referenced BOs so that they can be unreferenced after the
 203          * submission is complete.
 204          */
 205         num_refs = num_cmdbufs + num_relocs * 2;
 206
 207         refs = kmalloc_array(num_refs, sizeof(*refs), GFP_KERNEL);
 208         if (!refs) {
 209                 err = -ENOMEM;
 210                 goto put;
 211         }
 212
 213         /* reuse as an iterator later */
 214         num_refs = 0;
 215
 216         while (num_cmdbufs) {
 217                 struct drm_tegra_cmdbuf cmdbuf;
 218                 struct host1x_bo *bo;
 219                 struct tegra_bo *obj;
 220                 u64 offset;
 221
 222                 if (copy_from_user(&cmdbuf, user_cmdbufs, sizeof(cmdbuf))) {
 223                         err = -EFAULT;
 224                         goto fail;
 225                 }
 226
 227                 /*
 228                  * The maximum number of CDMA gather fetches is 16383, a higher
 229                  * value means the words count is malformed.
 230                  */
 231                 if (cmdbuf.words > CDMA_GATHER_FETCHES_MAX_NB) {
 232                         err = -EINVAL;
 233                         goto fail;
 234                 }
 235
 236                 bo = host1x_bo_lookup(file, cmdbuf.handle);
 237                 if (!bo) {
 238                         err = -ENOENT;
 239                         goto fail;
 240                 }
 241
 242                 offset = (u64)cmdbuf.offset + (u64)cmdbuf.words * sizeof(u32);
 243                 obj = host1x_to_tegra_bo(bo);
 244                 refs[num_refs++] = &obj->gem;
 245
 246                 /*
 247                  * Gather buffer base address must be 4-bytes aligned,
 248                  * unaligned offset is malformed and cause commands stream
 249                  * corruption on the buffer address relocation.
 250                  */
 251                 if (offset & 3 || offset > obj->gem.size) {
 252                         err = -EINVAL;
 253                         goto fail;
 254                 }
 255
 256                 host1x_job_add_gather(job, bo, cmdbuf.words, cmdbuf.offset);
 257                 num_cmdbufs--;
 258                 user_cmdbufs++;
 259         }
 260
 261         /* copy and resolve relocations from submit */
 262         while (num_relocs--) {
 263                 struct host1x_reloc *reloc;
 264                 struct tegra_bo *obj;
 265
 266                 err = host1x_reloc_copy_from_user(&job->relocs[num_relocs],
 267                                                   &user_relocs[num_relocs], drm,
 268                                                   file);
 269                 if (err < 0)
 270                         goto fail;
 271
 272                 reloc = &job->relocs[num_relocs];
 273                 obj = host1x_to_tegra_bo(reloc->cmdbuf.bo);
 274                 refs[num_refs++] = &obj->gem;
 275
 276                 /*
 277                  * The unaligned cmdbuf offset will cause an unaligned write
 278                  * during of the relocations patching, corrupting the commands
 279                  * stream.
 280                  */
 281                 if (reloc->cmdbuf.offset & 3 ||
 282                     reloc->cmdbuf.offset >= obj->gem.size) {
 283                         err = -EINVAL;
 284                         goto fail;
 285                 }
 286
 287                 obj = host1x_to_tegra_bo(reloc->target.bo);
 288                 refs[num_refs++] = &obj->gem;
 289
 290                 if (reloc->target.offset >= obj->gem.size) {
 291                         err = -EINVAL;
 292                         goto fail;
 293                 }
 294         }
 295
 296         if (copy_from_user(&syncpt, user_syncpt, sizeof(syncpt))) {
 297                 err = -EFAULT;
 298                 goto fail;
 299         }
 300
 301         /* check whether syncpoint ID is valid */
 302         sp = host1x_syncpt_get(host1x, syncpt.id);
 303         if (!sp) {
 304                 err = -ENOENT;
 305                 goto fail;
 306         }
 307
 308         job->is_addr_reg = context->client->ops->is_addr_reg;
 309         job->is_valid_class = context->client->ops->is_valid_class;
 310         job->syncpt_incrs = syncpt.incrs;
 311         job->syncpt_id = syncpt.id;
 312         job->timeout = 10000;
 313
 314         if (args->timeout && args->timeout < 10000)
 315                 job->timeout = args->timeout;
 316
 317         err = host1x_job_pin(job, context->client->base.dev);
 318         if (err)
 319                 goto fail;
 320
 321         err = host1x_job_submit(job);
 322         if (err) {
 323                 host1x_job_unpin(job);
 324                 goto fail;
 325         }
 326
 327         args->fence = job->syncpt_end;
 328
 329 fail:
 330         while (num_refs--)
 331                 drm_gem_object_put(refs[num_refs]);
 332
 333         kfree(refs);
 334
 335 put:
 336         host1x_job_put(job);
 337         return err;
 338 }
 339
 340
 341 #ifdef CONFIG_DRM_TEGRA_STAGING
 342 static int tegra_gem_create(struct drm_device *drm, void *data,
 343                             struct drm_file *file)
 344 {
 345         struct drm_tegra_gem_create *args = data;
 346         struct tegra_bo *bo;
 347
 348         bo = tegra_bo_create_with_handle(file, drm, args->size, args->flags,
 349                                          &args->handle);
 350         if (IS_ERR(bo))
 351                 return PTR_ERR(bo);
 352
 353         return 0;
 354 }
 355
 356 static int tegra_gem_mmap(struct drm_device *drm, void *data,
 357                           struct drm_file *file)
 358 {
 359         struct drm_tegra_gem_mmap *args = data;
 360         struct drm_gem_object *gem;
 361         struct tegra_bo *bo;
 362
 363         gem = drm_gem_object_lookup(file, args->handle);
 364         if (!gem)
 365                 return -EINVAL;
 366
 367         bo = to_tegra_bo(gem);
 368
 369         args->offset = drm_vma_node_offset_addr(&bo->gem.vma_node);
 370
 371         drm_gem_object_put(gem);
 372
 373         return 0;
 374 }
 375
 376 static int tegra_syncpt_read(struct drm_device *drm, void *data,
 377                              struct drm_file *file)
 378 {
 379         struct host1x *host = dev_get_drvdata(drm->dev->parent);
 380         struct drm_tegra_syncpt_read *args = data;
 381         struct host1x_syncpt *sp;
 382
 383         sp = host1x_syncpt_get(host, args->id);
 384         if (!sp)
 385                 return -EINVAL;
 386
 387         args->value = host1x_syncpt_read_min(sp);
 388         return 0;
 389 }
 390
 391 static int tegra_syncpt_incr(struct drm_device *drm, void *data,
 392                              struct drm_file *file)
 393 {
 394         struct host1x *host1x = dev_get_drvdata(drm->dev->parent);
 395         struct drm_tegra_syncpt_incr *args = data;
 396         struct host1x_syncpt *sp;
 397
 398         sp = host1x_syncpt_get(host1x, args->id);
 399         if (!sp)
 400                 return -EINVAL;
 401
 402         return host1x_syncpt_incr(sp);
 403 }
 404
 405 static int tegra_syncpt_wait(struct drm_device *drm, void *data,
 406                              struct drm_file *file)
 407 {
 408         struct host1x *host1x = dev_get_drvdata(drm->dev->parent);
 409         struct drm_tegra_syncpt_wait *args = data;
 410         struct host1x_syncpt *sp;
 411
 412         sp = host1x_syncpt_get(host1x, args->id);
 413         if (!sp)
 414                 return -EINVAL;
 415
 416         return host1x_syncpt_wait(sp, args->thresh,
 417                                   msecs_to_jiffies(args->timeout),
 418                                   &args->value);
 419 }
 420
 421 static int tegra_client_open(struct tegra_drm_file *fpriv,
 422                              struct tegra_drm_client *client,
 423                              struct tegra_drm_context *context)
 424 {
 425         int err;
 426
 427         err = client->ops->open_channel(client, context);
 428         if (err < 0)
 429                 return err;
 430
 431         err = idr_alloc(&fpriv->contexts, context, 1, 0, GFP_KERNEL);
 432         if (err < 0) {
 433                 client->ops->close_channel(context);
 434                 return err;
 435         }
 436
 437         context->client = client;
 438         context->id = err;
 439
 440         return 0;
 441 }
 442
 443 static int tegra_open_channel(struct drm_device *drm, void *data,
 444                               struct drm_file *file)
 445 {
 446         struct tegra_drm_file *fpriv = file->driver_priv;
 447         struct tegra_drm *tegra = drm->dev_private;
 448         struct drm_tegra_open_channel *args = data;
 449         struct tegra_drm_context *context;
 450         struct tegra_drm_client *client;
 451         int err = -ENODEV;
 452
 453         context = kzalloc(sizeof(*context), GFP_KERNEL);
 454         if (!context)
 455                 return -ENOMEM;
 456
 457         mutex_lock(&fpriv->lock);
 458
 459         list_for_each_entry(client, &tegra->clients, list)
 460                 if (client->base.class == args->client) {
 461                         err = tegra_client_open(fpriv, client, context);
 462                         if (err < 0)
 463                                 break;
 464
 465                         args->context = context->id;
 466                         break;
 467                 }
 468
 469         if (err < 0)
 470                 kfree(context);
 471
 472         mutex_unlock(&fpriv->lock);
 473         return err;
 474 }
 475
 476 static int tegra_close_channel(struct drm_device *drm, void *data,
 477                                struct drm_file *file)
 478 {
 479         struct tegra_drm_file *fpriv = file->driver_priv;
 480         struct drm_tegra_close_channel *args = data;
 481         struct tegra_drm_context *context;
 482         int err = 0;
 483
 484         mutex_lock(&fpriv->lock);
 485
 486         context = idr_find(&fpriv->contexts, args->context);
 487         if (!context) {
 488                 err = -EINVAL;
 489                 goto unlock;
 490         }
 491
 492         idr_remove(&fpriv->contexts, context->id);
 493         tegra_drm_context_free(context);
 494
 495 unlock:
 496         mutex_unlock(&fpriv->lock);
 497         return err;
 498 }
 499
 500 static int tegra_get_syncpt(struct drm_device *drm, void *data,
 501                             struct drm_file *file)
 502 {
 503         struct tegra_drm_file *fpriv = file->driver_priv;
 504         struct drm_tegra_get_syncpt *args = data;
 505         struct tegra_drm_context *context;
 506         struct host1x_syncpt *syncpt;
 507         int err = 0;
 508
 509         mutex_lock(&fpriv->lock);
 510
 511         context = idr_find(&fpriv->contexts, args->context);
 512         if (!context) {
 513                 err = -ENODEV;
 514                 goto unlock;
 515         }
 516
 517         if (args->index >= context->client->base.num_syncpts) {
 518                 err = -EINVAL;
 519                 goto unlock;
 520         }
 521
 522         syncpt = context->client->base.syncpts[args->index];
 523         args->id = host1x_syncpt_id(syncpt);
 524
 525 unlock:
 526         mutex_unlock(&fpriv->lock);
 527         return err;
 528 }
 529
 530 static int tegra_submit(struct drm_device *drm, void *data,
 531                         struct drm_file *file)
 532 {
 533         struct tegra_drm_file *fpriv = file->driver_priv;
 534         struct drm_tegra_submit *args = data;
 535         struct tegra_drm_context *context;
 536         int err;
 537
 538         mutex_lock(&fpriv->lock);
 539
 540         context = idr_find(&fpriv->contexts, args->context);
 541         if (!context) {
 542                 err = -ENODEV;
 543                 goto unlock;
 544         }
 545
 546         err = context->client->ops->submit(context, args, drm, file);
 547
 548 unlock:
 549         mutex_unlock(&fpriv->lock);
 550         return err;
 551 }
 552
 553 static int tegra_get_syncpt_base(struct drm_device *drm, void *data,
 554                                  struct drm_file *file)
 555 {
 556         struct tegra_drm_file *fpriv = file->driver_priv;
 557         struct drm_tegra_get_syncpt_base *args = data;
 558         struct tegra_drm_context *context;
 559         struct host1x_syncpt_base *base;
 560         struct host1x_syncpt *syncpt;
 561         int err = 0;
 562
 563         mutex_lock(&fpriv->lock);
 564
 565         context = idr_find(&fpriv->contexts, args->context);
 566         if (!context) {
 567                 err = -ENODEV;
 568                 goto unlock;
 569         }
 570
 571         if (args->syncpt >= context->client->base.num_syncpts) {
 572                 err = -EINVAL;
 573                 goto unlock;
 574         }
 575
 576         syncpt = context->client->base.syncpts[args->syncpt];
 577
 578         base = host1x_syncpt_get_base(syncpt);
 579         if (!base) {
 580                 err = -ENXIO;
 581                 goto unlock;
 582         }
 583
 584         args->id = host1x_syncpt_base_id(base);
 585
 586 unlock:
 587         mutex_unlock(&fpriv->lock);
 588         return err;
 589 }
 590
 591 static int tegra_gem_set_tiling(struct drm_device *drm, void *data,
 592                                 struct drm_file *file)
 593 {
 594         struct drm_tegra_gem_set_tiling *args = data;
 595         enum tegra_bo_tiling_mode mode;
 596         struct drm_gem_object *gem;
 597         unsigned long value = 0;
 598         struct tegra_bo *bo;
 599
 600         switch (args->mode) {
 601         case DRM_TEGRA_GEM_TILING_MODE_PITCH:
 602                 mode = TEGRA_BO_TILING_MODE_PITCH;
 603
 604                 if (args->value != 0)
 605                         return -EINVAL;
 606
 607                 break;
 608
 609         case DRM_TEGRA_GEM_TILING_MODE_TILED:
 610                 mode = TEGRA_BO_TILING_MODE_TILED;
 611
 612                 if (args->value != 0)
 613                         return -EINVAL;
 614
 615                 break;
 616
 617         case DRM_TEGRA_GEM_TILING_MODE_BLOCK:
 618                 mode = TEGRA_BO_TILING_MODE_BLOCK;
 619
 620                 if (args->value > 5)
 621                         return -EINVAL;
 622
 623                 value = args->value;
 624                 break;
 625
 626         default:
 627                 return -EINVAL;
 628         }
 629
 630         gem = drm_gem_object_lookup(file, args->handle);
 631         if (!gem)
 632                 return -ENOENT;
 633
 634         bo = to_tegra_bo(gem);
 635
 636         bo->tiling.mode = mode;
 637         bo->tiling.value = value;
 638
 639         drm_gem_object_put(gem);
 640
 641         return 0;
 642 }
 643
 644 static int tegra_gem_get_tiling(struct drm_device *drm, void *data,
 645                                 struct drm_file *file)
 646 {
 647         struct drm_tegra_gem_get_tiling *args = data;
 648         struct drm_gem_object *gem;
 649         struct tegra_bo *bo;
 650         int err = 0;
 651
 652         gem = drm_gem_object_lookup(file, args->handle);
 653         if (!gem)
 654                 return -ENOENT;
 655
 656         bo = to_tegra_bo(gem);
 657
 658         switch (bo->tiling.mode) {
 659         case TEGRA_BO_TILING_MODE_PITCH:
 660                 args->mode = DRM_TEGRA_GEM_TILING_MODE_PITCH;
 661                 args->value = 0;
 662                 break;
 663
 664         case TEGRA_BO_TILING_MODE_TILED:
 665                 args->mode = DRM_TEGRA_GEM_TILING_MODE_TILED;
 666                 args->value = 0;
 667                 break;
 668
 669         case TEGRA_BO_TILING_MODE_BLOCK:
 670                 args->mode = DRM_TEGRA_GEM_TILING_MODE_BLOCK;
 671                 args->value = bo->tiling.value;
 672                 break;
 673
 674         default:
 675                 err = -EINVAL;
 676                 break;
 677         }
 678
 679         drm_gem_object_put(gem);
 680
 681         return err;
 682 }
 683
 684 static int tegra_gem_set_flags(struct drm_device *drm, void *data,
 685                                struct drm_file *file)
 686 {
 687         struct drm_tegra_gem_set_flags *args = data;
 688         struct drm_gem_object *gem;
 689         struct tegra_bo *bo;
 690
 691         if (args->flags & ~DRM_TEGRA_GEM_FLAGS)
 692                 return -EINVAL;
 693
 694         gem = drm_gem_object_lookup(file, args->handle);
 695         if (!gem)
 696                 return -ENOENT;
 697
 698         bo = to_tegra_bo(gem);
 699         bo->flags = 0;
 700
 701         if (args->flags & DRM_TEGRA_GEM_BOTTOM_UP)
 702                 bo->flags |= TEGRA_BO_BOTTOM_UP;
 703
 704         drm_gem_object_put(gem);
 705
 706         return 0;
 707 }
 708
 709 static int tegra_gem_get_flags(struct drm_device *drm, void *data,
 710                                struct drm_file *file)
 711 {
 712         struct drm_tegra_gem_get_flags *args = data;
 713         struct drm_gem_object *gem;
 714         struct tegra_bo *bo;
 715
 716         gem = drm_gem_object_lookup(file, args->handle);
 717         if (!gem)
 718                 return -ENOENT;
 719
 720         bo = to_tegra_bo(gem);
 721         args->flags = 0;
 722
 723         if (bo->flags & TEGRA_BO_BOTTOM_UP)
 724                 args->flags |= DRM_TEGRA_GEM_BOTTOM_UP;
 725
 726         drm_gem_object_put(gem);
 727
 728         return 0;
 729 }
 730 #endif
 731
 732 static const struct drm_ioctl_desc tegra_drm_ioctls[] = {
 733 #ifdef CONFIG_DRM_TEGRA_STAGING
 734         DRM_IOCTL_DEF_DRV(TEGRA_GEM_CREATE, tegra_gem_create,
 735                           DRM_RENDER_ALLOW),
 736         DRM_IOCTL_DEF_DRV(TEGRA_GEM_MMAP, tegra_gem_mmap,
 737                           DRM_RENDER_ALLOW),
 738         DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_READ, tegra_syncpt_read,
 739                           DRM_RENDER_ALLOW),
 740         DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_INCR, tegra_syncpt_incr,
 741                           DRM_RENDER_ALLOW),
 742         DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_WAIT, tegra_syncpt_wait,
 743                           DRM_RENDER_ALLOW),
 744         DRM_IOCTL_DEF_DRV(TEGRA_OPEN_CHANNEL, tegra_open_channel,
 745                           DRM_RENDER_ALLOW),
 746         DRM_IOCTL_DEF_DRV(TEGRA_CLOSE_CHANNEL, tegra_close_channel,
 747                           DRM_RENDER_ALLOW),
 748         DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT, tegra_get_syncpt,
 749                           DRM_RENDER_ALLOW),
 750         DRM_IOCTL_DEF_DRV(TEGRA_SUBMIT, tegra_submit,
 751                           DRM_RENDER_ALLOW),
 752         DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT_BASE, tegra_get_syncpt_base,
 753                           DRM_RENDER_ALLOW),
 754         DRM_IOCTL_DEF_DRV(TEGRA_GEM_SET_TILING, tegra_gem_set_tiling,
 755                           DRM_RENDER_ALLOW),
 756         DRM_IOCTL_DEF_DRV(TEGRA_GEM_GET_TILING, tegra_gem_get_tiling,
 757                           DRM_RENDER_ALLOW),
 758         DRM_IOCTL_DEF_DRV(TEGRA_GEM_SET_FLAGS, tegra_gem_set_flags,
 759                           DRM_RENDER_ALLOW),
 760         DRM_IOCTL_DEF_DRV(TEGRA_GEM_GET_FLAGS, tegra_gem_get_flags,
 761                           DRM_RENDER_ALLOW),
 762 #endif
 763 };
 764
 765 static const struct file_operations tegra_drm_fops = {
 766         .owner = THIS_MODULE,
 767         .open = drm_open,
 768         .release = drm_release,
 769         .unlocked_ioctl = drm_ioctl,
 770         .mmap = tegra_drm_mmap,
 771         .poll = drm_poll,
 772         .read = drm_read,
 773         .compat_ioctl = drm_compat_ioctl,
 774         .llseek = noop_llseek,
 775 };
 776
 777 static int tegra_drm_context_cleanup(int id, void *p, void *data)
 778 {
 779         struct tegra_drm_context *context = p;
 780
 781         tegra_drm_context_free(context);
 782
 783         return 0;
 784 }
 785
 786 static void tegra_drm_postclose(struct drm_device *drm, struct drm_file *file)
 787 {
 788         struct tegra_drm_file *fpriv = file->driver_priv;
 789
 790         mutex_lock(&fpriv->lock);
 791         idr_for_each(&fpriv->contexts, tegra_drm_context_cleanup, NULL);
 792         mutex_unlock(&fpriv->lock);
 793
 794         idr_destroy(&fpriv->contexts);
 795         mutex_destroy(&fpriv->lock);
 796         kfree(fpriv);
 797 }
 798
 799 #ifdef CONFIG_DEBUG_FS
 800 static int tegra_debugfs_framebuffers(struct seq_file *s, void *data)
 801 {
 802         struct drm_info_node *node = (struct drm_info_node *)s->private;
 803         struct drm_device *drm = node->minor->dev;
 804         struct drm_framebuffer *fb;
 805
 806         mutex_lock(&drm->mode_config.fb_lock);
 807
 808         list_for_each_entry(fb, &drm->mode_config.fb_list, head) {
 809                 seq_printf(s, "%3d: user size: %d x %d, depth %d, %d bpp, refcount %d\n",
 810                            fb->base.id, fb->width, fb->height,
 811                            fb->format->depth,
 812                            fb->format->cpp[0] * 8,
 813                            drm_framebuffer_read_refcount(fb));
 814         }
 815
 816         mutex_unlock(&drm->mode_config.fb_lock);
 817
 818         return 0;
 819 }
 820
 821 static int tegra_debugfs_iova(struct seq_file *s, void *data)
 822 {
 823         struct drm_info_node *node = (struct drm_info_node *)s->private;
 824         struct drm_device *drm = node->minor->dev;
 825         struct tegra_drm *tegra = drm->dev_private;
 826         struct drm_printer p = drm_seq_file_printer(s);
 827
 828         if (tegra->domain) {
 829                 mutex_lock(&tegra->mm_lock);
 830                 drm_mm_print(&tegra->mm, &p);
 831                 mutex_unlock(&tegra->mm_lock);
 832         }
 833
 834         return 0;
 835 }
 836
 837 static struct drm_info_list tegra_debugfs_list[] = {
 838         { "framebuffers", tegra_debugfs_framebuffers, 0 },
 839         { "iova", tegra_debugfs_iova, 0 },
 840 };
 841
 842 static void tegra_debugfs_init(struct drm_minor *minor)
 843 {
 844         drm_debugfs_create_files(tegra_debugfs_list,
 845                                  ARRAY_SIZE(tegra_debugfs_list),
 846                                  minor->debugfs_root, minor);
 847 }
 848 #endif
 849
 850 static const struct drm_driver tegra_drm_driver = {
 851         .driver_features = DRIVER_MODESET | DRIVER_GEM |
 852                            DRIVER_ATOMIC | DRIVER_RENDER,
 853         .open = tegra_drm_open,
 854         .postclose = tegra_drm_postclose,
 855         .lastclose = drm_fb_helper_lastclose,
 856
 857 #if defined(CONFIG_DEBUG_FS)
 858         .debugfs_init = tegra_debugfs_init,
 859 #endif
 860
 861         .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
 862         .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
 863         .gem_prime_import = tegra_gem_prime_import,
 864
 865         .dumb_create = tegra_bo_dumb_create,
 866
 867         .ioctls = tegra_drm_ioctls,
 868         .num_ioctls = ARRAY_SIZE(tegra_drm_ioctls),
 869         .fops = &tegra_drm_fops,
 870
 871         .name = DRIVER_NAME,
 872         .desc = DRIVER_DESC,
 873         .date = DRIVER_DATE,
 874         .major = DRIVER_MAJOR,
 875         .minor = DRIVER_MINOR,
 876         .patchlevel = DRIVER_PATCHLEVEL,
 877 };
 878
 879 int tegra_drm_register_client(struct tegra_drm *tegra,
 880                               struct tegra_drm_client *client)
 881 {
 882         mutex_lock(&tegra->clients_lock);
 883         list_add_tail(&client->list, &tegra->clients);
 884         client->drm = tegra;
 885         mutex_unlock(&tegra->clients_lock);
 886
 887         return 0;
 888 }
 889
 890 int tegra_drm_unregister_client(struct tegra_drm *tegra,
 891                                 struct tegra_drm_client *client)
 892 {
 893         mutex_lock(&tegra->clients_lock);
 894         list_del_init(&client->list);
 895         client->drm = NULL;
 896         mutex_unlock(&tegra->clients_lock);
 897
 898         return 0;
 899 }
 900
 901 int host1x_client_iommu_attach(struct host1x_client *client)
 902 {
 903         struct iommu_domain *domain = iommu_get_domain_for_dev(client->dev);
 904         struct drm_device *drm = dev_get_drvdata(client->host);
 905         struct tegra_drm *tegra = drm->dev_private;
 906         struct iommu_group *group = NULL;
 907         int err;
 908
 909         /*
 910          * If the host1x client is already attached to an IOMMU domain that is
 911          * not the shared IOMMU domain, don't try to attach it to a different
 912          * domain. This allows using the IOMMU-backed DMA API.
 913          */
 914         if (domain && domain != tegra->domain)
 915                 return 0;
 916
 917         if (tegra->domain) {
 918                 group = iommu_group_get(client->dev);
 919                 if (!group)
 920                         return -ENODEV;
 921
 922                 if (domain != tegra->domain) {
 923                         err = iommu_attach_group(tegra->domain, group);
 924                         if (err < 0) {
 925                                 iommu_group_put(group);
 926                                 return err;
 927                         }
 928                 }
 929
 930                 tegra->use_explicit_iommu = true;
 931         }
 932
 933         client->group = group;
 934
 935         return 0;
 936 }
 937
 938 void host1x_client_iommu_detach(struct host1x_client *client)
 939 {
 940         struct drm_device *drm = dev_get_drvdata(client->host);
 941         struct tegra_drm *tegra = drm->dev_private;
 942         struct iommu_domain *domain;
 943
 944         if (client->group) {
 945                 /*
 946                  * Devices that are part of the same group may no longer be
 947                  * attached to a domain at this point because their group may
 948                  * have been detached by an earlier client.
 949                  */
 950                 domain = iommu_get_domain_for_dev(client->dev);
 951                 if (domain)
 952                         iommu_detach_group(tegra->domain, client->group);
 953
 954                 iommu_group_put(client->group);
 955                 client->group = NULL;
 956         }
 957 }
 958
 959 void *tegra_drm_alloc(struct tegra_drm *tegra, size_t size, dma_addr_t *dma)
 960 {
 961         struct iova *alloc;
 962         void *virt;
 963         gfp_t gfp;
 964         int err;
 965
 966         if (tegra->domain)
 967                 size = iova_align(&tegra->carveout.domain, size);
 968         else
 969                 size = PAGE_ALIGN(size);
 970
 971         gfp = GFP_KERNEL | __GFP_ZERO;
 972         if (!tegra->domain) {
 973                 /*
 974                  * Many units only support 32-bit addresses, even on 64-bit
 975                  * SoCs. If there is no IOMMU to translate into a 32-bit IO
 976                  * virtual address space, force allocations to be in the
 977                  * lower 32-bit range.
 978                  */
 979                 gfp |= GFP_DMA;
 980         }
 981
 982         virt = (void *)__get_free_pages(gfp, get_order(size));
 983         if (!virt)
 984                 return ERR_PTR(-ENOMEM);
 985
 986         if (!tegra->domain) {
 987                 /*
 988                  * If IOMMU is disabled, devices address physical memory
 989                  * directly.
 990                  */
 991                 *dma = virt_to_phys(virt);
 992                 return virt;
 993         }
 994
 995         alloc = alloc_iova(&tegra->carveout.domain,
 996                            size >> tegra->carveout.shift,
 997                            tegra->carveout.limit, true);
 998         if (!alloc) {
 999                 err = -EBUSY;
1000                 goto free_pages;
1001         }
1002
1003         *dma = iova_dma_addr(&tegra->carveout.domain, alloc);
1004         err = iommu_map(tegra->domain, *dma, virt_to_phys(virt),
1005                         size, IOMMU_READ | IOMMU_WRITE);
1006         if (err < 0)
1007                 goto free_iova;
1008
1009         return virt;
1010
1011 free_iova:
1012         __free_iova(&tegra->carveout.domain, alloc);
1013 free_pages:
1014         free_pages((unsigned long)virt, get_order(size));
1015
1016         return ERR_PTR(err);
1017 }
1018
1019 void tegra_drm_free(struct tegra_drm *tegra, size_t size, void *virt,
1020                     dma_addr_t dma)
1021 {
1022         if (tegra->domain)
1023                 size = iova_align(&tegra->carveout.domain, size);
1024         else
1025                 size = PAGE_ALIGN(size);
1026
1027         if (tegra->domain) {
1028                 iommu_unmap(tegra->domain, dma, size);
1029                 free_iova(&tegra->carveout.domain,
1030                           iova_pfn(&tegra->carveout.domain, dma));
1031         }
1032
1033         free_pages((unsigned long)virt, get_order(size));
1034 }
1035
1036 static bool host1x_drm_wants_iommu(struct host1x_device *dev)
1037 {
1038         struct host1x *host1x = dev_get_drvdata(dev->dev.parent);
1039         struct iommu_domain *domain;
1040
1041         /*
1042          * If the Tegra DRM clients are backed by an IOMMU, push buffers are
1043          * likely to be allocated beyond the 32-bit boundary if sufficient
1044          * system memory is available. This is problematic on earlier Tegra
1045          * generations where host1x supports a maximum of 32 address bits in
1046          * the GATHER opcode. In this case, unless host1x is behind an IOMMU
1047          * as well it won't be able to process buffers allocated beyond the
1048          * 32-bit boundary.
1049          *
1050          * The DMA API will use bounce buffers in this case, so that could
1051          * perhaps still be made to work, even if less efficient, but there
1052          * is another catch: in order to perform cache maintenance on pages
1053          * allocated for discontiguous buffers we need to map and unmap the
1054          * SG table representing these buffers. This is fine for something
1055          * small like a push buffer, but it exhausts the bounce buffer pool
1056          * (typically on the order of a few MiB) for framebuffers (many MiB
1057          * for any modern resolution).
1058          *
1059          * Work around this by making sure that Tegra DRM clients only use
1060          * an IOMMU if the parent host1x also uses an IOMMU.
1061          *
1062          * Note that there's still a small gap here that we don't cover: if
1063          * the DMA API is backed by an IOMMU there's no way to control which
1064          * device is attached to an IOMMU and which isn't, except via wiring
1065          * up the device tree appropriately. This is considered an problem
1066          * of integration, so care must be taken for the DT to be consistent.
1067          */
1068         domain = iommu_get_domain_for_dev(dev->dev.parent);
1069
1070         /*
1071          * Tegra20 and Tegra30 don't support addressing memory beyond the
1072          * 32-bit boundary, so the regular GATHER opcodes will always be
1073          * sufficient and whether or not the host1x is attached to an IOMMU
1074          * doesn't matter.
1075          */
1076         if (!domain && host1x_get_dma_mask(host1x) <= DMA_BIT_MASK(32))
1077                 return true;
1078
1079         return domain != NULL;
1080 }
1081
1082 static int host1x_drm_probe(struct host1x_device *dev)
1083 {
1084         struct tegra_drm *tegra;
1085         struct drm_device *drm;
1086         int err;
1087
1088         drm = drm_dev_alloc(&tegra_drm_driver, &dev->dev);
1089         if (IS_ERR(drm))
1090                 return PTR_ERR(drm);
1091
1092         tegra = kzalloc(sizeof(*tegra), GFP_KERNEL);
1093         if (!tegra) {
1094                 err = -ENOMEM;
1095                 goto put;
1096         }
1097
1098         if (host1x_drm_wants_iommu(dev) && iommu_present(&platform_bus_type)) {
1099                 tegra->domain = iommu_domain_alloc(&platform_bus_type);
1100                 if (!tegra->domain) {
1101                         err = -ENOMEM;
1102                         goto free;
1103                 }
1104
1105                 err = iova_cache_get();
1106                 if (err < 0)
1107                         goto domain;
1108         }
1109
1110         mutex_init(&tegra->clients_lock);
1111         INIT_LIST_HEAD(&tegra->clients);
1112
1113         dev_set_drvdata(&dev->dev, drm);
1114         drm->dev_private = tegra;
1115         tegra->drm = drm;
1116
1117         drm_mode_config_init(drm);
1118
1119         drm->mode_config.min_width = 0;
1120         drm->mode_config.min_height = 0;
1121
1122         drm->mode_config.max_width = 4096;
1123         drm->mode_config.max_height = 4096;
1124
1125         drm->mode_config.allow_fb_modifiers = true;
1126
1127         drm->mode_config.normalize_zpos = true;
1128
1129         drm->mode_config.funcs = &tegra_drm_mode_config_funcs;
1130         drm->mode_config.helper_private = &tegra_drm_mode_config_helpers;
1131
1132         err = tegra_drm_fb_prepare(drm);
1133         if (err < 0)
1134                 goto config;
1135
1136         drm_kms_helper_poll_init(drm);
1137
1138         err = host1x_device_init(dev);
1139         if (err < 0)
1140                 goto fbdev;
1141
1142         if (tegra->use_explicit_iommu) {
1143                 u64 carveout_start, carveout_end, gem_start, gem_end;
1144                 u64 dma_mask = dma_get_mask(&dev->dev);
1145                 dma_addr_t start, end;
1146                 unsigned long order;
1147
1148                 start = tegra->domain->geometry.aperture_start & dma_mask;
1149                 end = tegra->domain->geometry.aperture_end & dma_mask;
1150
1151                 gem_start = start;
1152                 gem_end = end - CARVEOUT_SZ;
1153                 carveout_start = gem_end + 1;
1154                 carveout_end = end;
1155
1156                 order = __ffs(tegra->domain->pgsize_bitmap);
1157                 init_iova_domain(&tegra->carveout.domain, 1UL << order,
1158                                  carveout_start >> order);
1159
1160                 tegra->carveout.shift = iova_shift(&tegra->carveout.domain);
1161                 tegra->carveout.limit = carveout_end >> tegra->carveout.shift;
1162
1163                 drm_mm_init(&tegra->mm, gem_start, gem_end - gem_start + 1);
1164                 mutex_init(&tegra->mm_lock);
1165
1166                 DRM_DEBUG_DRIVER("IOMMU apertures:\n");
1167                 DRM_DEBUG_DRIVER("  GEM: %#llx-%#llx\n", gem_start, gem_end);
1168                 DRM_DEBUG_DRIVER("  Carveout: %#llx-%#llx\n", carveout_start,
1169                                  carveout_end);
1170         } else if (tegra->domain) {
1171                 iommu_domain_free(tegra->domain);
1172                 tegra->domain = NULL;
1173                 iova_cache_put();
1174         }
1175
1176         if (tegra->hub) {
1177                 err = tegra_display_hub_prepare(tegra->hub);
1178                 if (err < 0)
1179                         goto device;
1180         }
1181
1182         /*
1183          * We don't use the drm_irq_install() helpers provided by the DRM
1184          * core, so we need to set this manually in order to allow the
1185          * DRM_IOCTL_WAIT_VBLANK to operate correctly.
1186          */
1187         drm->irq_enabled = true;
1188
1189         /* syncpoints are used for full 32-bit hardware VBLANK counters */
1190         drm->max_vblank_count = 0xffffffff;
1191
1192         err = drm_vblank_init(drm, drm->mode_config.num_crtc);
1193         if (err < 0)
1194                 goto hub;
1195
1196         drm_mode_config_reset(drm);
1197
1198         err = drm_fb_helper_remove_conflicting_framebuffers(NULL, "tegradrmfb",
1199                                                             false);
1200         if (err < 0)
1201                 goto hub;
1202
1203         err = tegra_drm_fb_init(drm);
1204         if (err < 0)
1205                 goto hub;
1206
1207         err = drm_dev_register(drm, 0);
1208         if (err < 0)
1209                 goto fb;
1210
1211         return 0;
1212
1213 fb:
1214         tegra_drm_fb_exit(drm);
1215 hub:
1216         if (tegra->hub)
1217                 tegra_display_hub_cleanup(tegra->hub);
1218 device:
1219         if (tegra->domain) {
1220                 mutex_destroy(&tegra->mm_lock);
1221                 drm_mm_takedown(&tegra->mm);
1222                 put_iova_domain(&tegra->carveout.domain);
1223                 iova_cache_put();
1224         }
1225
1226         host1x_device_exit(dev);
1227 fbdev:
1228         drm_kms_helper_poll_fini(drm);
1229         tegra_drm_fb_free(drm);
1230 config:
1231         drm_mode_config_cleanup(drm);
1232 domain:
1233         if (tegra->domain)
1234                 iommu_domain_free(tegra->domain);
1235 free:
1236         kfree(tegra);
1237 put:
1238         drm_dev_put(drm);
1239         return err;
1240 }
1241
1242 static int host1x_drm_remove(struct host1x_device *dev)
1243 {
1244         struct drm_device *drm = dev_get_drvdata(&dev->dev);
1245         struct tegra_drm *tegra = drm->dev_private;
1246         int err;
1247
1248         drm_dev_unregister(drm);
1249
1250         drm_kms_helper_poll_fini(drm);
1251         tegra_drm_fb_exit(drm);
1252         drm_atomic_helper_shutdown(drm);
1253         drm_mode_config_cleanup(drm);
1254
1255         if (tegra->hub)
1256                 tegra_display_hub_cleanup(tegra->hub);
1257
1258         err = host1x_device_exit(dev);
1259         if (err < 0)
1260                 dev_err(&dev->dev, "host1x device cleanup failed: %d\n", err);
1261
1262         if (tegra->domain) {
1263                 mutex_destroy(&tegra->mm_lock);
1264                 drm_mm_takedown(&tegra->mm);
1265                 put_iova_domain(&tegra->carveout.domain);
1266                 iova_cache_put();
1267                 iommu_domain_free(tegra->domain);
1268         }
1269
1270         kfree(tegra);
1271         drm_dev_put(drm);
1272
1273         return 0;
1274 }
1275
1276 #ifdef CONFIG_PM_SLEEP
1277 static int host1x_drm_suspend(struct device *dev)
1278 {
1279         struct drm_device *drm = dev_get_drvdata(dev);
1280
1281         return drm_mode_config_helper_suspend(drm);
1282 }
1283
1284 static int host1x_drm_resume(struct device *dev)
1285 {
1286         struct drm_device *drm = dev_get_drvdata(dev);
1287
1288         return drm_mode_config_helper_resume(drm);
1289 }
1290 #endif
1291
1292 static SIMPLE_DEV_PM_OPS(host1x_drm_pm_ops, host1x_drm_suspend,
1293                          host1x_drm_resume);
1294
1295 static const struct of_device_id host1x_drm_subdevs[] = {
1296         { .compatible = "nvidia,tegra20-dc", },
1297         { .compatible = "nvidia,tegra20-hdmi", },
1298         { .compatible = "nvidia,tegra20-gr2d", },
1299         { .compatible = "nvidia,tegra20-gr3d", },
1300         { .compatible = "nvidia,tegra30-dc", },
1301         { .compatible = "nvidia,tegra30-hdmi", },
1302         { .compatible = "nvidia,tegra30-gr2d", },
1303         { .compatible = "nvidia,tegra30-gr3d", },
1304         { .compatible = "nvidia,tegra114-dsi", },
1305         { .compatible = "nvidia,tegra114-hdmi", },
1306         { .compatible = "nvidia,tegra114-gr3d", },
1307         { .compatible = "nvidia,tegra124-dc", },
1308         { .compatible = "nvidia,tegra124-sor", },
1309         { .compatible = "nvidia,tegra124-hdmi", },
1310         { .compatible = "nvidia,tegra124-dsi", },
1311         { .compatible = "nvidia,tegra124-vic", },
1312         { .compatible = "nvidia,tegra132-dsi", },
1313         { .compatible = "nvidia,tegra210-dc", },
1314         { .compatible = "nvidia,tegra210-dsi", },
1315         { .compatible = "nvidia,tegra210-sor", },
1316         { .compatible = "nvidia,tegra210-sor1", },
1317         { .compatible = "nvidia,tegra210-vic", },
1318         { .compatible = "nvidia,tegra186-display", },
1319         { .compatible = "nvidia,tegra186-dc", },
1320         { .compatible = "nvidia,tegra186-sor", },
1321         { .compatible = "nvidia,tegra186-sor1", },
1322         { .compatible = "nvidia,tegra186-vic", },
1323         { .compatible = "nvidia,tegra194-display", },
1324         { .compatible = "nvidia,tegra194-dc", },
1325         { .compatible = "nvidia,tegra194-sor", },
1326         { .compatible = "nvidia,tegra194-vic", },
1327         { /* sentinel */ }
1328 };
1329
1330 static struct host1x_driver host1x_drm_driver = {
1331         .driver = {
1332                 .name = "drm",
1333                 .pm = &host1x_drm_pm_ops,
1334         },
1335         .probe = host1x_drm_probe,
1336         .remove = host1x_drm_remove,
1337         .subdevs = host1x_drm_subdevs,
1338 };
1339
1340 static struct platform_driver * const drivers[] = {
1341         &tegra_display_hub_driver,
1342         &tegra_dc_driver,
1343         &tegra_hdmi_driver,
1344         &tegra_dsi_driver,
1345         &tegra_dpaux_driver,
1346         &tegra_sor_driver,
1347         &tegra_gr2d_driver,
1348         &tegra_gr3d_driver,
1349         &tegra_vic_driver,
1350 };
1351
1352 static int __init host1x_drm_init(void)
1353 {
1354         int err;
1355
1356         err = host1x_driver_register(&host1x_drm_driver);
1357         if (err < 0)
1358                 return err;
1359
1360         err = platform_register_drivers(drivers, ARRAY_SIZE(drivers));
1361         if (err < 0)
1362                 goto unregister_host1x;
1363
1364         return 0;
1365
1366 unregister_host1x:
1367         host1x_driver_unregister(&host1x_drm_driver);
1368         return err;
1369 }
1370 module_init(host1x_drm_init);
1371
1372 static void __exit host1x_drm_exit(void)
1373 {
1374         platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));
1375         host1x_driver_unregister(&host1x_drm_driver);
1376 }
1377 module_exit(host1x_drm_exit);
1378
1379 MODULE_AUTHOR("Thierry Reding <thierry.reding@avionic-design.de>");
1380 MODULE_DESCRIPTION("NVIDIA Tegra DRM driver");
1381 MODULE_LICENSE("GPL v2");