Merge tag 'io_uring-5.11-2021-01-16' of git://git.kernel.dk/linux-block
[linux/fpc-iii.git] / drivers / gpu / drm / virtio / virtgpu_fence.c
blob728ca36f63274e2eb735db382b64158778e13ff1
1 /*
2 * Copyright (C) 2015 Red Hat, Inc.
3 * All Rights Reserved.
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
13 * The above copyright notice and this permission notice (including the
14 * next paragraph) shall be included in all copies or substantial
15 * portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 #include <trace/events/dma_fence.h>
28 #include "virtgpu_drv.h"
30 #define to_virtio_fence(x) \
31 container_of(x, struct virtio_gpu_fence, f)
33 static const char *virtio_get_driver_name(struct dma_fence *f)
35 return "virtio_gpu";
38 static const char *virtio_get_timeline_name(struct dma_fence *f)
40 return "controlq";
43 static bool virtio_fence_signaled(struct dma_fence *f)
45 struct virtio_gpu_fence *fence = to_virtio_fence(f);
47 if (WARN_ON_ONCE(fence->f.seqno == 0))
48 /* leaked fence outside driver before completing
49 * initialization with virtio_gpu_fence_emit */
50 return false;
51 if (atomic64_read(&fence->drv->last_fence_id) >= fence->f.seqno)
52 return true;
53 return false;
56 static void virtio_fence_value_str(struct dma_fence *f, char *str, int size)
58 snprintf(str, size, "%llu", f->seqno);
61 static void virtio_timeline_value_str(struct dma_fence *f, char *str, int size)
63 struct virtio_gpu_fence *fence = to_virtio_fence(f);
65 snprintf(str, size, "%llu",
66 (u64)atomic64_read(&fence->drv->last_fence_id));
69 static const struct dma_fence_ops virtio_fence_ops = {
70 .get_driver_name = virtio_get_driver_name,
71 .get_timeline_name = virtio_get_timeline_name,
72 .signaled = virtio_fence_signaled,
73 .fence_value_str = virtio_fence_value_str,
74 .timeline_value_str = virtio_timeline_value_str,
77 struct virtio_gpu_fence *virtio_gpu_fence_alloc(struct virtio_gpu_device *vgdev)
79 struct virtio_gpu_fence_driver *drv = &vgdev->fence_drv;
80 struct virtio_gpu_fence *fence = kzalloc(sizeof(struct virtio_gpu_fence),
81 GFP_KERNEL);
82 if (!fence)
83 return fence;
85 fence->drv = drv;
87 /* This only partially initializes the fence because the seqno is
88 * unknown yet. The fence must not be used outside of the driver
89 * until virtio_gpu_fence_emit is called.
91 dma_fence_init(&fence->f, &virtio_fence_ops, &drv->lock, drv->context, 0);
93 return fence;
96 void virtio_gpu_fence_emit(struct virtio_gpu_device *vgdev,
97 struct virtio_gpu_ctrl_hdr *cmd_hdr,
98 struct virtio_gpu_fence *fence)
100 struct virtio_gpu_fence_driver *drv = &vgdev->fence_drv;
101 unsigned long irq_flags;
103 spin_lock_irqsave(&drv->lock, irq_flags);
104 fence->f.seqno = ++drv->current_fence_id;
105 dma_fence_get(&fence->f);
106 list_add_tail(&fence->node, &drv->fences);
107 spin_unlock_irqrestore(&drv->lock, irq_flags);
109 trace_dma_fence_emit(&fence->f);
111 cmd_hdr->flags |= cpu_to_le32(VIRTIO_GPU_FLAG_FENCE);
112 cmd_hdr->fence_id = cpu_to_le64(fence->f.seqno);
115 void virtio_gpu_fence_event_process(struct virtio_gpu_device *vgdev,
116 u64 fence_id)
118 struct virtio_gpu_fence_driver *drv = &vgdev->fence_drv;
119 struct virtio_gpu_fence *fence, *tmp;
120 unsigned long irq_flags;
122 spin_lock_irqsave(&drv->lock, irq_flags);
123 atomic64_set(&vgdev->fence_drv.last_fence_id, fence_id);
124 list_for_each_entry_safe(fence, tmp, &drv->fences, node) {
125 if (fence_id < fence->f.seqno)
126 continue;
127 dma_fence_signal_locked(&fence->f);
128 list_del(&fence->node);
129 dma_fence_put(&fence->f);
131 spin_unlock_irqrestore(&drv->lock, irq_flags);