1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright 2016 Linaro Ltd.
4 * Copyright 2016 ZTE Corporation.
8 #include <linux/component.h>
9 #include <linux/delay.h>
10 #include <linux/err.h>
11 #include <linux/hdmi.h>
12 #include <linux/irq.h>
13 #include <linux/mfd/syscon.h>
14 #include <linux/module.h>
15 #include <linux/mutex.h>
16 #include <linux/of_device.h>
18 #include <drm/drm_atomic_helper.h>
19 #include <drm/drm_edid.h>
20 #include <drm/drm_of.h>
21 #include <drm/drm_probe_helper.h>
22 #include <drm/drm_print.h>
23 #include <drm/drm_simple_kms_helper.h>
25 #include <sound/hdmi-codec.h>
27 #include "zx_hdmi_regs.h"
30 #define ZX_HDMI_INFOFRAME_SIZE 31
31 #define DDC_SEGMENT_ADDR 0x30
34 struct i2c_adapter adap
;
39 struct drm_connector connector
;
40 struct drm_encoder encoder
;
41 struct zx_hdmi_i2c
*ddc
;
43 struct drm_device
*drm
;
50 struct platform_device
*audio_pdev
;
53 #define to_zx_hdmi(x) container_of(x, struct zx_hdmi, x)
55 static inline u8
hdmi_readb(struct zx_hdmi
*hdmi
, u16 offset
)
57 return readl_relaxed(hdmi
->mmio
+ offset
* 4);
60 static inline void hdmi_writeb(struct zx_hdmi
*hdmi
, u16 offset
, u8 val
)
62 writel_relaxed(val
, hdmi
->mmio
+ offset
* 4);
65 static inline void hdmi_writeb_mask(struct zx_hdmi
*hdmi
, u16 offset
,
70 tmp
= hdmi_readb(hdmi
, offset
);
71 tmp
= (tmp
& ~mask
) | (val
& mask
);
72 hdmi_writeb(hdmi
, offset
, tmp
);
75 static int zx_hdmi_infoframe_trans(struct zx_hdmi
*hdmi
,
76 union hdmi_infoframe
*frame
, u8 fsel
)
78 u8 buffer
[ZX_HDMI_INFOFRAME_SIZE
];
82 hdmi_writeb(hdmi
, TPI_INFO_FSEL
, fsel
);
84 num
= hdmi_infoframe_pack(frame
, buffer
, ZX_HDMI_INFOFRAME_SIZE
);
86 DRM_DEV_ERROR(hdmi
->dev
, "failed to pack infoframe: %d\n", num
);
90 for (i
= 0; i
< num
; i
++)
91 hdmi_writeb(hdmi
, TPI_INFO_B0
+ i
, buffer
[i
]);
93 hdmi_writeb_mask(hdmi
, TPI_INFO_EN
, TPI_INFO_TRANS_RPT
,
95 hdmi_writeb_mask(hdmi
, TPI_INFO_EN
, TPI_INFO_TRANS_EN
,
101 static int zx_hdmi_config_video_vsi(struct zx_hdmi
*hdmi
,
102 struct drm_display_mode
*mode
)
104 union hdmi_infoframe frame
;
107 ret
= drm_hdmi_vendor_infoframe_from_display_mode(&frame
.vendor
.hdmi
,
111 DRM_DEV_ERROR(hdmi
->dev
, "failed to get vendor infoframe: %d\n",
116 return zx_hdmi_infoframe_trans(hdmi
, &frame
, FSEL_VSIF
);
119 static int zx_hdmi_config_video_avi(struct zx_hdmi
*hdmi
,
120 struct drm_display_mode
*mode
)
122 union hdmi_infoframe frame
;
125 ret
= drm_hdmi_avi_infoframe_from_display_mode(&frame
.avi
,
129 DRM_DEV_ERROR(hdmi
->dev
, "failed to get avi infoframe: %d\n",
134 /* We always use YUV444 for HDMI output. */
135 frame
.avi
.colorspace
= HDMI_COLORSPACE_YUV444
;
137 return zx_hdmi_infoframe_trans(hdmi
, &frame
, FSEL_AVI
);
140 static void zx_hdmi_encoder_mode_set(struct drm_encoder
*encoder
,
141 struct drm_display_mode
*mode
,
142 struct drm_display_mode
*adj_mode
)
144 struct zx_hdmi
*hdmi
= to_zx_hdmi(encoder
);
146 if (hdmi
->sink_is_hdmi
) {
147 zx_hdmi_config_video_avi(hdmi
, mode
);
148 zx_hdmi_config_video_vsi(hdmi
, mode
);
152 static void zx_hdmi_phy_start(struct zx_hdmi
*hdmi
)
154 /* Copy from ZTE BSP code */
155 hdmi_writeb(hdmi
, 0x222, 0x0);
156 hdmi_writeb(hdmi
, 0x224, 0x4);
157 hdmi_writeb(hdmi
, 0x909, 0x0);
158 hdmi_writeb(hdmi
, 0x7b0, 0x90);
159 hdmi_writeb(hdmi
, 0x7b1, 0x00);
160 hdmi_writeb(hdmi
, 0x7b2, 0xa7);
161 hdmi_writeb(hdmi
, 0x7b8, 0xaa);
162 hdmi_writeb(hdmi
, 0x7b2, 0xa7);
163 hdmi_writeb(hdmi
, 0x7b3, 0x0f);
164 hdmi_writeb(hdmi
, 0x7b4, 0x0f);
165 hdmi_writeb(hdmi
, 0x7b5, 0x55);
166 hdmi_writeb(hdmi
, 0x7b7, 0x03);
167 hdmi_writeb(hdmi
, 0x7b9, 0x12);
168 hdmi_writeb(hdmi
, 0x7ba, 0x32);
169 hdmi_writeb(hdmi
, 0x7bc, 0x68);
170 hdmi_writeb(hdmi
, 0x7be, 0x40);
171 hdmi_writeb(hdmi
, 0x7bf, 0x84);
172 hdmi_writeb(hdmi
, 0x7c1, 0x0f);
173 hdmi_writeb(hdmi
, 0x7c8, 0x02);
174 hdmi_writeb(hdmi
, 0x7c9, 0x03);
175 hdmi_writeb(hdmi
, 0x7ca, 0x40);
176 hdmi_writeb(hdmi
, 0x7dc, 0x31);
177 hdmi_writeb(hdmi
, 0x7e2, 0x04);
178 hdmi_writeb(hdmi
, 0x7e0, 0x06);
179 hdmi_writeb(hdmi
, 0x7cb, 0x68);
180 hdmi_writeb(hdmi
, 0x7f9, 0x02);
181 hdmi_writeb(hdmi
, 0x7b6, 0x02);
182 hdmi_writeb(hdmi
, 0x7f3, 0x0);
185 static void zx_hdmi_hw_enable(struct zx_hdmi
*hdmi
)
188 hdmi_writeb_mask(hdmi
, CLKPWD
, CLKPWD_PDIDCK
, CLKPWD_PDIDCK
);
190 /* Enable HDMI for TX */
191 hdmi_writeb_mask(hdmi
, FUNC_SEL
, FUNC_HDMI_EN
, FUNC_HDMI_EN
);
193 /* Enable deep color packet */
194 hdmi_writeb_mask(hdmi
, P2T_CTRL
, P2T_DC_PKT_EN
, P2T_DC_PKT_EN
);
196 /* Enable HDMI/MHL mode for output */
197 hdmi_writeb_mask(hdmi
, TEST_TXCTRL
, TEST_TXCTRL_HDMI_MODE
,
198 TEST_TXCTRL_HDMI_MODE
);
200 /* Configure reg_qc_sel */
201 hdmi_writeb(hdmi
, HDMICTL4
, 0x3);
203 /* Enable interrupt */
204 hdmi_writeb_mask(hdmi
, INTR1_MASK
, INTR1_MONITOR_DETECT
,
205 INTR1_MONITOR_DETECT
);
208 zx_hdmi_phy_start(hdmi
);
211 static void zx_hdmi_hw_disable(struct zx_hdmi
*hdmi
)
213 /* Disable interrupt */
214 hdmi_writeb_mask(hdmi
, INTR1_MASK
, INTR1_MONITOR_DETECT
, 0);
216 /* Disable deep color packet */
217 hdmi_writeb_mask(hdmi
, P2T_CTRL
, P2T_DC_PKT_EN
, P2T_DC_PKT_EN
);
219 /* Disable HDMI for TX */
220 hdmi_writeb_mask(hdmi
, FUNC_SEL
, FUNC_HDMI_EN
, 0);
223 hdmi_writeb_mask(hdmi
, CLKPWD
, CLKPWD_PDIDCK
, 0);
226 static void zx_hdmi_encoder_enable(struct drm_encoder
*encoder
)
228 struct zx_hdmi
*hdmi
= to_zx_hdmi(encoder
);
230 clk_prepare_enable(hdmi
->cec_clk
);
231 clk_prepare_enable(hdmi
->osc_clk
);
232 clk_prepare_enable(hdmi
->xclk
);
234 zx_hdmi_hw_enable(hdmi
);
236 vou_inf_enable(VOU_HDMI
, encoder
->crtc
);
239 static void zx_hdmi_encoder_disable(struct drm_encoder
*encoder
)
241 struct zx_hdmi
*hdmi
= to_zx_hdmi(encoder
);
243 vou_inf_disable(VOU_HDMI
, encoder
->crtc
);
245 zx_hdmi_hw_disable(hdmi
);
247 clk_disable_unprepare(hdmi
->xclk
);
248 clk_disable_unprepare(hdmi
->osc_clk
);
249 clk_disable_unprepare(hdmi
->cec_clk
);
252 static const struct drm_encoder_helper_funcs zx_hdmi_encoder_helper_funcs
= {
253 .enable
= zx_hdmi_encoder_enable
,
254 .disable
= zx_hdmi_encoder_disable
,
255 .mode_set
= zx_hdmi_encoder_mode_set
,
258 static int zx_hdmi_connector_get_modes(struct drm_connector
*connector
)
260 struct zx_hdmi
*hdmi
= to_zx_hdmi(connector
);
264 edid
= drm_get_edid(connector
, &hdmi
->ddc
->adap
);
268 hdmi
->sink_is_hdmi
= drm_detect_hdmi_monitor(edid
);
269 hdmi
->sink_has_audio
= drm_detect_monitor_audio(edid
);
270 drm_connector_update_edid_property(connector
, edid
);
271 ret
= drm_add_edid_modes(connector
, edid
);
277 static enum drm_mode_status
278 zx_hdmi_connector_mode_valid(struct drm_connector
*connector
,
279 struct drm_display_mode
*mode
)
284 static struct drm_connector_helper_funcs zx_hdmi_connector_helper_funcs
= {
285 .get_modes
= zx_hdmi_connector_get_modes
,
286 .mode_valid
= zx_hdmi_connector_mode_valid
,
289 static enum drm_connector_status
290 zx_hdmi_connector_detect(struct drm_connector
*connector
, bool force
)
292 struct zx_hdmi
*hdmi
= to_zx_hdmi(connector
);
294 return (hdmi_readb(hdmi
, TPI_HPD_RSEN
) & TPI_HPD_CONNECTION
) ?
295 connector_status_connected
: connector_status_disconnected
;
298 static const struct drm_connector_funcs zx_hdmi_connector_funcs
= {
299 .fill_modes
= drm_helper_probe_single_connector_modes
,
300 .detect
= zx_hdmi_connector_detect
,
301 .destroy
= drm_connector_cleanup
,
302 .reset
= drm_atomic_helper_connector_reset
,
303 .atomic_duplicate_state
= drm_atomic_helper_connector_duplicate_state
,
304 .atomic_destroy_state
= drm_atomic_helper_connector_destroy_state
,
307 static int zx_hdmi_register(struct drm_device
*drm
, struct zx_hdmi
*hdmi
)
309 struct drm_encoder
*encoder
= &hdmi
->encoder
;
311 encoder
->possible_crtcs
= VOU_CRTC_MASK
;
313 drm_simple_encoder_init(drm
, encoder
, DRM_MODE_ENCODER_TMDS
);
314 drm_encoder_helper_add(encoder
, &zx_hdmi_encoder_helper_funcs
);
316 hdmi
->connector
.polled
= DRM_CONNECTOR_POLL_HPD
;
318 drm_connector_init_with_ddc(drm
, &hdmi
->connector
,
319 &zx_hdmi_connector_funcs
,
320 DRM_MODE_CONNECTOR_HDMIA
,
322 drm_connector_helper_add(&hdmi
->connector
,
323 &zx_hdmi_connector_helper_funcs
);
325 drm_connector_attach_encoder(&hdmi
->connector
, encoder
);
330 static irqreturn_t
zx_hdmi_irq_thread(int irq
, void *dev_id
)
332 struct zx_hdmi
*hdmi
= dev_id
;
334 drm_helper_hpd_irq_event(hdmi
->connector
.dev
);
339 static irqreturn_t
zx_hdmi_irq_handler(int irq
, void *dev_id
)
341 struct zx_hdmi
*hdmi
= dev_id
;
344 lstat
= hdmi_readb(hdmi
, L1_INTR_STAT
);
346 /* Monitor detect/HPD interrupt */
347 if (lstat
& L1_INTR_STAT_INTR1
) {
350 stat
= hdmi_readb(hdmi
, INTR1_STAT
);
351 hdmi_writeb(hdmi
, INTR1_STAT
, stat
);
353 if (stat
& INTR1_MONITOR_DETECT
)
354 return IRQ_WAKE_THREAD
;
360 static int zx_hdmi_audio_startup(struct device
*dev
, void *data
)
362 struct zx_hdmi
*hdmi
= dev_get_drvdata(dev
);
363 struct drm_encoder
*encoder
= &hdmi
->encoder
;
365 vou_inf_hdmi_audio_sel(encoder
->crtc
, VOU_HDMI_AUD_SPDIF
);
370 static void zx_hdmi_audio_shutdown(struct device
*dev
, void *data
)
372 struct zx_hdmi
*hdmi
= dev_get_drvdata(dev
);
374 /* Disable audio input */
375 hdmi_writeb_mask(hdmi
, AUD_EN
, AUD_IN_EN
, 0);
378 static inline int zx_hdmi_audio_get_n(unsigned int fs
)
382 if (fs
&& (fs
% 44100) == 0)
383 n
= 6272 * (fs
/ 44100);
390 static int zx_hdmi_audio_hw_params(struct device
*dev
,
392 struct hdmi_codec_daifmt
*daifmt
,
393 struct hdmi_codec_params
*params
)
395 struct zx_hdmi
*hdmi
= dev_get_drvdata(dev
);
396 struct hdmi_audio_infoframe
*cea
= ¶ms
->cea
;
397 union hdmi_infoframe frame
;
400 /* We only support spdif for now */
401 if (daifmt
->fmt
!= HDMI_SPDIF
) {
402 DRM_DEV_ERROR(hdmi
->dev
, "invalid daifmt %d\n", daifmt
->fmt
);
406 switch (params
->sample_width
) {
408 hdmi_writeb_mask(hdmi
, TPI_AUD_CONFIG
, SPDIF_SAMPLE_SIZE_MASK
,
409 SPDIF_SAMPLE_SIZE_16BIT
);
412 hdmi_writeb_mask(hdmi
, TPI_AUD_CONFIG
, SPDIF_SAMPLE_SIZE_MASK
,
413 SPDIF_SAMPLE_SIZE_20BIT
);
416 hdmi_writeb_mask(hdmi
, TPI_AUD_CONFIG
, SPDIF_SAMPLE_SIZE_MASK
,
417 SPDIF_SAMPLE_SIZE_24BIT
);
420 DRM_DEV_ERROR(hdmi
->dev
, "invalid sample width %d\n",
421 params
->sample_width
);
425 /* CTS is calculated by hardware, and we only need to take care of N */
426 n
= zx_hdmi_audio_get_n(params
->sample_rate
);
427 hdmi_writeb(hdmi
, N_SVAL1
, n
& 0xff);
428 hdmi_writeb(hdmi
, N_SVAL2
, (n
>> 8) & 0xff);
429 hdmi_writeb(hdmi
, N_SVAL3
, (n
>> 16) & 0xf);
431 /* Enable spdif mode */
432 hdmi_writeb_mask(hdmi
, AUD_MODE
, SPDIF_EN
, SPDIF_EN
);
434 /* Enable audio input */
435 hdmi_writeb_mask(hdmi
, AUD_EN
, AUD_IN_EN
, AUD_IN_EN
);
437 memcpy(&frame
.audio
, cea
, sizeof(*cea
));
439 return zx_hdmi_infoframe_trans(hdmi
, &frame
, FSEL_AUDIO
);
442 static int zx_hdmi_audio_mute(struct device
*dev
, void *data
,
443 bool enable
, int direction
)
445 struct zx_hdmi
*hdmi
= dev_get_drvdata(dev
);
448 hdmi_writeb_mask(hdmi
, TPI_AUD_CONFIG
, TPI_AUD_MUTE
,
451 hdmi_writeb_mask(hdmi
, TPI_AUD_CONFIG
, TPI_AUD_MUTE
, 0);
456 static int zx_hdmi_audio_get_eld(struct device
*dev
, void *data
,
457 uint8_t *buf
, size_t len
)
459 struct zx_hdmi
*hdmi
= dev_get_drvdata(dev
);
460 struct drm_connector
*connector
= &hdmi
->connector
;
462 memcpy(buf
, connector
->eld
, min(sizeof(connector
->eld
), len
));
467 static const struct hdmi_codec_ops zx_hdmi_codec_ops
= {
468 .audio_startup
= zx_hdmi_audio_startup
,
469 .hw_params
= zx_hdmi_audio_hw_params
,
470 .audio_shutdown
= zx_hdmi_audio_shutdown
,
471 .mute_stream
= zx_hdmi_audio_mute
,
472 .get_eld
= zx_hdmi_audio_get_eld
,
473 .no_capture_mute
= 1,
476 static struct hdmi_codec_pdata zx_hdmi_codec_pdata
= {
477 .ops
= &zx_hdmi_codec_ops
,
481 static int zx_hdmi_audio_register(struct zx_hdmi
*hdmi
)
483 struct platform_device
*pdev
;
485 pdev
= platform_device_register_data(hdmi
->dev
, HDMI_CODEC_DRV_NAME
,
487 &zx_hdmi_codec_pdata
,
488 sizeof(zx_hdmi_codec_pdata
));
490 return PTR_ERR(pdev
);
492 hdmi
->audio_pdev
= pdev
;
497 static int zx_hdmi_i2c_read(struct zx_hdmi
*hdmi
, struct i2c_msg
*msg
)
504 /* Bits [9:8] of bytes */
505 hdmi_writeb(hdmi
, ZX_DDC_DIN_CNT2
, (len
>> 8) & 0xff);
506 /* Bits [7:0] of bytes */
507 hdmi_writeb(hdmi
, ZX_DDC_DIN_CNT1
, len
& 0xff);
510 hdmi_writeb_mask(hdmi
, ZX_DDC_CMD
, DDC_CMD_MASK
, DDC_CMD_CLEAR_FIFO
);
512 /* Kick off the read */
513 hdmi_writeb_mask(hdmi
, ZX_DDC_CMD
, DDC_CMD_MASK
,
514 DDC_CMD_SEQUENTIAL_READ
);
519 /* FIFO needs some time to get ready */
520 usleep_range(500, 1000);
522 cnt
= hdmi_readb(hdmi
, ZX_DDC_DOUT_CNT
) & DDC_DOUT_CNT_MASK
;
525 DRM_DEV_ERROR(hdmi
->dev
,
526 "DDC FIFO read timed out!");
532 for (i
= 0; i
< cnt
; i
++)
533 *buf
++ = hdmi_readb(hdmi
, ZX_DDC_DATA
);
540 static int zx_hdmi_i2c_write(struct zx_hdmi
*hdmi
, struct i2c_msg
*msg
)
543 * The DDC I2C adapter is only for reading EDID data, so we assume
544 * that the write to this adapter must be the EDID data offset.
546 if ((msg
->len
!= 1) ||
547 ((msg
->addr
!= DDC_ADDR
) && (msg
->addr
!= DDC_SEGMENT_ADDR
)))
550 if (msg
->addr
== DDC_SEGMENT_ADDR
)
551 hdmi_writeb(hdmi
, ZX_DDC_SEGM
, msg
->addr
<< 1);
552 else if (msg
->addr
== DDC_ADDR
)
553 hdmi_writeb(hdmi
, ZX_DDC_ADDR
, msg
->addr
<< 1);
555 hdmi_writeb(hdmi
, ZX_DDC_OFFSET
, msg
->buf
[0]);
560 static int zx_hdmi_i2c_xfer(struct i2c_adapter
*adap
, struct i2c_msg
*msgs
,
563 struct zx_hdmi
*hdmi
= i2c_get_adapdata(adap
);
564 struct zx_hdmi_i2c
*ddc
= hdmi
->ddc
;
567 mutex_lock(&ddc
->lock
);
569 /* Enable DDC master access */
570 hdmi_writeb_mask(hdmi
, TPI_DDC_MASTER_EN
, HW_DDC_MASTER
, HW_DDC_MASTER
);
572 for (i
= 0; i
< num
; i
++) {
573 DRM_DEV_DEBUG(hdmi
->dev
,
574 "xfer: num: %d/%d, len: %d, flags: %#x\n",
575 i
+ 1, num
, msgs
[i
].len
, msgs
[i
].flags
);
577 if (msgs
[i
].flags
& I2C_M_RD
)
578 ret
= zx_hdmi_i2c_read(hdmi
, &msgs
[i
]);
580 ret
= zx_hdmi_i2c_write(hdmi
, &msgs
[i
]);
589 /* Disable DDC master access */
590 hdmi_writeb_mask(hdmi
, TPI_DDC_MASTER_EN
, HW_DDC_MASTER
, 0);
592 mutex_unlock(&ddc
->lock
);
597 static u32
zx_hdmi_i2c_func(struct i2c_adapter
*adapter
)
599 return I2C_FUNC_I2C
| I2C_FUNC_SMBUS_EMUL
;
602 static const struct i2c_algorithm zx_hdmi_algorithm
= {
603 .master_xfer
= zx_hdmi_i2c_xfer
,
604 .functionality
= zx_hdmi_i2c_func
,
607 static int zx_hdmi_ddc_register(struct zx_hdmi
*hdmi
)
609 struct i2c_adapter
*adap
;
610 struct zx_hdmi_i2c
*ddc
;
613 ddc
= devm_kzalloc(hdmi
->dev
, sizeof(*ddc
), GFP_KERNEL
);
618 mutex_init(&ddc
->lock
);
621 adap
->owner
= THIS_MODULE
;
622 adap
->class = I2C_CLASS_DDC
;
623 adap
->dev
.parent
= hdmi
->dev
;
624 adap
->algo
= &zx_hdmi_algorithm
;
625 snprintf(adap
->name
, sizeof(adap
->name
), "zx hdmi i2c");
627 ret
= i2c_add_adapter(adap
);
629 DRM_DEV_ERROR(hdmi
->dev
, "failed to add I2C adapter: %d\n",
634 i2c_set_adapdata(adap
, hdmi
);
639 static int zx_hdmi_bind(struct device
*dev
, struct device
*master
, void *data
)
641 struct platform_device
*pdev
= to_platform_device(dev
);
642 struct drm_device
*drm
= data
;
643 struct resource
*res
;
644 struct zx_hdmi
*hdmi
;
648 hdmi
= devm_kzalloc(dev
, sizeof(*hdmi
), GFP_KERNEL
);
655 dev_set_drvdata(dev
, hdmi
);
657 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
658 hdmi
->mmio
= devm_ioremap_resource(dev
, res
);
659 if (IS_ERR(hdmi
->mmio
)) {
660 ret
= PTR_ERR(hdmi
->mmio
);
661 DRM_DEV_ERROR(dev
, "failed to remap hdmi region: %d\n", ret
);
665 irq
= platform_get_irq(pdev
, 0);
669 hdmi
->cec_clk
= devm_clk_get(hdmi
->dev
, "osc_cec");
670 if (IS_ERR(hdmi
->cec_clk
)) {
671 ret
= PTR_ERR(hdmi
->cec_clk
);
672 DRM_DEV_ERROR(dev
, "failed to get cec_clk: %d\n", ret
);
676 hdmi
->osc_clk
= devm_clk_get(hdmi
->dev
, "osc_clk");
677 if (IS_ERR(hdmi
->osc_clk
)) {
678 ret
= PTR_ERR(hdmi
->osc_clk
);
679 DRM_DEV_ERROR(dev
, "failed to get osc_clk: %d\n", ret
);
683 hdmi
->xclk
= devm_clk_get(hdmi
->dev
, "xclk");
684 if (IS_ERR(hdmi
->xclk
)) {
685 ret
= PTR_ERR(hdmi
->xclk
);
686 DRM_DEV_ERROR(dev
, "failed to get xclk: %d\n", ret
);
690 ret
= zx_hdmi_ddc_register(hdmi
);
692 DRM_DEV_ERROR(dev
, "failed to register ddc: %d\n", ret
);
696 ret
= zx_hdmi_audio_register(hdmi
);
698 DRM_DEV_ERROR(dev
, "failed to register audio: %d\n", ret
);
702 ret
= zx_hdmi_register(drm
, hdmi
);
704 DRM_DEV_ERROR(dev
, "failed to register hdmi: %d\n", ret
);
708 ret
= devm_request_threaded_irq(dev
, irq
, zx_hdmi_irq_handler
,
709 zx_hdmi_irq_thread
, IRQF_SHARED
,
710 dev_name(dev
), hdmi
);
712 DRM_DEV_ERROR(dev
, "failed to request threaded irq: %d\n", ret
);
719 static void zx_hdmi_unbind(struct device
*dev
, struct device
*master
,
722 struct zx_hdmi
*hdmi
= dev_get_drvdata(dev
);
724 hdmi
->connector
.funcs
->destroy(&hdmi
->connector
);
725 hdmi
->encoder
.funcs
->destroy(&hdmi
->encoder
);
727 if (hdmi
->audio_pdev
)
728 platform_device_unregister(hdmi
->audio_pdev
);
731 static const struct component_ops zx_hdmi_component_ops
= {
732 .bind
= zx_hdmi_bind
,
733 .unbind
= zx_hdmi_unbind
,
736 static int zx_hdmi_probe(struct platform_device
*pdev
)
738 return component_add(&pdev
->dev
, &zx_hdmi_component_ops
);
741 static int zx_hdmi_remove(struct platform_device
*pdev
)
743 component_del(&pdev
->dev
, &zx_hdmi_component_ops
);
747 static const struct of_device_id zx_hdmi_of_match
[] = {
748 { .compatible
= "zte,zx296718-hdmi", },
751 MODULE_DEVICE_TABLE(of
, zx_hdmi_of_match
);
753 struct platform_driver zx_hdmi_driver
= {
754 .probe
= zx_hdmi_probe
,
755 .remove
= zx_hdmi_remove
,
758 .of_match_table
= zx_hdmi_of_match
,