1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Panasonic MN88473 DVB-T/T2/C demodulator driver
5 * Copyright (C) 2014 Antti Palosaari <crope@iki.fi>
8 #include "mn88473_priv.h"
10 static int mn88473_get_tune_settings(struct dvb_frontend
*fe
,
11 struct dvb_frontend_tune_settings
*s
)
13 s
->min_delay_ms
= 1000;
17 static int mn88473_set_frontend(struct dvb_frontend
*fe
)
19 struct i2c_client
*client
= fe
->demodulator_priv
;
20 struct mn88473_dev
*dev
= i2c_get_clientdata(client
);
21 struct dtv_frontend_properties
*c
= &fe
->dtv_property_cache
;
25 u8 delivery_system_val
, if_val
[3], *conf_val_ptr
;
26 u8 reg_bank2_2d_val
, reg_bank0_d2_val
;
29 "delivery_system=%u modulation=%u frequency=%u bandwidth_hz=%u symbol_rate=%u inversion=%d stream_id=%d\n",
30 c
->delivery_system
, c
->modulation
, c
->frequency
,
31 c
->bandwidth_hz
, c
->symbol_rate
, c
->inversion
, c
->stream_id
);
38 switch (c
->delivery_system
) {
40 delivery_system_val
= 0x02;
41 reg_bank2_2d_val
= 0x23;
42 reg_bank0_d2_val
= 0x2a;
45 delivery_system_val
= 0x03;
46 reg_bank2_2d_val
= 0x3b;
47 reg_bank0_d2_val
= 0x29;
49 case SYS_DVBC_ANNEX_A
:
50 delivery_system_val
= 0x04;
51 reg_bank2_2d_val
= 0x3b;
52 reg_bank0_d2_val
= 0x29;
59 switch (c
->delivery_system
) {
62 switch (c
->bandwidth_hz
) {
64 conf_val_ptr
= "\xe9\x55\x55\x1c\x29\x1c\x29";
67 conf_val_ptr
= "\xc8\x00\x00\x17\x0a\x17\x0a";
70 conf_val_ptr
= "\xaf\x00\x00\x11\xec\x11\xec";
77 case SYS_DVBC_ANNEX_A
:
78 conf_val_ptr
= "\x10\xab\x0d\xae\x1d\x9d";
85 if (fe
->ops
.tuner_ops
.set_params
) {
86 ret
= fe
->ops
.tuner_ops
.set_params(fe
);
91 if (fe
->ops
.tuner_ops
.get_if_frequency
) {
92 ret
= fe
->ops
.tuner_ops
.get_if_frequency(fe
, &if_frequency
);
96 dev_dbg(&client
->dev
, "get_if_frequency=%u\n", if_frequency
);
102 /* Calculate IF registers */
103 uitmp
= DIV_ROUND_CLOSEST_ULL((u64
) if_frequency
* 0x1000000, dev
->clk
);
104 if_val
[0] = (uitmp
>> 16) & 0xff;
105 if_val
[1] = (uitmp
>> 8) & 0xff;
106 if_val
[2] = (uitmp
>> 0) & 0xff;
108 ret
= regmap_write(dev
->regmap
[2], 0x05, 0x00);
111 ret
= regmap_write(dev
->regmap
[2], 0xfb, 0x13);
114 ret
= regmap_write(dev
->regmap
[2], 0xef, 0x13);
117 ret
= regmap_write(dev
->regmap
[2], 0xf9, 0x13);
120 ret
= regmap_write(dev
->regmap
[2], 0x00, 0x18);
123 ret
= regmap_write(dev
->regmap
[2], 0x01, 0x01);
126 ret
= regmap_write(dev
->regmap
[2], 0x02, 0x21);
129 ret
= regmap_write(dev
->regmap
[2], 0x03, delivery_system_val
);
132 ret
= regmap_write(dev
->regmap
[2], 0x0b, 0x00);
136 for (i
= 0; i
< sizeof(if_val
); i
++) {
137 ret
= regmap_write(dev
->regmap
[2], 0x10 + i
, if_val
[i
]);
142 switch (c
->delivery_system
) {
145 for (i
= 0; i
< 7; i
++) {
146 ret
= regmap_write(dev
->regmap
[2], 0x13 + i
,
152 case SYS_DVBC_ANNEX_A
:
153 ret
= regmap_bulk_write(dev
->regmap
[1], 0x10, conf_val_ptr
, 6);
161 ret
= regmap_write(dev
->regmap
[2], 0x2d, reg_bank2_2d_val
);
164 ret
= regmap_write(dev
->regmap
[2], 0x2e, 0x00);
167 ret
= regmap_write(dev
->regmap
[2], 0x56, 0x0d);
170 ret
= regmap_bulk_write(dev
->regmap
[0], 0x01,
171 "\xba\x13\x80\xba\x91\xdd\xe7\x28", 8);
174 ret
= regmap_write(dev
->regmap
[0], 0x0a, 0x1a);
177 ret
= regmap_write(dev
->regmap
[0], 0x13, 0x1f);
180 ret
= regmap_write(dev
->regmap
[0], 0x19, 0x03);
183 ret
= regmap_write(dev
->regmap
[0], 0x1d, 0xb0);
186 ret
= regmap_write(dev
->regmap
[0], 0x2a, 0x72);
189 ret
= regmap_write(dev
->regmap
[0], 0x2d, 0x00);
192 ret
= regmap_write(dev
->regmap
[0], 0x3c, 0x00);
195 ret
= regmap_write(dev
->regmap
[0], 0x3f, 0xf8);
198 ret
= regmap_bulk_write(dev
->regmap
[0], 0x40, "\xf4\x08", 2);
201 ret
= regmap_write(dev
->regmap
[0], 0xd2, reg_bank0_d2_val
);
204 ret
= regmap_write(dev
->regmap
[0], 0xd4, 0x55);
207 ret
= regmap_write(dev
->regmap
[1], 0xbe, 0x08);
210 ret
= regmap_write(dev
->regmap
[0], 0xb2, 0x37);
213 ret
= regmap_write(dev
->regmap
[0], 0xd7, 0x04);
218 if (c
->delivery_system
== SYS_DVBT2
) {
219 ret
= regmap_write(dev
->regmap
[2], 0x36,
220 (c
->stream_id
== NO_STREAM_ID_FILTER
) ? 0 :
227 ret
= regmap_write(dev
->regmap
[2], 0xf8, 0x9f);
233 dev_dbg(&client
->dev
, "failed=%d\n", ret
);
237 static int mn88473_read_status(struct dvb_frontend
*fe
, enum fe_status
*status
)
239 struct i2c_client
*client
= fe
->demodulator_priv
;
240 struct mn88473_dev
*dev
= i2c_get_clientdata(client
);
241 struct dtv_frontend_properties
*c
= &fe
->dtv_property_cache
;
243 unsigned int utmp
, utmp1
, utmp2
;
252 switch (c
->delivery_system
) {
254 ret
= regmap_read(dev
->regmap
[0], 0x62, &utmp
);
258 if (!(utmp
& 0xa0)) {
259 if ((utmp
& 0x0f) >= 0x09)
260 *status
= FE_HAS_SIGNAL
| FE_HAS_CARRIER
|
261 FE_HAS_VITERBI
| FE_HAS_SYNC
|
263 else if ((utmp
& 0x0f) >= 0x03)
264 *status
= FE_HAS_SIGNAL
| FE_HAS_CARRIER
;
270 ret
= regmap_read(dev
->regmap
[2], 0x8b, &utmp
);
274 if (!(utmp
& 0x40)) {
275 if ((utmp
& 0x0f) >= 0x0d)
276 *status
= FE_HAS_SIGNAL
| FE_HAS_CARRIER
|
277 FE_HAS_VITERBI
| FE_HAS_SYNC
|
279 else if ((utmp
& 0x0f) >= 0x0a)
280 *status
= FE_HAS_SIGNAL
| FE_HAS_CARRIER
|
282 else if ((utmp
& 0x0f) >= 0x07)
283 *status
= FE_HAS_SIGNAL
| FE_HAS_CARRIER
;
288 case SYS_DVBC_ANNEX_A
:
289 ret
= regmap_read(dev
->regmap
[1], 0x85, &utmp
);
293 if (!(utmp
& 0x40)) {
294 ret
= regmap_read(dev
->regmap
[1], 0x89, &utmp
);
299 *status
= FE_HAS_SIGNAL
| FE_HAS_CARRIER
|
300 FE_HAS_VITERBI
| FE_HAS_SYNC
|
311 /* Signal strength */
312 if (*status
& FE_HAS_SIGNAL
) {
313 for (i
= 0; i
< 2; i
++) {
314 ret
= regmap_bulk_read(dev
->regmap
[2], 0x86 + i
,
320 /* AGCRD[15:6] gives us a 10bit value ([5:0] are always 0) */
321 utmp1
= buf
[0] << 8 | buf
[1] << 0 | buf
[0] >> 2;
322 dev_dbg(&client
->dev
, "strength=%u\n", utmp1
);
324 c
->strength
.stat
[0].scale
= FE_SCALE_RELATIVE
;
325 c
->strength
.stat
[0].uvalue
= utmp1
;
327 c
->strength
.stat
[0].scale
= FE_SCALE_NOT_AVAILABLE
;
331 if (*status
& FE_HAS_VITERBI
&& c
->delivery_system
== SYS_DVBT
) {
333 ret
= regmap_bulk_read(dev
->regmap
[0], 0x8f, buf
, 2);
337 utmp
= buf
[0] << 8 | buf
[1] << 0;
339 /* CNR[dB]: 10 * (log10(65536 / value) + 0.2) */
340 /* log10(65536) = 80807124, 0.2 = 3355443 */
341 stmp
= div_u64(((u64
)80807124 - intlog10(utmp
)
342 + 3355443) * 10000, 1 << 24);
343 dev_dbg(&client
->dev
, "cnr=%d value=%u\n", stmp
, utmp
);
348 c
->cnr
.stat
[0].svalue
= stmp
;
349 c
->cnr
.stat
[0].scale
= FE_SCALE_DECIBEL
;
350 } else if (*status
& FE_HAS_VITERBI
&&
351 c
->delivery_system
== SYS_DVBT2
) {
353 for (i
= 0; i
< 3; i
++) {
354 ret
= regmap_bulk_read(dev
->regmap
[2], 0xb7 + i
,
360 utmp
= buf
[1] << 8 | buf
[2] << 0;
361 utmp1
= (buf
[0] >> 2) & 0x01; /* 0=SISO, 1=MISO */
364 /* CNR[dB]: 10 * (log10(16384 / value) - 0.6) */
365 /* log10(16384) = 70706234, 0.6 = 10066330 */
366 stmp
= div_u64(((u64
)70706234 - intlog10(utmp
)
367 - 10066330) * 10000, 1 << 24);
368 dev_dbg(&client
->dev
, "cnr=%d value=%u MISO\n",
371 /* CNR[dB]: 10 * (log10(65536 / value) + 0.2) */
372 /* log10(65536) = 80807124, 0.2 = 3355443 */
373 stmp
= div_u64(((u64
)80807124 - intlog10(utmp
)
374 + 3355443) * 10000, 1 << 24);
375 dev_dbg(&client
->dev
, "cnr=%d value=%u SISO\n",
382 c
->cnr
.stat
[0].svalue
= stmp
;
383 c
->cnr
.stat
[0].scale
= FE_SCALE_DECIBEL
;
384 } else if (*status
& FE_HAS_VITERBI
&&
385 c
->delivery_system
== SYS_DVBC_ANNEX_A
) {
387 ret
= regmap_bulk_read(dev
->regmap
[1], 0xa1, buf
, 4);
391 utmp1
= buf
[0] << 8 | buf
[1] << 0; /* signal */
392 utmp2
= buf
[2] << 8 | buf
[3] << 0; /* noise */
393 if (utmp1
&& utmp2
) {
394 /* CNR[dB]: 10 * log10(8 * (signal / noise)) */
395 /* log10(8) = 15151336 */
396 stmp
= div_u64(((u64
)15151336 + intlog10(utmp1
)
397 - intlog10(utmp2
)) * 10000, 1 << 24);
398 dev_dbg(&client
->dev
, "cnr=%d signal=%u noise=%u\n",
404 c
->cnr
.stat
[0].svalue
= stmp
;
405 c
->cnr
.stat
[0].scale
= FE_SCALE_DECIBEL
;
407 c
->cnr
.stat
[0].scale
= FE_SCALE_NOT_AVAILABLE
;
411 if (*status
& FE_HAS_LOCK
&& (c
->delivery_system
== SYS_DVBT
||
412 c
->delivery_system
== SYS_DVBC_ANNEX_A
)) {
413 /* DVB-T & DVB-C BER */
414 ret
= regmap_bulk_read(dev
->regmap
[0], 0x92, buf
, 5);
418 utmp1
= buf
[0] << 16 | buf
[1] << 8 | buf
[2] << 0;
419 utmp2
= buf
[3] << 8 | buf
[4] << 0;
420 utmp2
= utmp2
* 8 * 204;
421 dev_dbg(&client
->dev
, "post_bit_error=%u post_bit_count=%u\n",
424 c
->post_bit_error
.stat
[0].scale
= FE_SCALE_COUNTER
;
425 c
->post_bit_error
.stat
[0].uvalue
+= utmp1
;
426 c
->post_bit_count
.stat
[0].scale
= FE_SCALE_COUNTER
;
427 c
->post_bit_count
.stat
[0].uvalue
+= utmp2
;
429 c
->post_bit_error
.stat
[0].scale
= FE_SCALE_NOT_AVAILABLE
;
430 c
->post_bit_count
.stat
[0].scale
= FE_SCALE_NOT_AVAILABLE
;
434 if (*status
& FE_HAS_LOCK
) {
435 ret
= regmap_bulk_read(dev
->regmap
[0], 0xdd, buf
, 4);
439 utmp1
= buf
[0] << 8 | buf
[1] << 0;
440 utmp2
= buf
[2] << 8 | buf
[3] << 0;
441 dev_dbg(&client
->dev
, "block_error=%u block_count=%u\n",
444 c
->block_error
.stat
[0].scale
= FE_SCALE_COUNTER
;
445 c
->block_error
.stat
[0].uvalue
+= utmp1
;
446 c
->block_count
.stat
[0].scale
= FE_SCALE_COUNTER
;
447 c
->block_count
.stat
[0].uvalue
+= utmp2
;
449 c
->block_error
.stat
[0].scale
= FE_SCALE_NOT_AVAILABLE
;
450 c
->block_count
.stat
[0].scale
= FE_SCALE_NOT_AVAILABLE
;
455 dev_dbg(&client
->dev
, "failed=%d\n", ret
);
459 static int mn88473_init(struct dvb_frontend
*fe
)
461 struct i2c_client
*client
= fe
->demodulator_priv
;
462 struct mn88473_dev
*dev
= i2c_get_clientdata(client
);
463 struct dtv_frontend_properties
*c
= &fe
->dtv_property_cache
;
464 int ret
, len
, remain
;
466 const struct firmware
*fw
;
467 const char *name
= MN88473_FIRMWARE
;
469 dev_dbg(&client
->dev
, "\n");
471 /* Check if firmware is already running */
472 ret
= regmap_read(dev
->regmap
[0], 0xf5, &uitmp
);
479 /* Request the firmware, this will block and timeout */
480 ret
= request_firmware(&fw
, name
, &client
->dev
);
482 dev_err(&client
->dev
, "firmware file '%s' not found\n", name
);
486 dev_info(&client
->dev
, "downloading firmware from file '%s'\n", name
);
488 ret
= regmap_write(dev
->regmap
[0], 0xf5, 0x03);
490 goto err_release_firmware
;
492 for (remain
= fw
->size
; remain
> 0; remain
-= (dev
->i2c_wr_max
- 1)) {
493 len
= min(dev
->i2c_wr_max
- 1, remain
);
494 ret
= regmap_bulk_write(dev
->regmap
[0], 0xf6,
495 &fw
->data
[fw
->size
- remain
], len
);
497 dev_err(&client
->dev
, "firmware download failed %d\n",
499 goto err_release_firmware
;
503 release_firmware(fw
);
505 /* Parity check of firmware */
506 ret
= regmap_read(dev
->regmap
[0], 0xf8, &uitmp
);
511 dev_err(&client
->dev
, "firmware parity check failed\n");
516 ret
= regmap_write(dev
->regmap
[0], 0xf5, 0x00);
521 ret
= regmap_write(dev
->regmap
[2], 0x09, 0x08);
524 ret
= regmap_write(dev
->regmap
[2], 0x08, 0x1d);
530 /* init stats here to indicate which stats are supported */
532 c
->strength
.stat
[0].scale
= FE_SCALE_NOT_AVAILABLE
;
534 c
->cnr
.stat
[0].scale
= FE_SCALE_NOT_AVAILABLE
;
535 c
->post_bit_error
.len
= 1;
536 c
->post_bit_error
.stat
[0].scale
= FE_SCALE_NOT_AVAILABLE
;
537 c
->post_bit_count
.len
= 1;
538 c
->post_bit_count
.stat
[0].scale
= FE_SCALE_NOT_AVAILABLE
;
539 c
->block_error
.len
= 1;
540 c
->block_error
.stat
[0].scale
= FE_SCALE_NOT_AVAILABLE
;
541 c
->block_count
.len
= 1;
542 c
->block_count
.stat
[0].scale
= FE_SCALE_NOT_AVAILABLE
;
545 err_release_firmware
:
546 release_firmware(fw
);
548 dev_dbg(&client
->dev
, "failed=%d\n", ret
);
552 static int mn88473_sleep(struct dvb_frontend
*fe
)
554 struct i2c_client
*client
= fe
->demodulator_priv
;
555 struct mn88473_dev
*dev
= i2c_get_clientdata(client
);
558 dev_dbg(&client
->dev
, "\n");
562 ret
= regmap_write(dev
->regmap
[2], 0x05, 0x3e);
568 dev_dbg(&client
->dev
, "failed=%d\n", ret
);
572 static const struct dvb_frontend_ops mn88473_ops
= {
573 .delsys
= {SYS_DVBT
, SYS_DVBT2
, SYS_DVBC_ANNEX_A
},
575 .name
= "Panasonic MN88473",
576 .symbol_rate_min
= 1000000,
577 .symbol_rate_max
= 7200000,
578 .caps
= FE_CAN_FEC_1_2
|
591 FE_CAN_TRANSMISSION_MODE_AUTO
|
592 FE_CAN_GUARD_INTERVAL_AUTO
|
593 FE_CAN_HIERARCHY_AUTO
|
595 FE_CAN_2G_MODULATION
|
599 .get_tune_settings
= mn88473_get_tune_settings
,
601 .init
= mn88473_init
,
602 .sleep
= mn88473_sleep
,
604 .set_frontend
= mn88473_set_frontend
,
606 .read_status
= mn88473_read_status
,
609 static int mn88473_probe(struct i2c_client
*client
,
610 const struct i2c_device_id
*id
)
612 struct mn88473_config
*config
= client
->dev
.platform_data
;
613 struct mn88473_dev
*dev
;
616 static const struct regmap_config regmap_config
= {
621 dev_dbg(&client
->dev
, "\n");
623 /* Caller really need to provide pointer for frontend we create */
624 if (config
->fe
== NULL
) {
625 dev_err(&client
->dev
, "frontend pointer not defined\n");
630 dev
= kzalloc(sizeof(*dev
), GFP_KERNEL
);
636 if (config
->i2c_wr_max
)
637 dev
->i2c_wr_max
= config
->i2c_wr_max
;
639 dev
->i2c_wr_max
= ~0;
642 dev
->clk
= config
->xtal
;
645 dev
->client
[0] = client
;
646 dev
->regmap
[0] = regmap_init_i2c(dev
->client
[0], ®map_config
);
647 if (IS_ERR(dev
->regmap
[0])) {
648 ret
= PTR_ERR(dev
->regmap
[0]);
653 * Chip has three I2C addresses for different register banks. Used
654 * addresses are 0x18, 0x1a and 0x1c. We register two dummy clients,
655 * 0x1a and 0x1c, in order to get own I2C client for each register bank.
657 * Also, register bank 2 do not support sequential I/O. Only single
658 * register write or read is allowed to that bank.
660 dev
->client
[1] = i2c_new_dummy_device(client
->adapter
, 0x1a);
661 if (IS_ERR(dev
->client
[1])) {
662 ret
= PTR_ERR(dev
->client
[1]);
663 dev_err(&client
->dev
, "I2C registration failed\n");
664 goto err_regmap_0_regmap_exit
;
666 dev
->regmap
[1] = regmap_init_i2c(dev
->client
[1], ®map_config
);
667 if (IS_ERR(dev
->regmap
[1])) {
668 ret
= PTR_ERR(dev
->regmap
[1]);
669 goto err_client_1_i2c_unregister_device
;
671 i2c_set_clientdata(dev
->client
[1], dev
);
673 dev
->client
[2] = i2c_new_dummy_device(client
->adapter
, 0x1c);
674 if (IS_ERR(dev
->client
[2])) {
675 ret
= PTR_ERR(dev
->client
[2]);
676 dev_err(&client
->dev
, "2nd I2C registration failed\n");
677 goto err_regmap_1_regmap_exit
;
679 dev
->regmap
[2] = regmap_init_i2c(dev
->client
[2], ®map_config
);
680 if (IS_ERR(dev
->regmap
[2])) {
681 ret
= PTR_ERR(dev
->regmap
[2]);
682 goto err_client_2_i2c_unregister_device
;
684 i2c_set_clientdata(dev
->client
[2], dev
);
686 /* Check demod answers with correct chip id */
687 ret
= regmap_read(dev
->regmap
[2], 0xff, &uitmp
);
689 goto err_regmap_2_regmap_exit
;
691 dev_dbg(&client
->dev
, "chip id=%02x\n", uitmp
);
695 goto err_regmap_2_regmap_exit
;
698 /* Sleep because chip is active by default */
699 ret
= regmap_write(dev
->regmap
[2], 0x05, 0x3e);
701 goto err_regmap_2_regmap_exit
;
703 /* Create dvb frontend */
704 memcpy(&dev
->frontend
.ops
, &mn88473_ops
, sizeof(dev
->frontend
.ops
));
705 dev
->frontend
.demodulator_priv
= client
;
706 *config
->fe
= &dev
->frontend
;
707 i2c_set_clientdata(client
, dev
);
709 dev_info(&client
->dev
, "Panasonic MN88473 successfully identified\n");
712 err_regmap_2_regmap_exit
:
713 regmap_exit(dev
->regmap
[2]);
714 err_client_2_i2c_unregister_device
:
715 i2c_unregister_device(dev
->client
[2]);
716 err_regmap_1_regmap_exit
:
717 regmap_exit(dev
->regmap
[1]);
718 err_client_1_i2c_unregister_device
:
719 i2c_unregister_device(dev
->client
[1]);
720 err_regmap_0_regmap_exit
:
721 regmap_exit(dev
->regmap
[0]);
725 dev_dbg(&client
->dev
, "failed=%d\n", ret
);
729 static int mn88473_remove(struct i2c_client
*client
)
731 struct mn88473_dev
*dev
= i2c_get_clientdata(client
);
733 dev_dbg(&client
->dev
, "\n");
735 regmap_exit(dev
->regmap
[2]);
736 i2c_unregister_device(dev
->client
[2]);
738 regmap_exit(dev
->regmap
[1]);
739 i2c_unregister_device(dev
->client
[1]);
741 regmap_exit(dev
->regmap
[0]);
748 static const struct i2c_device_id mn88473_id_table
[] = {
752 MODULE_DEVICE_TABLE(i2c
, mn88473_id_table
);
754 static struct i2c_driver mn88473_driver
= {
757 .suppress_bind_attrs
= true,
759 .probe
= mn88473_probe
,
760 .remove
= mn88473_remove
,
761 .id_table
= mn88473_id_table
,
764 module_i2c_driver(mn88473_driver
);
766 MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
767 MODULE_DESCRIPTION("Panasonic MN88473 DVB-T/T2/C demodulator driver");
768 MODULE_LICENSE("GPL");
769 MODULE_FIRMWARE(MN88473_FIRMWARE
);