Merge tag 'io_uring-5.11-2021-01-16' of git://git.kernel.dk/linux-block
[linux/fpc-iii.git] / drivers / mtd / nand / raw / nand_esmt.c
blob4412c407aef3f7b55a7296e7453abf7212adc2f6
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (C) 2018 Toradex AG
5 * Author: Marcel Ziswiler <marcel.ziswiler@toradex.com>
6 */
8 #include <linux/mtd/rawnand.h>
9 #include "internals.h"
11 static void esmt_nand_decode_id(struct nand_chip *chip)
13 struct nand_device *base = &chip->base;
14 struct nand_ecc_props requirements = {};
16 nand_decode_ext_id(chip);
18 /* Extract ECC requirements from 5th id byte. */
19 if (chip->id.len >= 5 && nand_is_slc(chip)) {
20 requirements.step_size = 512;
21 switch (chip->id.data[4] & 0x3) {
22 case 0x0:
23 requirements.strength = 4;
24 break;
25 case 0x1:
26 requirements.strength = 2;
27 break;
28 case 0x2:
29 requirements.strength = 1;
30 break;
31 default:
32 WARN(1, "Could not get ECC info");
33 requirements.step_size = 0;
34 break;
38 nanddev_set_ecc_requirements(base, &requirements);
41 static int esmt_nand_init(struct nand_chip *chip)
43 if (nand_is_slc(chip))
45 * It is known that some ESMT SLC NANDs have been shipped
46 * with the factory bad block markers in the first or last page
47 * of the block, instead of the first or second page. To be on
48 * the safe side, let's check all three locations.
50 chip->options |= NAND_BBM_FIRSTPAGE | NAND_BBM_SECONDPAGE |
51 NAND_BBM_LASTPAGE;
53 return 0;
56 const struct nand_manufacturer_ops esmt_nand_manuf_ops = {
57 .detect = esmt_nand_decode_id,
58 .init = esmt_nand_init,