1 // SPDX-License-Identifier: GPL-2.0-only
2 /* cpwd.c - driver implementation for hardware watchdog
3 * timers found on Sun Microsystems CP1400 and CP1500 boards.
5 * This device supports both the generic Linux watchdog
6 * interface and Solaris-compatible ioctls as best it is
9 * NOTE: CP1400 systems appear to have a defective intr_mask
10 * register on the PLD, preventing the disabling of
11 * timer interrupts. We use a timer to periodically
12 * reset 'stopped' watchdogs on affected platforms.
14 * Copyright (c) 2000 Eric Brower (ebrower@usa.net)
15 * Copyright (C) 2008 David S. Miller <davem@davemloft.net>
18 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
20 #include <linux/kernel.h>
21 #include <linux/module.h>
23 #include <linux/errno.h>
24 #include <linux/major.h>
25 #include <linux/miscdevice.h>
26 #include <linux/interrupt.h>
27 #include <linux/ioport.h>
28 #include <linux/timer.h>
29 #include <linux/compat.h>
30 #include <linux/slab.h>
31 #include <linux/mutex.h>
34 #include <linux/of_device.h>
35 #include <linux/uaccess.h>
38 #include <asm/watchdog.h>
40 #define DRIVER_NAME "cpwd"
42 #define WD_OBPNAME "watchdog"
43 #define WD_BADMODEL "SUNW,501-5336"
44 #define WD_BTIMEOUT (jiffies + (HZ * 1000))
45 #define WD_BLIMIT 0xFFFF
51 /* Internal driver definitions. */
60 #define WD_STAT_INIT 0x01 /* Watchdog timer is initialized */
61 #define WD_STAT_BSTOP 0x02 /* Watchdog timer is brokenstopped */
62 #define WD_STAT_SVCD 0x04 /* Watchdog interrupt occurred */
64 /* Register value definitions
66 #define WD0_INTR_MASK 0x01 /* Watchdog device interrupt masks */
67 #define WD1_INTR_MASK 0x02
68 #define WD2_INTR_MASK 0x04
70 #define WD_S_RUNNING 0x01 /* Watchdog device status running */
71 #define WD_S_EXPIRED 0x02 /* Watchdog device status expired */
79 unsigned long timeout
;
86 struct miscdevice misc
;
94 static DEFINE_MUTEX(cpwd_mutex
);
95 static struct cpwd
*cpwd_device
;
97 /* Sun uses Altera PLD EPF8820ATC144-4
98 * providing three hardware watchdogs:
100 * 1) RIC - sends an interrupt when triggered
101 * 2) XIR - asserts XIR_B_RESET when triggered, resets CPU
102 * 3) POR - asserts POR_B_RESET when triggered, resets CPU, backplane, board
104 *** Timer register block definition (struct wd_timer_regblk)
106 * dcntr and limit registers (halfword access):
107 * -------------------
108 * | 15 | ...| 1 | 0 |
109 * -------------------
111 * -------------------
112 * dcntr - Current 16-bit downcounter value.
113 * When downcounter reaches '0' watchdog expires.
114 * Reading this register resets downcounter with
116 * limit - 16-bit countdown value in 1/10th second increments.
117 * Writing this register begins countdown with input value.
118 * Reading from this register does not affect counter.
119 * NOTES: After watchdog reset, dcntr and limit contain '1'
121 * status register (byte access):
122 * ---------------------------
123 * | 7 | ... | 2 | 1 | 0 |
124 * --------------+------------
125 * |- UNUSED -| EXP | RUN |
126 * ---------------------------
127 * status- Bit 0 - Watchdog is running
128 * Bit 1 - Watchdog has expired
130 *** PLD register block definition (struct wd_pld_regblk)
132 * intr_mask register (byte access):
133 * ---------------------------------
134 * | 7 | ... | 3 | 2 | 1 | 0 |
135 * +-------------+------------------
136 * |- UNUSED -| WD3 | WD2 | WD1 |
137 * ---------------------------------
138 * WD3 - 1 == Interrupt disabled for watchdog 3
139 * WD2 - 1 == Interrupt disabled for watchdog 2
140 * WD1 - 1 == Interrupt disabled for watchdog 1
142 * pld_status register (byte access):
143 * UNKNOWN, MAGICAL MYSTERY REGISTER
146 #define WD_TIMER_REGSZ 16
148 #define WD1_OFF (WD_TIMER_REGSZ * 1)
149 #define WD2_OFF (WD_TIMER_REGSZ * 2)
150 #define PLD_OFF (WD_TIMER_REGSZ * 3)
152 #define WD_DCNTR 0x00
153 #define WD_LIMIT 0x04
154 #define WD_STATUS 0x08
156 #define PLD_IMASK (PLD_OFF + 0x00)
157 #define PLD_STATUS (PLD_OFF + 0x04)
159 static struct timer_list cpwd_timer
;
161 static int wd0_timeout
;
162 static int wd1_timeout
;
163 static int wd2_timeout
;
165 module_param(wd0_timeout
, int, 0);
166 MODULE_PARM_DESC(wd0_timeout
, "Default watchdog0 timeout in 1/10secs");
167 module_param(wd1_timeout
, int, 0);
168 MODULE_PARM_DESC(wd1_timeout
, "Default watchdog1 timeout in 1/10secs");
169 module_param(wd2_timeout
, int, 0);
170 MODULE_PARM_DESC(wd2_timeout
, "Default watchdog2 timeout in 1/10secs");
172 MODULE_AUTHOR("Eric Brower <ebrower@usa.net>");
173 MODULE_DESCRIPTION("Hardware watchdog driver for Sun Microsystems CP1400/1500");
174 MODULE_LICENSE("GPL");
175 MODULE_SUPPORTED_DEVICE("watchdog");
177 static void cpwd_writew(u16 val
, void __iomem
*addr
)
179 writew(cpu_to_le16(val
), addr
);
181 static u16
cpwd_readw(void __iomem
*addr
)
183 u16 val
= readw(addr
);
185 return le16_to_cpu(val
);
188 static void cpwd_writeb(u8 val
, void __iomem
*addr
)
193 static u8
cpwd_readb(void __iomem
*addr
)
198 /* Enable or disable watchdog interrupts
199 * Because of the CP1400 defect this should only be
200 * called during initialzation or by wd_[start|stop]timer()
202 * index - sub-device index, or -1 for 'all'
203 * enable - non-zero to enable interrupts, zero to disable
205 static void cpwd_toggleintr(struct cpwd
*p
, int index
, int enable
)
207 unsigned char curregs
= cpwd_readb(p
->regs
+ PLD_IMASK
);
208 unsigned char setregs
=
210 (WD0_INTR_MASK
| WD1_INTR_MASK
| WD2_INTR_MASK
) :
211 (p
->devs
[index
].intr_mask
);
213 if (enable
== WD_INTR_ON
)
218 cpwd_writeb(curregs
, p
->regs
+ PLD_IMASK
);
221 /* Restarts timer with maximum limit value and
222 * does not unset 'brokenstop' value.
224 static void cpwd_resetbrokentimer(struct cpwd
*p
, int index
)
226 cpwd_toggleintr(p
, index
, WD_INTR_ON
);
227 cpwd_writew(WD_BLIMIT
, p
->devs
[index
].regs
+ WD_LIMIT
);
230 /* Timer method called to reset stopped watchdogs--
231 * because of the PLD bug on CP1400, we cannot mask
232 * interrupts within the PLD so me must continually
233 * reset the timers ad infinitum.
235 static void cpwd_brokentimer(struct timer_list
*unused
)
237 struct cpwd
*p
= cpwd_device
;
240 /* kill a running timer instance, in case we
241 * were called directly instead of by kernel timer
243 if (timer_pending(&cpwd_timer
))
244 del_timer(&cpwd_timer
);
246 for (id
= 0; id
< WD_NUMDEVS
; id
++) {
247 if (p
->devs
[id
].runstatus
& WD_STAT_BSTOP
) {
249 cpwd_resetbrokentimer(p
, id
);
254 /* there is at least one timer brokenstopped-- reschedule */
255 cpwd_timer
.expires
= WD_BTIMEOUT
;
256 add_timer(&cpwd_timer
);
260 /* Reset countdown timer with 'limit' value and continue countdown.
261 * This will not start a stopped timer.
263 static void cpwd_pingtimer(struct cpwd
*p
, int index
)
265 if (cpwd_readb(p
->devs
[index
].regs
+ WD_STATUS
) & WD_S_RUNNING
)
266 cpwd_readw(p
->devs
[index
].regs
+ WD_DCNTR
);
269 /* Stop a running watchdog timer-- the timer actually keeps
270 * running, but the interrupt is masked so that no action is
271 * taken upon expiration.
273 static void cpwd_stoptimer(struct cpwd
*p
, int index
)
275 if (cpwd_readb(p
->devs
[index
].regs
+ WD_STATUS
) & WD_S_RUNNING
) {
276 cpwd_toggleintr(p
, index
, WD_INTR_OFF
);
279 p
->devs
[index
].runstatus
|= WD_STAT_BSTOP
;
280 cpwd_brokentimer(NULL
);
285 /* Start a watchdog timer with the specified limit value
286 * If the watchdog is running, it will be restarted with
287 * the provided limit value.
289 * This function will enable interrupts on the specified
292 static void cpwd_starttimer(struct cpwd
*p
, int index
)
295 p
->devs
[index
].runstatus
&= ~WD_STAT_BSTOP
;
297 p
->devs
[index
].runstatus
&= ~WD_STAT_SVCD
;
299 cpwd_writew(p
->devs
[index
].timeout
, p
->devs
[index
].regs
+ WD_LIMIT
);
300 cpwd_toggleintr(p
, index
, WD_INTR_ON
);
303 static int cpwd_getstatus(struct cpwd
*p
, int index
)
305 unsigned char stat
= cpwd_readb(p
->devs
[index
].regs
+ WD_STATUS
);
306 unsigned char intr
= cpwd_readb(p
->devs
[index
].regs
+ PLD_IMASK
);
307 unsigned char ret
= WD_STOPPED
;
309 /* determine STOPPED */
313 /* determine EXPIRED vs FREERUN vs RUNNING */
314 else if (WD_S_EXPIRED
& stat
) {
316 } else if (WD_S_RUNNING
& stat
) {
317 if (intr
& p
->devs
[index
].intr_mask
) {
320 /* Fudge WD_EXPIRED status for defective CP1400--
321 * IF timer is running
322 * AND brokenstop is set
323 * AND an interrupt has been serviced
326 * IF timer is running
327 * AND brokenstop is set
328 * AND no interrupt has been serviced
332 (p
->devs
[index
].runstatus
& WD_STAT_BSTOP
)) {
333 if (p
->devs
[index
].runstatus
& WD_STAT_SVCD
) {
336 /* we could as well pretend
346 /* determine SERVICED */
347 if (p
->devs
[index
].runstatus
& WD_STAT_SVCD
)
353 static irqreturn_t
cpwd_interrupt(int irq
, void *dev_id
)
355 struct cpwd
*p
= dev_id
;
357 /* Only WD0 will interrupt-- others are NMI and we won't
360 spin_lock_irq(&p
->lock
);
362 cpwd_stoptimer(p
, WD0_ID
);
363 p
->devs
[WD0_ID
].runstatus
|= WD_STAT_SVCD
;
365 spin_unlock_irq(&p
->lock
);
370 static int cpwd_open(struct inode
*inode
, struct file
*f
)
372 struct cpwd
*p
= cpwd_device
;
374 mutex_lock(&cpwd_mutex
);
375 switch (iminor(inode
)) {
382 mutex_unlock(&cpwd_mutex
);
386 /* Register IRQ on first open of device */
387 if (!p
->initialized
) {
388 if (request_irq(p
->irq
, &cpwd_interrupt
,
389 IRQF_SHARED
, DRIVER_NAME
, p
)) {
390 pr_err("Cannot register IRQ %d\n", p
->irq
);
391 mutex_unlock(&cpwd_mutex
);
394 p
->initialized
= true;
397 mutex_unlock(&cpwd_mutex
);
399 return stream_open(inode
, f
);
402 static int cpwd_release(struct inode
*inode
, struct file
*file
)
407 static long cpwd_ioctl(struct file
*file
, unsigned int cmd
, unsigned long arg
)
409 static const struct watchdog_info info
= {
410 .options
= WDIOF_SETTIMEOUT
,
411 .firmware_version
= 1,
412 .identity
= DRIVER_NAME
,
414 void __user
*argp
= (void __user
*)arg
;
415 struct inode
*inode
= file_inode(file
);
416 int index
= iminor(inode
) - WD0_MINOR
;
417 struct cpwd
*p
= cpwd_device
;
421 /* Generic Linux IOCTLs */
422 case WDIOC_GETSUPPORT
:
423 if (copy_to_user(argp
, &info
, sizeof(struct watchdog_info
)))
427 case WDIOC_GETSTATUS
:
428 case WDIOC_GETBOOTSTATUS
:
429 if (put_user(0, (int __user
*)argp
))
433 case WDIOC_KEEPALIVE
:
434 cpwd_pingtimer(p
, index
);
437 case WDIOC_SETOPTIONS
:
438 if (copy_from_user(&setopt
, argp
, sizeof(unsigned int)))
441 if (setopt
& WDIOS_DISABLECARD
) {
444 cpwd_stoptimer(p
, index
);
445 } else if (setopt
& WDIOS_ENABLECARD
) {
446 cpwd_starttimer(p
, index
);
452 /* Solaris-compatible IOCTLs */
454 setopt
= cpwd_getstatus(p
, index
);
455 if (copy_to_user(argp
, &setopt
, sizeof(unsigned int)))
460 cpwd_starttimer(p
, index
);
467 cpwd_stoptimer(p
, index
);
477 static long cpwd_compat_ioctl(struct file
*file
, unsigned int cmd
, unsigned long arg
)
479 return cpwd_ioctl(file
, cmd
, (unsigned long)compat_ptr(arg
));
482 static ssize_t
cpwd_write(struct file
*file
, const char __user
*buf
,
483 size_t count
, loff_t
*ppos
)
485 struct inode
*inode
= file_inode(file
);
486 struct cpwd
*p
= cpwd_device
;
487 int index
= iminor(inode
);
490 cpwd_pingtimer(p
, index
);
497 static ssize_t
cpwd_read(struct file
*file
, char __user
*buffer
,
498 size_t count
, loff_t
*ppos
)
503 static const struct file_operations cpwd_fops
= {
504 .owner
= THIS_MODULE
,
505 .unlocked_ioctl
= cpwd_ioctl
,
506 .compat_ioctl
= cpwd_compat_ioctl
,
510 .release
= cpwd_release
,
514 static int cpwd_probe(struct platform_device
*op
)
516 struct device_node
*options
;
517 const char *str_prop
;
518 const void *prop_val
;
519 int i
, err
= -EINVAL
;
525 p
= devm_kzalloc(&op
->dev
, sizeof(*p
), GFP_KERNEL
);
529 p
->irq
= op
->archdata
.irqs
[0];
531 spin_lock_init(&p
->lock
);
533 p
->regs
= of_ioremap(&op
->resource
[0], 0,
534 4 * WD_TIMER_REGSZ
, DRIVER_NAME
);
536 pr_err("Unable to map registers\n");
540 options
= of_find_node_by_path("/options");
543 pr_err("Unable to find /options node\n");
547 prop_val
= of_get_property(options
, "watchdog-enable?", NULL
);
548 p
->enabled
= (prop_val
? true : false);
550 prop_val
= of_get_property(options
, "watchdog-reboot?", NULL
);
551 p
->reboot
= (prop_val
? true : false);
553 str_prop
= of_get_property(options
, "watchdog-timeout", NULL
);
555 p
->timeout
= simple_strtoul(str_prop
, NULL
, 10);
557 of_node_put(options
);
559 /* CP1400s seem to have broken PLD implementations-- the
560 * interrupt_mask register cannot be written, so no timer
561 * interrupts can be masked within the PLD.
563 str_prop
= of_get_property(op
->dev
.of_node
, "model", NULL
);
564 p
->broken
= (str_prop
&& !strcmp(str_prop
, WD_BADMODEL
));
567 cpwd_toggleintr(p
, -1, WD_INTR_OFF
);
569 for (i
= 0; i
< WD_NUMDEVS
; i
++) {
570 static const char *cpwd_names
[] = { "RIC", "XIR", "POR" };
571 static int *parms
[] = { &wd0_timeout
,
574 struct miscdevice
*mp
= &p
->devs
[i
].misc
;
576 mp
->minor
= WD0_MINOR
+ i
;
577 mp
->name
= cpwd_names
[i
];
578 mp
->fops
= &cpwd_fops
;
580 p
->devs
[i
].regs
= p
->regs
+ (i
* WD_TIMER_REGSZ
);
581 p
->devs
[i
].intr_mask
= (WD0_INTR_MASK
<< i
);
582 p
->devs
[i
].runstatus
&= ~WD_STAT_BSTOP
;
583 p
->devs
[i
].runstatus
|= WD_STAT_INIT
;
584 p
->devs
[i
].timeout
= p
->timeout
;
586 p
->devs
[i
].timeout
= *parms
[i
];
588 err
= misc_register(&p
->devs
[i
].misc
);
590 pr_err("Could not register misc device for dev %d\n",
597 timer_setup(&cpwd_timer
, cpwd_brokentimer
, 0);
598 cpwd_timer
.expires
= WD_BTIMEOUT
;
600 pr_info("PLD defect workaround enabled for model %s\n",
604 platform_set_drvdata(op
, p
);
609 for (i
--; i
>= 0; i
--)
610 misc_deregister(&p
->devs
[i
].misc
);
613 of_iounmap(&op
->resource
[0], p
->regs
, 4 * WD_TIMER_REGSZ
);
618 static int cpwd_remove(struct platform_device
*op
)
620 struct cpwd
*p
= platform_get_drvdata(op
);
623 for (i
= 0; i
< WD_NUMDEVS
; i
++) {
624 misc_deregister(&p
->devs
[i
].misc
);
627 cpwd_stoptimer(p
, i
);
628 if (p
->devs
[i
].runstatus
& WD_STAT_BSTOP
)
629 cpwd_resetbrokentimer(p
, i
);
634 del_timer_sync(&cpwd_timer
);
639 of_iounmap(&op
->resource
[0], p
->regs
, 4 * WD_TIMER_REGSZ
);
646 static const struct of_device_id cpwd_match
[] = {
652 MODULE_DEVICE_TABLE(of
, cpwd_match
);
654 static struct platform_driver cpwd_driver
= {
657 .of_match_table
= cpwd_match
,
660 .remove
= cpwd_remove
,
663 module_platform_driver(cpwd_driver
);