drivers/watchdog/f71808e_wdt.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /***************************************************************************
   3  *   Copyright (C) 2006 by Hans Edgington <hans@edgington.nl>              *
   4  *   Copyright (C) 2007-2009 Hans de Goede <hdegoede@redhat.com>           *
   5  *   Copyright (C) 2010 Giel van Schijndel <me@mortis.eu>                  *
   6  *                                                                         *
   7  ***************************************************************************/
   8
   9 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  10
  11 #include <linux/err.h>
  12 #include <linux/fs.h>
  13 #include <linux/init.h>
  14 #include <linux/io.h>
  15 #include <linux/ioport.h>
  16 #include <linux/miscdevice.h>
  17 #include <linux/module.h>
  18 #include <linux/mutex.h>
  19 #include <linux/notifier.h>
  20 #include <linux/reboot.h>
  21 #include <linux/uaccess.h>
  22 #include <linux/watchdog.h>
  23
  24 #define DRVNAME "f71808e_wdt"
  25
  26 #define SIO_F71808FG_LD_WDT     0x07    /* Watchdog timer logical device */
  27 #define SIO_UNLOCK_KEY          0x87    /* Key to enable Super-I/O */
  28 #define SIO_LOCK_KEY            0xAA    /* Key to disable Super-I/O */
  29
  30 #define SIO_REG_LDSEL           0x07    /* Logical device select */
  31 #define SIO_REG_DEVID           0x20    /* Device ID (2 bytes) */
  32 #define SIO_REG_DEVREV          0x22    /* Device revision */
  33 #define SIO_REG_MANID           0x23    /* Fintek ID (2 bytes) */
  34 #define SIO_REG_CLOCK_SEL       0x26    /* Clock select */
  35 #define SIO_REG_ROM_ADDR_SEL    0x27    /* ROM address select */
  36 #define SIO_F81866_REG_PORT_SEL 0x27    /* F81866 Multi-Function Register */
  37 #define SIO_REG_TSI_LEVEL_SEL   0x28    /* TSI Level select */
  38 #define SIO_REG_MFUNCT1         0x29    /* Multi function select 1 */
  39 #define SIO_REG_MFUNCT2         0x2a    /* Multi function select 2 */
  40 #define SIO_REG_MFUNCT3         0x2b    /* Multi function select 3 */
  41 #define SIO_F81866_REG_GPIO1    0x2c    /* F81866 GPIO1 Enable Register */
  42 #define SIO_REG_ENABLE          0x30    /* Logical device enable */
  43 #define SIO_REG_ADDR            0x60    /* Logical device address (2 bytes) */
  44
  45 #define SIO_FINTEK_ID           0x1934  /* Manufacturers ID */
  46 #define SIO_F71808_ID           0x0901  /* Chipset ID */
  47 #define SIO_F71858_ID           0x0507  /* Chipset ID */
  48 #define SIO_F71862_ID           0x0601  /* Chipset ID */
  49 #define SIO_F71868_ID           0x1106  /* Chipset ID */
  50 #define SIO_F71869_ID           0x0814  /* Chipset ID */
  51 #define SIO_F71869A_ID          0x1007  /* Chipset ID */
  52 #define SIO_F71882_ID           0x0541  /* Chipset ID */
  53 #define SIO_F71889_ID           0x0723  /* Chipset ID */
  54 #define SIO_F81803_ID           0x1210  /* Chipset ID */
  55 #define SIO_F81865_ID           0x0704  /* Chipset ID */
  56 #define SIO_F81866_ID           0x1010  /* Chipset ID */
  57
  58 #define F71808FG_REG_WDO_CONF           0xf0
  59 #define F71808FG_REG_WDT_CONF           0xf5
  60 #define F71808FG_REG_WD_TIME            0xf6
  61
  62 #define F71808FG_FLAG_WDOUT_EN          7
  63
  64 #define F71808FG_FLAG_WDTMOUT_STS       6
  65 #define F71808FG_FLAG_WD_EN             5
  66 #define F71808FG_FLAG_WD_PULSE          4
  67 #define F71808FG_FLAG_WD_UNIT           3
  68
  69 #define F81865_REG_WDO_CONF             0xfa
  70 #define F81865_FLAG_WDOUT_EN            0
  71
  72 /* Default values */
  73 #define WATCHDOG_TIMEOUT        60      /* 1 minute default timeout */
  74 #define WATCHDOG_MAX_TIMEOUT    (60 * 255)
  75 #define WATCHDOG_PULSE_WIDTH    125     /* 125 ms, default pulse width for
  76                                            watchdog signal */
  77 #define WATCHDOG_F71862FG_PIN   63      /* default watchdog reset output
  78                                            pin number 63 */
  79
  80 static unsigned short force_id;
  81 module_param(force_id, ushort, 0);
  82 MODULE_PARM_DESC(force_id, "Override the detected device ID");
  83
  84 static const int max_timeout = WATCHDOG_MAX_TIMEOUT;
  85 static int timeout = WATCHDOG_TIMEOUT;  /* default timeout in seconds */
  86 module_param(timeout, int, 0);
  87 MODULE_PARM_DESC(timeout,
  88         "Watchdog timeout in seconds. 1<= timeout <="
  89                         __MODULE_STRING(WATCHDOG_MAX_TIMEOUT) " (default="
  90                         __MODULE_STRING(WATCHDOG_TIMEOUT) ")");
  91
  92 static unsigned int pulse_width = WATCHDOG_PULSE_WIDTH;
  93 module_param(pulse_width, uint, 0);
  94 MODULE_PARM_DESC(pulse_width,
  95         "Watchdog signal pulse width. 0(=level), 1, 25, 30, 125, 150, 5000 or 6000 ms"
  96                         " (default=" __MODULE_STRING(WATCHDOG_PULSE_WIDTH) ")");
  97
  98 static unsigned int f71862fg_pin = WATCHDOG_F71862FG_PIN;
  99 module_param(f71862fg_pin, uint, 0);
 100 MODULE_PARM_DESC(f71862fg_pin,
 101         "Watchdog f71862fg reset output pin configuration. Choose pin 56 or 63"
 102                         " (default=" __MODULE_STRING(WATCHDOG_F71862FG_PIN)")");
 103
 104 static bool nowayout = WATCHDOG_NOWAYOUT;
 105 module_param(nowayout, bool, 0444);
 106 MODULE_PARM_DESC(nowayout, "Disable watchdog shutdown on close");
 107
 108 static unsigned int start_withtimeout;
 109 module_param(start_withtimeout, uint, 0);
 110 MODULE_PARM_DESC(start_withtimeout, "Start watchdog timer on module load with"
 111         " given initial timeout. Zero (default) disables this feature.");
 112
 113 enum chips { f71808fg, f71858fg, f71862fg, f71868, f71869, f71882fg, f71889fg,
 114              f81803, f81865, f81866};
 115
 116 static const char *f71808e_names[] = {
 117         "f71808fg",
 118         "f71858fg",
 119         "f71862fg",
 120         "f71868",
 121         "f71869",
 122         "f71882fg",
 123         "f71889fg",
 124         "f81803",
 125         "f81865",
 126         "f81866",
 127 };
 128
 129 /* Super-I/O Function prototypes */
 130 static inline int superio_inb(int base, int reg);
 131 static inline int superio_inw(int base, int reg);
 132 static inline void superio_outb(int base, int reg, u8 val);
 133 static inline void superio_set_bit(int base, int reg, int bit);
 134 static inline void superio_clear_bit(int base, int reg, int bit);
 135 static inline int superio_enter(int base);
 136 static inline void superio_select(int base, int ld);
 137 static inline void superio_exit(int base);
 138
 139 struct watchdog_data {
 140         unsigned short  sioaddr;
 141         enum chips      type;
 142         unsigned long   opened;
 143         struct mutex    lock;
 144         char            expect_close;
 145         struct watchdog_info ident;
 146
 147         unsigned short  timeout;
 148         u8              timer_val;      /* content for the wd_time register */
 149         char            minutes_mode;
 150         u8              pulse_val;      /* pulse width flag */
 151         char            pulse_mode;     /* enable pulse output mode? */
 152         char            caused_reboot;  /* last reboot was by the watchdog */
 153 };
 154
 155 static struct watchdog_data watchdog = {
 156         .lock = __MUTEX_INITIALIZER(watchdog.lock),
 157 };
 158
 159 /* Super I/O functions */
 160 static inline int superio_inb(int base, int reg)
 161 {
 162         outb(reg, base);
 163         return inb(base + 1);
 164 }
 165
 166 static int superio_inw(int base, int reg)
 167 {
 168         int val;
 169         val  = superio_inb(base, reg) << 8;
 170         val |= superio_inb(base, reg + 1);
 171         return val;
 172 }
 173
 174 static inline void superio_outb(int base, int reg, u8 val)
 175 {
 176         outb(reg, base);
 177         outb(val, base + 1);
 178 }
 179
 180 static inline void superio_set_bit(int base, int reg, int bit)
 181 {
 182         unsigned long val = superio_inb(base, reg);
 183         __set_bit(bit, &val);
 184         superio_outb(base, reg, val);
 185 }
 186
 187 static inline void superio_clear_bit(int base, int reg, int bit)
 188 {
 189         unsigned long val = superio_inb(base, reg);
 190         __clear_bit(bit, &val);
 191         superio_outb(base, reg, val);
 192 }
 193
 194 static inline int superio_enter(int base)
 195 {
 196         /* Don't step on other drivers' I/O space by accident */
 197         if (!request_muxed_region(base, 2, DRVNAME)) {
 198                 pr_err("I/O address 0x%04x already in use\n", (int)base);
 199                 return -EBUSY;
 200         }
 201
 202         /* according to the datasheet the key must be sent twice! */
 203         outb(SIO_UNLOCK_KEY, base);
 204         outb(SIO_UNLOCK_KEY, base);
 205
 206         return 0;
 207 }
 208
 209 static inline void superio_select(int base, int ld)
 210 {
 211         outb(SIO_REG_LDSEL, base);
 212         outb(ld, base + 1);
 213 }
 214
 215 static inline void superio_exit(int base)
 216 {
 217         outb(SIO_LOCK_KEY, base);
 218         release_region(base, 2);
 219 }
 220
 221 static int watchdog_set_timeout(int timeout)
 222 {
 223         if (timeout <= 0
 224          || timeout >  max_timeout) {
 225                 pr_err("watchdog timeout out of range\n");
 226                 return -EINVAL;
 227         }
 228
 229         mutex_lock(&watchdog.lock);
 230
 231         watchdog.timeout = timeout;
 232         if (timeout > 0xff) {
 233                 watchdog.timer_val = DIV_ROUND_UP(timeout, 60);
 234                 watchdog.minutes_mode = true;
 235         } else {
 236                 watchdog.timer_val = timeout;
 237                 watchdog.minutes_mode = false;
 238         }
 239
 240         mutex_unlock(&watchdog.lock);
 241
 242         return 0;
 243 }
 244
 245 static int watchdog_set_pulse_width(unsigned int pw)
 246 {
 247         int err = 0;
 248         unsigned int t1 = 25, t2 = 125, t3 = 5000;
 249
 250         if (watchdog.type == f71868) {
 251                 t1 = 30;
 252                 t2 = 150;
 253                 t3 = 6000;
 254         }
 255
 256         mutex_lock(&watchdog.lock);
 257
 258         if        (pw <=  1) {
 259                 watchdog.pulse_val = 0;
 260         } else if (pw <= t1) {
 261                 watchdog.pulse_val = 1;
 262         } else if (pw <= t2) {
 263                 watchdog.pulse_val = 2;
 264         } else if (pw <= t3) {
 265                 watchdog.pulse_val = 3;
 266         } else {
 267                 pr_err("pulse width out of range\n");
 268                 err = -EINVAL;
 269                 goto exit_unlock;
 270         }
 271
 272         watchdog.pulse_mode = pw;
 273
 274 exit_unlock:
 275         mutex_unlock(&watchdog.lock);
 276         return err;
 277 }
 278
 279 static int watchdog_keepalive(void)
 280 {
 281         int err = 0;
 282
 283         mutex_lock(&watchdog.lock);
 284         err = superio_enter(watchdog.sioaddr);
 285         if (err)
 286                 goto exit_unlock;
 287         superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
 288
 289         if (watchdog.minutes_mode)
 290                 /* select minutes for timer units */
 291                 superio_set_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
 292                                 F71808FG_FLAG_WD_UNIT);
 293         else
 294                 /* select seconds for timer units */
 295                 superio_clear_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
 296                                 F71808FG_FLAG_WD_UNIT);
 297
 298         /* Set timer value */
 299         superio_outb(watchdog.sioaddr, F71808FG_REG_WD_TIME,
 300                            watchdog.timer_val);
 301
 302         superio_exit(watchdog.sioaddr);
 303
 304 exit_unlock:
 305         mutex_unlock(&watchdog.lock);
 306         return err;
 307 }
 308
 309 static int watchdog_start(void)
 310 {
 311         int err;
 312         u8 tmp;
 313
 314         /* Make sure we don't die as soon as the watchdog is enabled below */
 315         err = watchdog_keepalive();
 316         if (err)
 317                 return err;
 318
 319         mutex_lock(&watchdog.lock);
 320         err = superio_enter(watchdog.sioaddr);
 321         if (err)
 322                 goto exit_unlock;
 323         superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
 324
 325         /* Watchdog pin configuration */
 326         switch (watchdog.type) {
 327         case f71808fg:
 328                 /* Set pin 21 to GPIO23/WDTRST#, then to WDTRST# */
 329                 superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT2, 3);
 330                 superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT3, 3);
 331                 break;
 332
 333         case f71862fg:
 334                 if (f71862fg_pin == 63) {
 335                         /* SPI must be disabled first to use this pin! */
 336                         superio_clear_bit(watchdog.sioaddr, SIO_REG_ROM_ADDR_SEL, 6);
 337                         superio_set_bit(watchdog.sioaddr, SIO_REG_MFUNCT3, 4);
 338                 } else if (f71862fg_pin == 56) {
 339                         superio_set_bit(watchdog.sioaddr, SIO_REG_MFUNCT1, 1);
 340                 }
 341                 break;
 342
 343         case f71868:
 344         case f71869:
 345                 /* GPIO14 --> WDTRST# */
 346                 superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT1, 4);
 347                 break;
 348
 349         case f71882fg:
 350                 /* Set pin 56 to WDTRST# */
 351                 superio_set_bit(watchdog.sioaddr, SIO_REG_MFUNCT1, 1);
 352                 break;
 353
 354         case f71889fg:
 355                 /* set pin 40 to WDTRST# */
 356                 superio_outb(watchdog.sioaddr, SIO_REG_MFUNCT3,
 357                         superio_inb(watchdog.sioaddr, SIO_REG_MFUNCT3) & 0xcf);
 358                 break;
 359
 360         case f81803:
 361                 /* Enable TSI Level register bank */
 362                 superio_clear_bit(watchdog.sioaddr, SIO_REG_CLOCK_SEL, 3);
 363                 /* Set pin 27 to WDTRST# */
 364                 superio_outb(watchdog.sioaddr, SIO_REG_TSI_LEVEL_SEL, 0x5f &
 365                         superio_inb(watchdog.sioaddr, SIO_REG_TSI_LEVEL_SEL));
 366                 break;
 367
 368         case f81865:
 369                 /* Set pin 70 to WDTRST# */
 370                 superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT3, 5);
 371                 break;
 372
 373         case f81866:
 374                 /*
 375                  * GPIO1 Control Register when 27h BIT3:2 = 01 & BIT0 = 0.
 376                  * The PIN 70(GPIO15/WDTRST) is controlled by 2Ch:
 377                  *     BIT5: 0 -> WDTRST#
 378                  *           1 -> GPIO15
 379                  */
 380                 tmp = superio_inb(watchdog.sioaddr, SIO_F81866_REG_PORT_SEL);
 381                 tmp &= ~(BIT(3) | BIT(0));
 382                 tmp |= BIT(2);
 383                 superio_outb(watchdog.sioaddr, SIO_F81866_REG_PORT_SEL, tmp);
 384
 385                 superio_clear_bit(watchdog.sioaddr, SIO_F81866_REG_GPIO1, 5);
 386                 break;
 387
 388         default:
 389                 /*
 390                  * 'default' label to shut up the compiler and catch
 391                  * programmer errors
 392                  */
 393                 err = -ENODEV;
 394                 goto exit_superio;
 395         }
 396
 397         superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
 398         superio_set_bit(watchdog.sioaddr, SIO_REG_ENABLE, 0);
 399
 400         if (watchdog.type == f81865 || watchdog.type == f81866)
 401                 superio_set_bit(watchdog.sioaddr, F81865_REG_WDO_CONF,
 402                                 F81865_FLAG_WDOUT_EN);
 403         else
 404                 superio_set_bit(watchdog.sioaddr, F71808FG_REG_WDO_CONF,
 405                                 F71808FG_FLAG_WDOUT_EN);
 406
 407         superio_set_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
 408                         F71808FG_FLAG_WD_EN);
 409
 410         if (watchdog.pulse_mode) {
 411                 /* Select "pulse" output mode with given duration */
 412                 u8 wdt_conf = superio_inb(watchdog.sioaddr,
 413                                 F71808FG_REG_WDT_CONF);
 414
 415                 /* Set WD_PSWIDTH bits (1:0) */
 416                 wdt_conf = (wdt_conf & 0xfc) | (watchdog.pulse_val & 0x03);
 417                 /* Set WD_PULSE to "pulse" mode */
 418                 wdt_conf |= BIT(F71808FG_FLAG_WD_PULSE);
 419
 420                 superio_outb(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
 421                                 wdt_conf);
 422         } else {
 423                 /* Select "level" output mode */
 424                 superio_clear_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
 425                                 F71808FG_FLAG_WD_PULSE);
 426         }
 427
 428 exit_superio:
 429         superio_exit(watchdog.sioaddr);
 430 exit_unlock:
 431         mutex_unlock(&watchdog.lock);
 432
 433         return err;
 434 }
 435
 436 static int watchdog_stop(void)
 437 {
 438         int err = 0;
 439
 440         mutex_lock(&watchdog.lock);
 441         err = superio_enter(watchdog.sioaddr);
 442         if (err)
 443                 goto exit_unlock;
 444         superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
 445
 446         superio_clear_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
 447                         F71808FG_FLAG_WD_EN);
 448
 449         superio_exit(watchdog.sioaddr);
 450
 451 exit_unlock:
 452         mutex_unlock(&watchdog.lock);
 453
 454         return err;
 455 }
 456
 457 static int watchdog_get_status(void)
 458 {
 459         int status = 0;
 460
 461         mutex_lock(&watchdog.lock);
 462         status = (watchdog.caused_reboot) ? WDIOF_CARDRESET : 0;
 463         mutex_unlock(&watchdog.lock);
 464
 465         return status;
 466 }
 467
 468 static bool watchdog_is_running(void)
 469 {
 470         /*
 471          * if we fail to determine the watchdog's status assume it to be
 472          * running to be on the safe side
 473          */
 474         bool is_running = true;
 475
 476         mutex_lock(&watchdog.lock);
 477         if (superio_enter(watchdog.sioaddr))
 478                 goto exit_unlock;
 479         superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
 480
 481         is_running = (superio_inb(watchdog.sioaddr, SIO_REG_ENABLE) & BIT(0))
 482                 && (superio_inb(watchdog.sioaddr, F71808FG_REG_WDT_CONF)
 483                         & BIT(F71808FG_FLAG_WD_EN));
 484
 485         superio_exit(watchdog.sioaddr);
 486
 487 exit_unlock:
 488         mutex_unlock(&watchdog.lock);
 489         return is_running;
 490 }
 491
 492 /* /dev/watchdog api */
 493
 494 static int watchdog_open(struct inode *inode, struct file *file)
 495 {
 496         int err;
 497
 498         /* If the watchdog is alive we don't need to start it again */
 499         if (test_and_set_bit(0, &watchdog.opened))
 500                 return -EBUSY;
 501
 502         err = watchdog_start();
 503         if (err) {
 504                 clear_bit(0, &watchdog.opened);
 505                 return err;
 506         }
 507
 508         if (nowayout)
 509                 __module_get(THIS_MODULE);
 510
 511         watchdog.expect_close = 0;
 512         return stream_open(inode, file);
 513 }
 514
 515 static int watchdog_release(struct inode *inode, struct file *file)
 516 {
 517         clear_bit(0, &watchdog.opened);
 518
 519         if (!watchdog.expect_close) {
 520                 watchdog_keepalive();
 521                 pr_crit("Unexpected close, not stopping watchdog!\n");
 522         } else if (!nowayout) {
 523                 watchdog_stop();
 524         }
 525         return 0;
 526 }
 527
 528 /*
 529  *      watchdog_write:
 530  *      @file: file handle to the watchdog
 531  *      @buf: buffer to write
 532  *      @count: count of bytes
 533  *      @ppos: pointer to the position to write. No seeks allowed
 534  *
 535  *      A write to a watchdog device is defined as a keepalive signal. Any
 536  *      write of data will do, as we we don't define content meaning.
 537  */
 538
 539 static ssize_t watchdog_write(struct file *file, const char __user *buf,
 540                             size_t count, loff_t *ppos)
 541 {
 542         if (count) {
 543                 if (!nowayout) {
 544                         size_t i;
 545
 546                         /* In case it was set long ago */
 547                         bool expect_close = false;
 548
 549                         for (i = 0; i != count; i++) {
 550                                 char c;
 551                                 if (get_user(c, buf + i))
 552                                         return -EFAULT;
 553                                 if (c == 'V')
 554                                         expect_close = true;
 555                         }
 556
 557                         /* Properly order writes across fork()ed processes */
 558                         mutex_lock(&watchdog.lock);
 559                         watchdog.expect_close = expect_close;
 560                         mutex_unlock(&watchdog.lock);
 561                 }
 562
 563                 /* someone wrote to us, we should restart timer */
 564                 watchdog_keepalive();
 565         }
 566         return count;
 567 }
 568
 569 /*
 570  *      watchdog_ioctl:
 571  *      @inode: inode of the device
 572  *      @file: file handle to the device
 573  *      @cmd: watchdog command
 574  *      @arg: argument pointer
 575  *
 576  *      The watchdog API defines a common set of functions for all watchdogs
 577  *      according to their available features.
 578  */
 579 static long watchdog_ioctl(struct file *file, unsigned int cmd,
 580         unsigned long arg)
 581 {
 582         int status;
 583         int new_options;
 584         int new_timeout;
 585         union {
 586                 struct watchdog_info __user *ident;
 587                 int __user *i;
 588         } uarg;
 589
 590         uarg.i = (int __user *)arg;
 591
 592         switch (cmd) {
 593         case WDIOC_GETSUPPORT:
 594                 return copy_to_user(uarg.ident, &watchdog.ident,
 595                         sizeof(watchdog.ident)) ? -EFAULT : 0;
 596
 597         case WDIOC_GETSTATUS:
 598                 status = watchdog_get_status();
 599                 if (status < 0)
 600                         return status;
 601                 return put_user(status, uarg.i);
 602
 603         case WDIOC_GETBOOTSTATUS:
 604                 return put_user(0, uarg.i);
 605
 606         case WDIOC_SETOPTIONS:
 607                 if (get_user(new_options, uarg.i))
 608                         return -EFAULT;
 609
 610                 if (new_options & WDIOS_DISABLECARD)
 611                         watchdog_stop();
 612
 613                 if (new_options & WDIOS_ENABLECARD)
 614                         return watchdog_start();
 615                 fallthrough;
 616
 617         case WDIOC_KEEPALIVE:
 618                 watchdog_keepalive();
 619                 return 0;
 620
 621         case WDIOC_SETTIMEOUT:
 622                 if (get_user(new_timeout, uarg.i))
 623                         return -EFAULT;
 624
 625                 if (watchdog_set_timeout(new_timeout))
 626                         return -EINVAL;
 627
 628                 watchdog_keepalive();
 629                 fallthrough;
 630
 631         case WDIOC_GETTIMEOUT:
 632                 return put_user(watchdog.timeout, uarg.i);
 633
 634         default:
 635                 return -ENOTTY;
 636
 637         }
 638 }
 639
 640 static int watchdog_notify_sys(struct notifier_block *this, unsigned long code,
 641         void *unused)
 642 {
 643         if (code == SYS_DOWN || code == SYS_HALT)
 644                 watchdog_stop();
 645         return NOTIFY_DONE;
 646 }
 647
 648 static const struct file_operations watchdog_fops = {
 649         .owner          = THIS_MODULE,
 650         .llseek         = no_llseek,
 651         .open           = watchdog_open,
 652         .release        = watchdog_release,
 653         .write          = watchdog_write,
 654         .unlocked_ioctl = watchdog_ioctl,
 655         .compat_ioctl   = compat_ptr_ioctl,
 656 };
 657
 658 static struct miscdevice watchdog_miscdev = {
 659         .minor          = WATCHDOG_MINOR,
 660         .name           = "watchdog",
 661         .fops           = &watchdog_fops,
 662 };
 663
 664 static struct notifier_block watchdog_notifier = {
 665         .notifier_call = watchdog_notify_sys,
 666 };
 667
 668 static int __init watchdog_init(int sioaddr)
 669 {
 670         int wdt_conf, err = 0;
 671
 672         /* No need to lock watchdog.lock here because no entry points
 673          * into the module have been registered yet.
 674          */
 675         watchdog.sioaddr = sioaddr;
 676         watchdog.ident.options = WDIOF_MAGICCLOSE
 677                                 | WDIOF_KEEPALIVEPING
 678                                 | WDIOF_CARDRESET;
 679
 680         snprintf(watchdog.ident.identity,
 681                 sizeof(watchdog.ident.identity), "%s watchdog",
 682                 f71808e_names[watchdog.type]);
 683
 684         err = superio_enter(sioaddr);
 685         if (err)
 686                 return err;
 687         superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
 688
 689         wdt_conf = superio_inb(sioaddr, F71808FG_REG_WDT_CONF);
 690         watchdog.caused_reboot = wdt_conf & BIT(F71808FG_FLAG_WDTMOUT_STS);
 691
 692         /*
 693          * We don't want WDTMOUT_STS to stick around till regular reboot.
 694          * Write 1 to the bit to clear it to zero.
 695          */
 696         superio_outb(sioaddr, F71808FG_REG_WDT_CONF,
 697                      wdt_conf | BIT(F71808FG_FLAG_WDTMOUT_STS));
 698
 699         superio_exit(sioaddr);
 700
 701         err = watchdog_set_timeout(timeout);
 702         if (err)
 703                 return err;
 704         err = watchdog_set_pulse_width(pulse_width);
 705         if (err)
 706                 return err;
 707
 708         err = register_reboot_notifier(&watchdog_notifier);
 709         if (err)
 710                 return err;
 711
 712         err = misc_register(&watchdog_miscdev);
 713         if (err) {
 714                 pr_err("cannot register miscdev on minor=%d\n",
 715                        watchdog_miscdev.minor);
 716                 goto exit_reboot;
 717         }
 718
 719         if (start_withtimeout) {
 720                 if (start_withtimeout <= 0
 721                  || start_withtimeout >  max_timeout) {
 722                         pr_err("starting timeout out of range\n");
 723                         err = -EINVAL;
 724                         goto exit_miscdev;
 725                 }
 726
 727                 err = watchdog_start();
 728                 if (err) {
 729                         pr_err("cannot start watchdog timer\n");
 730                         goto exit_miscdev;
 731                 }
 732
 733                 mutex_lock(&watchdog.lock);
 734                 err = superio_enter(sioaddr);
 735                 if (err)
 736                         goto exit_unlock;
 737                 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
 738
 739                 if (start_withtimeout > 0xff) {
 740                         /* select minutes for timer units */
 741                         superio_set_bit(sioaddr, F71808FG_REG_WDT_CONF,
 742                                 F71808FG_FLAG_WD_UNIT);
 743                         superio_outb(sioaddr, F71808FG_REG_WD_TIME,
 744                                 DIV_ROUND_UP(start_withtimeout, 60));
 745                 } else {
 746                         /* select seconds for timer units */
 747                         superio_clear_bit(sioaddr, F71808FG_REG_WDT_CONF,
 748                                 F71808FG_FLAG_WD_UNIT);
 749                         superio_outb(sioaddr, F71808FG_REG_WD_TIME,
 750                                 start_withtimeout);
 751                 }
 752
 753                 superio_exit(sioaddr);
 754                 mutex_unlock(&watchdog.lock);
 755
 756                 if (nowayout)
 757                         __module_get(THIS_MODULE);
 758
 759                 pr_info("watchdog started with initial timeout of %u sec\n",
 760                         start_withtimeout);
 761         }
 762
 763         return 0;
 764
 765 exit_unlock:
 766         mutex_unlock(&watchdog.lock);
 767 exit_miscdev:
 768         misc_deregister(&watchdog_miscdev);
 769 exit_reboot:
 770         unregister_reboot_notifier(&watchdog_notifier);
 771
 772         return err;
 773 }
 774
 775 static int __init f71808e_find(int sioaddr)
 776 {
 777         u16 devid;
 778         int err = superio_enter(sioaddr);
 779         if (err)
 780                 return err;
 781
 782         devid = superio_inw(sioaddr, SIO_REG_MANID);
 783         if (devid != SIO_FINTEK_ID) {
 784                 pr_debug("Not a Fintek device\n");
 785                 err = -ENODEV;
 786                 goto exit;
 787         }
 788
 789         devid = force_id ? force_id : superio_inw(sioaddr, SIO_REG_DEVID);
 790         switch (devid) {
 791         case SIO_F71808_ID:
 792                 watchdog.type = f71808fg;
 793                 break;
 794         case SIO_F71862_ID:
 795                 watchdog.type = f71862fg;
 796                 break;
 797         case SIO_F71868_ID:
 798                 watchdog.type = f71868;
 799                 break;
 800         case SIO_F71869_ID:
 801         case SIO_F71869A_ID:
 802                 watchdog.type = f71869;
 803                 break;
 804         case SIO_F71882_ID:
 805                 watchdog.type = f71882fg;
 806                 break;
 807         case SIO_F71889_ID:
 808                 watchdog.type = f71889fg;
 809                 break;
 810         case SIO_F71858_ID:
 811                 /* Confirmed (by datasheet) not to have a watchdog. */
 812                 err = -ENODEV;
 813                 goto exit;
 814         case SIO_F81803_ID:
 815                 watchdog.type = f81803;
 816                 break;
 817         case SIO_F81865_ID:
 818                 watchdog.type = f81865;
 819                 break;
 820         case SIO_F81866_ID:
 821                 watchdog.type = f81866;
 822                 break;
 823         default:
 824                 pr_info("Unrecognized Fintek device: %04x\n",
 825                         (unsigned int)devid);
 826                 err = -ENODEV;
 827                 goto exit;
 828         }
 829
 830         pr_info("Found %s watchdog chip, revision %d\n",
 831                 f71808e_names[watchdog.type],
 832                 (int)superio_inb(sioaddr, SIO_REG_DEVREV));
 833 exit:
 834         superio_exit(sioaddr);
 835         return err;
 836 }
 837
 838 static int __init f71808e_init(void)
 839 {
 840         static const unsigned short addrs[] = { 0x2e, 0x4e };
 841         int err = -ENODEV;
 842         int i;
 843
 844         if (f71862fg_pin != 63 && f71862fg_pin != 56) {
 845                 pr_err("Invalid argument f71862fg_pin=%d\n", f71862fg_pin);
 846                 return -EINVAL;
 847         }
 848
 849         for (i = 0; i < ARRAY_SIZE(addrs); i++) {
 850                 err = f71808e_find(addrs[i]);
 851                 if (err == 0)
 852                         break;
 853         }
 854         if (i == ARRAY_SIZE(addrs))
 855                 return err;
 856
 857         return watchdog_init(addrs[i]);
 858 }
 859
 860 static void __exit f71808e_exit(void)
 861 {
 862         if (watchdog_is_running()) {
 863                 pr_warn("Watchdog timer still running, stopping it\n");
 864                 watchdog_stop();
 865         }
 866         misc_deregister(&watchdog_miscdev);
 867         unregister_reboot_notifier(&watchdog_notifier);
 868 }
 869
 870 MODULE_DESCRIPTION("F71808E Watchdog Driver");
 871 MODULE_AUTHOR("Giel van Schijndel <me@mortis.eu>");
 872 MODULE_LICENSE("GPL");
 873
 874 module_init(f71808e_init);
 875 module_exit(f71808e_exit);