1 // SPDX-License-Identifier: GPL-2.0-only
3 * drivers/char/watchdog/iop_wdt.c
5 * WDT driver for Intel I/O Processors
6 * Copyright (C) 2005, Intel Corporation.
8 * Based on ixp4xx driver, Copyright 2004 (c) MontaVista, Software, Inc.
10 * Curt E Bruns <curt.e.bruns@intel.com>
11 * Peter Milne <peter.milne@d-tacq.com>
12 * Dan Williams <dan.j.williams@intel.com>
15 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
17 #include <linux/module.h>
18 #include <linux/kernel.h>
20 #include <linux/init.h>
21 #include <linux/device.h>
22 #include <linux/miscdevice.h>
23 #include <linux/watchdog.h>
24 #include <linux/uaccess.h>
25 #include <mach/hardware.h>
27 static bool nowayout
= WATCHDOG_NOWAYOUT
;
28 static unsigned long wdt_status
;
29 static unsigned long boot_status
;
30 static DEFINE_SPINLOCK(wdt_lock
);
33 #define WDT_OK_TO_CLOSE 1
36 static unsigned long iop_watchdog_timeout(void)
38 return (0xffffffffUL
/ get_iop_tick_rate());
42 * wdt_supports_disable - determine if we are accessing a iop13xx watchdog
43 * or iop3xx by whether it has a disable command
45 static int wdt_supports_disable(void)
49 if (IOP_WDTCR_EN_ARM
!= IOP_WDTCR_DIS_ARM
)
57 static void wdt_enable(void)
59 /* Arm and enable the Timer to starting counting down from 0xFFFF.FFFF
60 * Takes approx. 10.7s to timeout
63 write_wdtcr(IOP_WDTCR_EN_ARM
);
64 write_wdtcr(IOP_WDTCR_EN
);
65 spin_unlock(&wdt_lock
);
68 /* returns 0 if the timer was successfully disabled */
69 static int wdt_disable(void)
72 if (wdt_supports_disable()) {
74 write_wdtcr(IOP_WDTCR_DIS_ARM
);
75 write_wdtcr(IOP_WDTCR_DIS
);
76 clear_bit(WDT_ENABLED
, &wdt_status
);
77 spin_unlock(&wdt_lock
);
78 pr_info("Disabled\n");
84 static int iop_wdt_open(struct inode
*inode
, struct file
*file
)
86 if (test_and_set_bit(WDT_IN_USE
, &wdt_status
))
89 clear_bit(WDT_OK_TO_CLOSE
, &wdt_status
);
91 set_bit(WDT_ENABLED
, &wdt_status
);
92 return stream_open(inode
, file
);
95 static ssize_t
iop_wdt_write(struct file
*file
, const char *data
, size_t len
,
102 clear_bit(WDT_OK_TO_CLOSE
, &wdt_status
);
104 for (i
= 0; i
!= len
; i
++) {
107 if (get_user(c
, data
+ i
))
110 set_bit(WDT_OK_TO_CLOSE
, &wdt_status
);
118 static const struct watchdog_info ident
= {
119 .options
= WDIOF_CARDRESET
| WDIOF_MAGICCLOSE
| WDIOF_KEEPALIVEPING
,
120 .identity
= "iop watchdog",
123 static long iop_wdt_ioctl(struct file
*file
,
124 unsigned int cmd
, unsigned long arg
)
128 int __user
*argp
= (int __user
*)arg
;
131 case WDIOC_GETSUPPORT
:
132 if (copy_to_user(argp
, &ident
, sizeof(ident
)))
138 case WDIOC_GETSTATUS
:
139 ret
= put_user(0, argp
);
142 case WDIOC_GETBOOTSTATUS
:
143 ret
= put_user(boot_status
, argp
);
146 case WDIOC_SETOPTIONS
:
147 if (get_user(options
, (int *)arg
))
150 if (options
& WDIOS_DISABLECARD
) {
152 if (wdt_disable() == 0) {
153 set_bit(WDT_OK_TO_CLOSE
, &wdt_status
);
160 if (options
& WDIOS_ENABLECARD
) {
166 case WDIOC_KEEPALIVE
:
171 case WDIOC_GETTIMEOUT
:
172 ret
= put_user(iop_watchdog_timeout(), argp
);
178 static int iop_wdt_release(struct inode
*inode
, struct file
*file
)
181 if (test_bit(WDT_OK_TO_CLOSE
, &wdt_status
))
182 if (test_bit(WDT_ENABLED
, &wdt_status
))
183 state
= wdt_disable();
185 /* if the timer is not disabled reload and notify that we are still
190 pr_crit("Device closed unexpectedly - reset in %lu seconds\n",
191 iop_watchdog_timeout());
194 clear_bit(WDT_IN_USE
, &wdt_status
);
195 clear_bit(WDT_OK_TO_CLOSE
, &wdt_status
);
200 static const struct file_operations iop_wdt_fops
= {
201 .owner
= THIS_MODULE
,
203 .write
= iop_wdt_write
,
204 .unlocked_ioctl
= iop_wdt_ioctl
,
205 .compat_ioctl
= compat_ptr_ioctl
,
206 .open
= iop_wdt_open
,
207 .release
= iop_wdt_release
,
210 static struct miscdevice iop_wdt_miscdev
= {
211 .minor
= WATCHDOG_MINOR
,
213 .fops
= &iop_wdt_fops
,
216 static int __init
iop_wdt_init(void)
220 /* check if the reset was caused by the watchdog timer */
221 boot_status
= (read_rcsr() & IOP_RCSR_WDT
) ? WDIOF_CARDRESET
: 0;
223 /* Configure Watchdog Timeout to cause an Internal Bus (IB) Reset
224 * NOTE: An IB Reset will Reset both cores in the IOP342
226 write_wdtsr(IOP13XX_WDTCR_IB_RESET
);
228 /* Register after we have the device set up so we cannot race
230 ret
= misc_register(&iop_wdt_miscdev
);
232 pr_info("timeout %lu sec\n", iop_watchdog_timeout());
237 static void __exit
iop_wdt_exit(void)
239 misc_deregister(&iop_wdt_miscdev
);
242 module_init(iop_wdt_init
);
243 module_exit(iop_wdt_exit
);
245 module_param(nowayout
, bool, 0);
246 MODULE_PARM_DESC(nowayout
, "Watchdog cannot be stopped once started");
248 MODULE_AUTHOR("Curt E Bruns <curt.e.bruns@intel.com>");
249 MODULE_DESCRIPTION("iop watchdog timer driver");
250 MODULE_LICENSE("GPL");