Merge tag 'io_uring-5.11-2021-01-16' of git://git.kernel.dk/linux-block
[linux/fpc-iii.git] / include / dt-bindings / pinctrl / pinctrl-tegra.h
blobd9b18bf264968eecc36e65f47ad2a0daee924a72
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * This header provides constants for Tegra pinctrl bindings.
5 * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved.
7 * Author: Laxman Dewangan <ldewangan@nvidia.com>
8 */
10 #ifndef _DT_BINDINGS_PINCTRL_TEGRA_H
11 #define _DT_BINDINGS_PINCTRL_TEGRA_H
14 * Enable/disable for diffeent dt properties. This is applicable for
15 * properties nvidia,enable-input, nvidia,tristate, nvidia,open-drain,
16 * nvidia,lock, nvidia,rcv-sel, nvidia,high-speed-mode, nvidia,schmitt.
18 #define TEGRA_PIN_DISABLE 0
19 #define TEGRA_PIN_ENABLE 1
21 #define TEGRA_PIN_PULL_NONE 0
22 #define TEGRA_PIN_PULL_DOWN 1
23 #define TEGRA_PIN_PULL_UP 2
25 /* Low power mode driver */
26 #define TEGRA_PIN_LP_DRIVE_DIV_8 0
27 #define TEGRA_PIN_LP_DRIVE_DIV_4 1
28 #define TEGRA_PIN_LP_DRIVE_DIV_2 2
29 #define TEGRA_PIN_LP_DRIVE_DIV_1 3
31 /* Rising/Falling slew rate */
32 #define TEGRA_PIN_SLEW_RATE_FASTEST 0
33 #define TEGRA_PIN_SLEW_RATE_FAST 1
34 #define TEGRA_PIN_SLEW_RATE_SLOW 2
35 #define TEGRA_PIN_SLEW_RATE_SLOWEST 3
37 #endif