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PCI: hotplug: Embed hotplug_slot
[linux/fpc-iii.git] / drivers / scsi / lpfc / lpfc_sli4.h
blob399c0015c54655787c3e31b4f545fc909580f4d4
1 /*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
3 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2017-2018 Broadcom. All Rights Reserved. The term *
5 * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. *
6 * Copyright (C) 2009-2016 Emulex. All rights reserved. *
7 * EMULEX and SLI are trademarks of Emulex. *
8 * www.broadcom.com *
9 * *
10 * This program is free software; you can redistribute it and/or *
11 * modify it under the terms of version 2 of the GNU General *
12 * Public License as published by the Free Software Foundation. *
13 * This program is distributed in the hope that it will be useful. *
14 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
15 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
16 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
17 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
18 * TO BE LEGALLY INVALID. See the GNU General Public License for *
19 * more details, a copy of which can be found in the file COPYING *
20 * included with this package. *
21 *******************************************************************/
22
23 #define LPFC_ACTIVE_MBOX_WAIT_CNT 100
24 #define LPFC_XRI_EXCH_BUSY_WAIT_TMO 10000
25 #define LPFC_XRI_EXCH_BUSY_WAIT_T1 10
26 #define LPFC_XRI_EXCH_BUSY_WAIT_T2 30000
27 #define LPFC_RPI_LOW_WATER_MARK 10
28
29 #define LPFC_UNREG_FCF 1
30 #define LPFC_SKIP_UNREG_FCF 0
31
32 /* Amount of time in seconds for waiting FCF rediscovery to complete */
33 #define LPFC_FCF_REDISCOVER_WAIT_TMO 2000 /* msec */
34
35 /* Number of SGL entries can be posted in a 4KB nonembedded mbox command */
36 #define LPFC_NEMBED_MBOX_SGL_CNT 254
37
38 /* Multi-queue arrangement for FCP EQ/CQ/WQ tuples */
39 #define LPFC_HBA_IO_CHAN_MIN 0
40 #define LPFC_HBA_IO_CHAN_MAX 32
41 #define LPFC_FCP_IO_CHAN_DEF 4
42 #define LPFC_NVME_IO_CHAN_DEF 0
43
44 /* Number of channels used for Flash Optimized Fabric (FOF) operations */
45
46 #define LPFC_FOF_IO_CHAN_NUM 1
47
48 /*
49 * Provide the default FCF Record attributes used by the driver
50 * when nonFIP mode is configured and there is no other default
51 * FCF Record attributes.
52 */
53 #define LPFC_FCOE_FCF_DEF_INDEX 0
54 #define LPFC_FCOE_FCF_GET_FIRST 0xFFFF
55 #define LPFC_FCOE_FCF_NEXT_NONE 0xFFFF
56
57 #define LPFC_FCOE_NULL_VID 0xFFF
58 #define LPFC_FCOE_IGNORE_VID 0xFFFF
59
60 /* First 3 bytes of default FCF MAC is specified by FC_MAP */
61 #define LPFC_FCOE_FCF_MAC3 0xFF
62 #define LPFC_FCOE_FCF_MAC4 0xFF
63 #define LPFC_FCOE_FCF_MAC5 0xFE
64 #define LPFC_FCOE_FCF_MAP0 0x0E
65 #define LPFC_FCOE_FCF_MAP1 0xFC
66 #define LPFC_FCOE_FCF_MAP2 0x00
67 #define LPFC_FCOE_MAX_RCV_SIZE 0x800
68 #define LPFC_FCOE_FKA_ADV_PER 0
69 #define LPFC_FCOE_FIP_PRIORITY 0x80
70
71 #define sli4_sid_from_fc_hdr(fc_hdr) \
72 ((fc_hdr)->fh_s_id[0] << 16 | \
73 (fc_hdr)->fh_s_id[1] << 8 | \
74 (fc_hdr)->fh_s_id[2])
75
76 #define sli4_did_from_fc_hdr(fc_hdr) \
77 ((fc_hdr)->fh_d_id[0] << 16 | \
78 (fc_hdr)->fh_d_id[1] << 8 | \
79 (fc_hdr)->fh_d_id[2])
80
81 #define sli4_fctl_from_fc_hdr(fc_hdr) \
82 ((fc_hdr)->fh_f_ctl[0] << 16 | \
83 (fc_hdr)->fh_f_ctl[1] << 8 | \
84 (fc_hdr)->fh_f_ctl[2])
85
86 #define sli4_type_from_fc_hdr(fc_hdr) \
87 ((fc_hdr)->fh_type)
88
89 #define LPFC_FW_RESET_MAXIMUM_WAIT_10MS_CNT 12000
90
91 #define INT_FW_UPGRADE 0
92 #define RUN_FW_UPGRADE 1
93
94 enum lpfc_sli4_queue_type {
95 LPFC_EQ,
96 LPFC_GCQ,
97 LPFC_MCQ,
98 LPFC_WCQ,
99 LPFC_RCQ,
100 LPFC_MQ,
101 LPFC_WQ,
102 LPFC_HRQ,
103 LPFC_DRQ
104 };
105
106 /* The queue sub-type defines the functional purpose of the queue */
107 enum lpfc_sli4_queue_subtype {
108 LPFC_NONE,
109 LPFC_MBOX,
110 LPFC_FCP,
111 LPFC_ELS,
112 LPFC_NVME,
113 LPFC_NVMET,
114 LPFC_NVME_LS,
115 LPFC_USOL
116 };
117
118 union sli4_qe {
119 void *address;
120 struct lpfc_eqe *eqe;
121 struct lpfc_cqe *cqe;
122 struct lpfc_mcqe *mcqe;
123 struct lpfc_wcqe_complete *wcqe_complete;
124 struct lpfc_wcqe_release *wcqe_release;
125 struct sli4_wcqe_xri_aborted *wcqe_xri_aborted;
126 struct lpfc_rcqe_complete *rcqe_complete;
127 struct lpfc_mqe *mqe;
128 union lpfc_wqe *wqe;
129 union lpfc_wqe128 *wqe128;
130 struct lpfc_rqe *rqe;
131 };
132
133 /* RQ buffer list */
134 struct lpfc_rqb {
135 uint16_t entry_count; /* Current number of RQ slots */
136 uint16_t buffer_count; /* Current number of buffers posted */
137 struct list_head rqb_buffer_list; /* buffers assigned to this HBQ */
138 /* Callback for HBQ buffer allocation */
139 struct rqb_dmabuf *(*rqb_alloc_buffer)(struct lpfc_hba *);
140 /* Callback for HBQ buffer free */
141 void (*rqb_free_buffer)(struct lpfc_hba *,
142 struct rqb_dmabuf *);
143 };
144
145 struct lpfc_queue {
146 struct list_head list;
147 struct list_head wq_list;
148 struct list_head wqfull_list;
149 enum lpfc_sli4_queue_type type;
150 enum lpfc_sli4_queue_subtype subtype;
151 struct lpfc_hba *phba;
152 struct list_head child_list;
153 struct list_head page_list;
154 struct list_head sgl_list;
155 uint32_t entry_count; /* Number of entries to support on the queue */
156 uint32_t entry_size; /* Size of each queue entry. */
157 uint32_t entry_repost; /* Count of entries before doorbell is rung */
158 #define LPFC_EQ_REPOST 8
159 #define LPFC_MQ_REPOST 8
160 #define LPFC_CQ_REPOST 64
161 #define LPFC_RQ_REPOST 64
162 #define LPFC_RELEASE_NOTIFICATION_INTERVAL 32 /* For WQs */
163 uint32_t queue_id; /* Queue ID assigned by the hardware */
164 uint32_t assoc_qid; /* Queue ID associated with, for CQ/WQ/MQ */
165 uint32_t host_index; /* The host's index for putting or getting */
166 uint32_t hba_index; /* The last known hba index for get or put */
167
168 struct lpfc_sli_ring *pring; /* ptr to io ring associated with q */
169 struct lpfc_rqb *rqbp; /* ptr to RQ buffers */
170
171 uint32_t q_mode;
172 uint16_t page_count; /* Number of pages allocated for this queue */
173 uint16_t page_size; /* size of page allocated for this queue */
174 #define LPFC_EXPANDED_PAGE_SIZE 16384
175 #define LPFC_DEFAULT_PAGE_SIZE 4096
176 uint16_t chann; /* IO channel this queue is associated with */
177 uint8_t db_format;
178 #define LPFC_DB_RING_FORMAT 0x01
179 #define LPFC_DB_LIST_FORMAT 0x02
180 uint8_t q_flag;
181 #define HBA_NVMET_WQFULL 0x1 /* We hit WQ Full condition for NVMET */
182 void __iomem *db_regaddr;
183 uint16_t dpp_enable;
184 uint16_t dpp_id;
185 void __iomem *dpp_regaddr;
186
187 /* For q stats */
188 uint32_t q_cnt_1;
189 uint32_t q_cnt_2;
190 uint32_t q_cnt_3;
191 uint64_t q_cnt_4;
192 /* defines for EQ stats */
193 #define EQ_max_eqe q_cnt_1
194 #define EQ_no_entry q_cnt_2
195 #define EQ_cqe_cnt q_cnt_3
196 #define EQ_processed q_cnt_4
197
198 /* defines for CQ stats */
199 #define CQ_mbox q_cnt_1
200 #define CQ_max_cqe q_cnt_1
201 #define CQ_release_wqe q_cnt_2
202 #define CQ_xri_aborted q_cnt_3
203 #define CQ_wq q_cnt_4
204
205 /* defines for WQ stats */
206 #define WQ_overflow q_cnt_1
207 #define WQ_posted q_cnt_4
208
209 /* defines for RQ stats */
210 #define RQ_no_posted_buf q_cnt_1
211 #define RQ_no_buf_found q_cnt_2
212 #define RQ_buf_posted q_cnt_3
213 #define RQ_rcv_buf q_cnt_4
214
215 struct work_struct irqwork;
216 struct work_struct spwork;
217
218 uint64_t isr_timestamp;
219 uint8_t qe_valid;
220 struct lpfc_queue *assoc_qp;
221 union sli4_qe qe[1]; /* array to index entries (must be last) */
222 };
223
224 struct lpfc_sli4_link {
225 uint16_t speed;
226 uint8_t duplex;
227 uint8_t status;
228 uint8_t type;
229 uint8_t number;
230 uint8_t fault;
231 uint16_t logical_speed;
232 uint16_t topology;
233 };
234
235 struct lpfc_fcf_rec {
236 uint8_t fabric_name[8];
237 uint8_t switch_name[8];
238 uint8_t mac_addr[6];
239 uint16_t fcf_indx;
240 uint32_t priority;
241 uint16_t vlan_id;
242 uint32_t addr_mode;
243 uint32_t flag;
244 #define BOOT_ENABLE 0x01
245 #define RECORD_VALID 0x02
246 };
247
248 struct lpfc_fcf_pri_rec {
249 uint16_t fcf_index;
250 #define LPFC_FCF_ON_PRI_LIST 0x0001
251 #define LPFC_FCF_FLOGI_FAILED 0x0002
252 uint16_t flag;
253 uint32_t priority;
254 };
255
256 struct lpfc_fcf_pri {
257 struct list_head list;
258 struct lpfc_fcf_pri_rec fcf_rec;
259 };
260
261 /*
262 * Maximum FCF table index, it is for driver internal book keeping, it
263 * just needs to be no less than the supported HBA's FCF table size.
264 */
265 #define LPFC_SLI4_FCF_TBL_INDX_MAX 32
266
267 struct lpfc_fcf {
268 uint16_t fcfi;
269 uint32_t fcf_flag;
270 #define FCF_AVAILABLE 0x01 /* FCF available for discovery */
271 #define FCF_REGISTERED 0x02 /* FCF registered with FW */
272 #define FCF_SCAN_DONE 0x04 /* FCF table scan done */
273 #define FCF_IN_USE 0x08 /* Atleast one discovery completed */
274 #define FCF_INIT_DISC 0x10 /* Initial FCF discovery */
275 #define FCF_DEAD_DISC 0x20 /* FCF DEAD fast FCF failover discovery */
276 #define FCF_ACVL_DISC 0x40 /* All CVL fast FCF failover discovery */
277 #define FCF_DISCOVERY (FCF_INIT_DISC | FCF_DEAD_DISC | FCF_ACVL_DISC)
278 #define FCF_REDISC_PEND 0x80 /* FCF rediscovery pending */
279 #define FCF_REDISC_EVT 0x100 /* FCF rediscovery event to worker thread */
280 #define FCF_REDISC_FOV 0x200 /* Post FCF rediscovery fast failover */
281 #define FCF_REDISC_PROG (FCF_REDISC_PEND | FCF_REDISC_EVT)
282 uint32_t addr_mode;
283 uint32_t eligible_fcf_cnt;
284 struct lpfc_fcf_rec current_rec;
285 struct lpfc_fcf_rec failover_rec;
286 struct list_head fcf_pri_list;
287 struct lpfc_fcf_pri fcf_pri[LPFC_SLI4_FCF_TBL_INDX_MAX];
288 uint32_t current_fcf_scan_pri;
289 struct timer_list redisc_wait;
290 unsigned long *fcf_rr_bmask; /* Eligible FCF indexes for RR failover */
291 };
292
293
294 #define LPFC_REGION23_SIGNATURE "RG23"
295 #define LPFC_REGION23_VERSION 1
296 #define LPFC_REGION23_LAST_REC 0xff
297 #define DRIVER_SPECIFIC_TYPE 0xA2
298 #define LINUX_DRIVER_ID 0x20
299 #define PORT_STE_TYPE 0x1
300
301 struct lpfc_fip_param_hdr {
302 uint8_t type;
303 #define FCOE_PARAM_TYPE 0xA0
304 uint8_t length;
305 #define FCOE_PARAM_LENGTH 2
306 uint8_t parm_version;
307 #define FIPP_VERSION 0x01
308 uint8_t parm_flags;
309 #define lpfc_fip_param_hdr_fipp_mode_SHIFT 6
310 #define lpfc_fip_param_hdr_fipp_mode_MASK 0x3
311 #define lpfc_fip_param_hdr_fipp_mode_WORD parm_flags
312 #define FIPP_MODE_ON 0x1
313 #define FIPP_MODE_OFF 0x0
314 #define FIPP_VLAN_VALID 0x1
315 };
316
317 struct lpfc_fcoe_params {
318 uint8_t fc_map[3];
319 uint8_t reserved1;
320 uint16_t vlan_tag;
321 uint8_t reserved[2];
322 };
323
324 struct lpfc_fcf_conn_hdr {
325 uint8_t type;
326 #define FCOE_CONN_TBL_TYPE 0xA1
327 uint8_t length; /* words */
328 uint8_t reserved[2];
329 };
330
331 struct lpfc_fcf_conn_rec {
332 uint16_t flags;
333 #define FCFCNCT_VALID 0x0001
334 #define FCFCNCT_BOOT 0x0002
335 #define FCFCNCT_PRIMARY 0x0004 /* if not set, Secondary */
336 #define FCFCNCT_FBNM_VALID 0x0008
337 #define FCFCNCT_SWNM_VALID 0x0010
338 #define FCFCNCT_VLAN_VALID 0x0020
339 #define FCFCNCT_AM_VALID 0x0040
340 #define FCFCNCT_AM_PREFERRED 0x0080 /* if not set, AM Required */
341 #define FCFCNCT_AM_SPMA 0x0100 /* if not set, FPMA */
342
343 uint16_t vlan_tag;
344 uint8_t fabric_name[8];
345 uint8_t switch_name[8];
346 };
347
348 struct lpfc_fcf_conn_entry {
349 struct list_head list;
350 struct lpfc_fcf_conn_rec conn_rec;
351 };
352
353 /*
354 * Define the host's bootstrap mailbox. This structure contains
355 * the member attributes needed to create, use, and destroy the
356 * bootstrap mailbox region.
357 *
358 * The macro definitions for the bmbx data structure are defined
359 * in lpfc_hw4.h with the register definition.
360 */
361 struct lpfc_bmbx {
362 struct lpfc_dmabuf *dmabuf;
363 struct dma_address dma_address;
364 void *avirt;
365 dma_addr_t aphys;
366 uint32_t bmbx_size;
367 };
368
369 #define LPFC_EQE_SIZE LPFC_EQE_SIZE_4
370
371 #define LPFC_EQE_SIZE_4B 4
372 #define LPFC_EQE_SIZE_16B 16
373 #define LPFC_CQE_SIZE 16
374 #define LPFC_WQE_SIZE 64
375 #define LPFC_WQE128_SIZE 128
376 #define LPFC_MQE_SIZE 256
377 #define LPFC_RQE_SIZE 8
378
379 #define LPFC_EQE_DEF_COUNT 1024
380 #define LPFC_CQE_DEF_COUNT 1024
381 #define LPFC_CQE_EXP_COUNT 4096
382 #define LPFC_WQE_DEF_COUNT 256
383 #define LPFC_WQE_EXP_COUNT 1024
384 #define LPFC_MQE_DEF_COUNT 16
385 #define LPFC_RQE_DEF_COUNT 512
386
387 #define LPFC_QUEUE_NOARM false
388 #define LPFC_QUEUE_REARM true
389
390
391 /*
392 * SLI4 CT field defines
393 */
394 #define SLI4_CT_RPI 0
395 #define SLI4_CT_VPI 1
396 #define SLI4_CT_VFI 2
397 #define SLI4_CT_FCFI 3
398
399 /*
400 * SLI4 specific data structures
401 */
402 struct lpfc_max_cfg_param {
403 uint16_t max_xri;
404 uint16_t xri_base;
405 uint16_t xri_used;
406 uint16_t max_rpi;
407 uint16_t rpi_base;
408 uint16_t rpi_used;
409 uint16_t max_vpi;
410 uint16_t vpi_base;
411 uint16_t vpi_used;
412 uint16_t max_vfi;
413 uint16_t vfi_base;
414 uint16_t vfi_used;
415 uint16_t max_fcfi;
416 uint16_t fcfi_used;
417 uint16_t max_eq;
418 uint16_t max_rq;
419 uint16_t max_cq;
420 uint16_t max_wq;
421 };
422
423 struct lpfc_hba;
424 /* SLI4 HBA multi-fcp queue handler struct */
425 #define LPFC_SLI4_HANDLER_NAME_SZ 16
426 struct lpfc_hba_eq_hdl {
427 uint32_t idx;
428 char handler_name[LPFC_SLI4_HANDLER_NAME_SZ];
429 struct lpfc_hba *phba;
430 atomic_t hba_eq_in_use;
431 struct cpumask *cpumask;
432 /* CPU affinitsed to or 0xffffffff if multiple */
433 uint32_t cpu;
434 #define LPFC_MULTI_CPU_AFFINITY 0xffffffff
435 };
436
437 /*BB Credit recovery value*/
438 struct lpfc_bbscn_params {
439 uint32_t word0;
440 #define lpfc_bbscn_min_SHIFT 0
441 #define lpfc_bbscn_min_MASK 0x0000000F
442 #define lpfc_bbscn_min_WORD word0
443 #define lpfc_bbscn_max_SHIFT 4
444 #define lpfc_bbscn_max_MASK 0x0000000F
445 #define lpfc_bbscn_max_WORD word0
446 #define lpfc_bbscn_def_SHIFT 8
447 #define lpfc_bbscn_def_MASK 0x0000000F
448 #define lpfc_bbscn_def_WORD word0
449 };
450
451 /* Port Capabilities for SLI4 Parameters */
452 struct lpfc_pc_sli4_params {
453 uint32_t supported;
454 uint32_t if_type;
455 uint32_t sli_rev;
456 uint32_t sli_family;
457 uint32_t featurelevel_1;
458 uint32_t featurelevel_2;
459 uint32_t proto_types;
460 #define LPFC_SLI4_PROTO_FCOE 0x0000001
461 #define LPFC_SLI4_PROTO_FC 0x0000002
462 #define LPFC_SLI4_PROTO_NIC 0x0000004
463 #define LPFC_SLI4_PROTO_ISCSI 0x0000008
464 #define LPFC_SLI4_PROTO_RDMA 0x0000010
465 uint32_t sge_supp_len;
466 uint32_t if_page_sz;
467 uint32_t rq_db_window;
468 uint32_t loopbk_scope;
469 uint32_t oas_supported;
470 uint32_t eq_pages_max;
471 uint32_t eqe_size;
472 uint32_t cq_pages_max;
473 uint32_t cqe_size;
474 uint32_t mq_pages_max;
475 uint32_t mqe_size;
476 uint32_t mq_elem_cnt;
477 uint32_t wq_pages_max;
478 uint32_t wqe_size;
479 uint32_t rq_pages_max;
480 uint32_t rqe_size;
481 uint32_t hdr_pages_max;
482 uint32_t hdr_size;
483 uint32_t hdr_pp_align;
484 uint32_t sgl_pages_max;
485 uint32_t sgl_pp_align;
486 uint8_t cqv;
487 uint8_t mqv;
488 uint8_t wqv;
489 uint8_t rqv;
490 uint8_t eqav;
491 uint8_t cqav;
492 uint8_t wqsize;
493 uint8_t bv1s;
494 #define LPFC_WQ_SZ64_SUPPORT 1
495 #define LPFC_WQ_SZ128_SUPPORT 2
496 uint8_t wqpcnt;
497 };
498
499 #define LPFC_CQ_4K_PAGE_SZ 0x1
500 #define LPFC_CQ_16K_PAGE_SZ 0x4
501 #define LPFC_WQ_4K_PAGE_SZ 0x1
502 #define LPFC_WQ_16K_PAGE_SZ 0x4
503
504 struct lpfc_iov {
505 uint32_t pf_number;
506 uint32_t vf_number;
507 };
508
509 struct lpfc_sli4_lnk_info {
510 uint8_t lnk_dv;
511 #define LPFC_LNK_DAT_INVAL 0
512 #define LPFC_LNK_DAT_VAL 1
513 uint8_t lnk_tp;
514 #define LPFC_LNK_GE 0x0 /* FCoE */
515 #define LPFC_LNK_FC 0x1 /* FC */
516 uint8_t lnk_no;
517 uint8_t optic_state;
518 };
519
520 #define LPFC_SLI4_HANDLER_CNT (LPFC_HBA_IO_CHAN_MAX+ \
521 LPFC_FOF_IO_CHAN_NUM)
522
523 /* Used for IRQ vector to CPU mapping */
524 struct lpfc_vector_map_info {
525 uint16_t phys_id;
526 uint16_t core_id;
527 uint16_t irq;
528 uint16_t channel_id;
529 };
530 #define LPFC_VECTOR_MAP_EMPTY 0xffff
531
532 /* SLI4 HBA data structure entries */
533 struct lpfc_sli4_hba {
534 void __iomem *conf_regs_memmap_p; /* Kernel memory mapped address for
535 * config space registers
536 */
537 void __iomem *ctrl_regs_memmap_p; /* Kernel memory mapped address for
538 * control registers
539 */
540 void __iomem *drbl_regs_memmap_p; /* Kernel memory mapped address for
541 * doorbell registers
542 */
543 void __iomem *dpp_regs_memmap_p; /* Kernel memory mapped address for
544 * dpp registers
545 */
546 union {
547 struct {
548 /* IF Type 0, BAR 0 PCI cfg space reg mem map */
549 void __iomem *UERRLOregaddr;
550 void __iomem *UERRHIregaddr;
551 void __iomem *UEMASKLOregaddr;
552 void __iomem *UEMASKHIregaddr;
553 } if_type0;
554 struct {
555 /* IF Type 2, BAR 0 PCI cfg space reg mem map. */
556 void __iomem *STATUSregaddr;
557 void __iomem *CTRLregaddr;
558 void __iomem *ERR1regaddr;
559 #define SLIPORT_ERR1_REG_ERR_CODE_1 0x1
560 #define SLIPORT_ERR1_REG_ERR_CODE_2 0x2
561 void __iomem *ERR2regaddr;
562 #define SLIPORT_ERR2_REG_FW_RESTART 0x0
563 #define SLIPORT_ERR2_REG_FUNC_PROVISON 0x1
564 #define SLIPORT_ERR2_REG_FORCED_DUMP 0x2
565 #define SLIPORT_ERR2_REG_FAILURE_EQ 0x3
566 #define SLIPORT_ERR2_REG_FAILURE_CQ 0x4
567 #define SLIPORT_ERR2_REG_FAILURE_BUS 0x5
568 #define SLIPORT_ERR2_REG_FAILURE_RQ 0x6
569 void __iomem *EQDregaddr;
570 } if_type2;
571 } u;
572
573 /* IF type 0, BAR1 and if type 2, Bar 0 CSR register memory map */
574 void __iomem *PSMPHRregaddr;
575
576 /* Well-known SLI INTF register memory map. */
577 void __iomem *SLIINTFregaddr;
578
579 /* IF type 0, BAR 1 function CSR register memory map */
580 void __iomem *ISRregaddr; /* HST_ISR register */
581 void __iomem *IMRregaddr; /* HST_IMR register */
582 void __iomem *ISCRregaddr; /* HST_ISCR register */
583 /* IF type 0, BAR 0 and if type 2, BAR 0 doorbell register memory map */
584 void __iomem *RQDBregaddr; /* RQ_DOORBELL register */
585 void __iomem *WQDBregaddr; /* WQ_DOORBELL register */
586 void __iomem *CQDBregaddr; /* CQ_DOORBELL register */
587 void __iomem *EQDBregaddr; /* EQ_DOORBELL register */
588 void __iomem *MQDBregaddr; /* MQ_DOORBELL register */
589 void __iomem *BMBXregaddr; /* BootStrap MBX register */
590
591 uint32_t ue_mask_lo;
592 uint32_t ue_mask_hi;
593 uint32_t ue_to_sr;
594 uint32_t ue_to_rp;
595 struct lpfc_register sli_intf;
596 struct lpfc_pc_sli4_params pc_sli4_params;
597 struct lpfc_bbscn_params bbscn_params;
598 struct lpfc_hba_eq_hdl *hba_eq_hdl; /* HBA per-WQ handle */
599
600 void (*sli4_eq_clr_intr)(struct lpfc_queue *q);
601 uint32_t (*sli4_eq_release)(struct lpfc_queue *q, bool arm);
602 uint32_t (*sli4_cq_release)(struct lpfc_queue *q, bool arm);
603
604 /* Pointers to the constructed SLI4 queues */
605 struct lpfc_queue **hba_eq; /* Event queues for HBA */
606 struct lpfc_queue **fcp_cq; /* Fast-path FCP compl queue */
607 struct lpfc_queue **nvme_cq; /* Fast-path NVME compl queue */
608 struct lpfc_queue **nvmet_cqset; /* Fast-path NVMET CQ Set queues */
609 struct lpfc_queue **nvmet_mrq_hdr; /* Fast-path NVMET hdr MRQs */
610 struct lpfc_queue **nvmet_mrq_data; /* Fast-path NVMET data MRQs */
611 struct lpfc_queue **fcp_wq; /* Fast-path FCP work queue */
612 struct lpfc_queue **nvme_wq; /* Fast-path NVME work queue */
613 uint16_t *fcp_cq_map;
614 uint16_t *nvme_cq_map;
615 struct list_head lpfc_wq_list;
616
617 struct lpfc_queue *mbx_cq; /* Slow-path mailbox complete queue */
618 struct lpfc_queue *els_cq; /* Slow-path ELS response complete queue */
619 struct lpfc_queue *nvmels_cq; /* NVME LS complete queue */
620 struct lpfc_queue *mbx_wq; /* Slow-path MBOX work queue */
621 struct lpfc_queue *els_wq; /* Slow-path ELS work queue */
622 struct lpfc_queue *nvmels_wq; /* NVME LS work queue */
623 struct lpfc_queue *hdr_rq; /* Slow-path Header Receive queue */
624 struct lpfc_queue *dat_rq; /* Slow-path Data Receive queue */
625
626 struct lpfc_name wwnn;
627 struct lpfc_name wwpn;
628
629 uint32_t fw_func_mode; /* FW function protocol mode */
630 uint32_t ulp0_mode; /* ULP0 protocol mode */
631 uint32_t ulp1_mode; /* ULP1 protocol mode */
632
633 struct lpfc_queue *fof_eq; /* Flash Optimized Fabric Event queue */
634
635 /* Optimized Access Storage specific queues/structures */
636
637 struct lpfc_queue *oas_cq; /* OAS completion queue */
638 struct lpfc_queue *oas_wq; /* OAS Work queue */
639 struct lpfc_sli_ring *oas_ring;
640 uint64_t oas_next_lun;
641 uint8_t oas_next_tgt_wwpn[8];
642 uint8_t oas_next_vpt_wwpn[8];
643
644 /* Setup information for various queue parameters */
645 int eq_esize;
646 int eq_ecount;
647 int cq_esize;
648 int cq_ecount;
649 int wq_esize;
650 int wq_ecount;
651 int mq_esize;
652 int mq_ecount;
653 int rq_esize;
654 int rq_ecount;
655 #define LPFC_SP_EQ_MAX_INTR_SEC 10000
656 #define LPFC_FP_EQ_MAX_INTR_SEC 10000
657
658 uint32_t intr_enable;
659 struct lpfc_bmbx bmbx;
660 struct lpfc_max_cfg_param max_cfg_param;
661 uint16_t extents_in_use; /* must allocate resource extents. */
662 uint16_t rpi_hdrs_in_use; /* must post rpi hdrs if set. */
663 uint16_t next_xri; /* last_xri - max_cfg_param.xri_base = used */
664 uint16_t next_rpi;
665 uint16_t nvme_xri_max;
666 uint16_t nvme_xri_cnt;
667 uint16_t nvme_xri_start;
668 uint16_t scsi_xri_max;
669 uint16_t scsi_xri_cnt;
670 uint16_t scsi_xri_start;
671 uint16_t els_xri_cnt;
672 uint16_t nvmet_xri_cnt;
673 uint16_t nvmet_io_wait_cnt;
674 uint16_t nvmet_io_wait_total;
675 struct list_head lpfc_els_sgl_list;
676 struct list_head lpfc_abts_els_sgl_list;
677 struct list_head lpfc_nvmet_sgl_list;
678 struct list_head lpfc_abts_nvmet_ctx_list;
679 struct list_head lpfc_abts_scsi_buf_list;
680 struct list_head lpfc_abts_nvme_buf_list;
681 struct list_head lpfc_nvmet_io_wait_list;
682 struct lpfc_nvmet_ctx_info *nvmet_ctx_info;
683 struct lpfc_sglq **lpfc_sglq_active_list;
684 struct list_head lpfc_rpi_hdr_list;
685 unsigned long *rpi_bmask;
686 uint16_t *rpi_ids;
687 uint16_t rpi_count;
688 struct list_head lpfc_rpi_blk_list;
689 unsigned long *xri_bmask;
690 uint16_t *xri_ids;
691 struct list_head lpfc_xri_blk_list;
692 unsigned long *vfi_bmask;
693 uint16_t *vfi_ids;
694 uint16_t vfi_count;
695 struct list_head lpfc_vfi_blk_list;
696 struct lpfc_sli4_flags sli4_flags;
697 struct list_head sp_queue_event;
698 struct list_head sp_cqe_event_pool;
699 struct list_head sp_asynce_work_queue;
700 struct list_head sp_fcp_xri_aborted_work_queue;
701 struct list_head sp_els_xri_aborted_work_queue;
702 struct list_head sp_unsol_work_queue;
703 struct lpfc_sli4_link link_state;
704 struct lpfc_sli4_lnk_info lnk_info;
705 uint32_t pport_name_sta;
706 #define LPFC_SLI4_PPNAME_NON 0
707 #define LPFC_SLI4_PPNAME_GET 1
708 struct lpfc_iov iov;
709 spinlock_t abts_nvme_buf_list_lock; /* list of aborted SCSI IOs */
710 spinlock_t abts_scsi_buf_list_lock; /* list of aborted SCSI IOs */
711 spinlock_t sgl_list_lock; /* list of aborted els IOs */
712 spinlock_t nvmet_io_wait_lock; /* IOs waiting for ctx resources */
713 uint32_t physical_port;
714
715 /* CPU to vector mapping information */
716 struct lpfc_vector_map_info *cpu_map;
717 uint16_t num_online_cpu;
718 uint16_t num_present_cpu;
719 uint16_t curr_disp_cpu;
720 };
721
722 enum lpfc_sge_type {
723 GEN_BUFF_TYPE,
724 SCSI_BUFF_TYPE,
725 NVMET_BUFF_TYPE
726 };
727
728 enum lpfc_sgl_state {
729 SGL_FREED,
730 SGL_ALLOCATED,
731 SGL_XRI_ABORTED
732 };
733
734 struct lpfc_sglq {
735 /* lpfc_sglqs are used in double linked lists */
736 struct list_head list;
737 struct list_head clist;
738 enum lpfc_sge_type buff_type; /* is this a scsi sgl */
739 enum lpfc_sgl_state state;
740 struct lpfc_nodelist *ndlp; /* ndlp associated with IO */
741 uint16_t iotag; /* pre-assigned IO tag */
742 uint16_t sli4_lxritag; /* logical pre-assigned xri. */
743 uint16_t sli4_xritag; /* pre-assigned XRI, (OXID) tag. */
744 struct sli4_sge *sgl; /* pre-assigned SGL */
745 void *virt; /* virtual address. */
746 dma_addr_t phys; /* physical address */
747 };
748
749 struct lpfc_rpi_hdr {
750 struct list_head list;
751 uint32_t len;
752 struct lpfc_dmabuf *dmabuf;
753 uint32_t page_count;
754 uint32_t start_rpi;
755 uint16_t next_rpi;
756 };
757
758 struct lpfc_rsrc_blks {
759 struct list_head list;
760 uint16_t rsrc_start;
761 uint16_t rsrc_size;
762 uint16_t rsrc_used;
763 };
764
765 struct lpfc_rdp_context {
766 struct lpfc_nodelist *ndlp;
767 uint16_t ox_id;
768 uint16_t rx_id;
769 READ_LNK_VAR link_stat;
770 uint8_t page_a0[DMP_SFF_PAGE_A0_SIZE];
771 uint8_t page_a2[DMP_SFF_PAGE_A2_SIZE];
772 void (*cmpl)(struct lpfc_hba *, struct lpfc_rdp_context*, int);
773 };
774
775 struct lpfc_lcb_context {
776 uint8_t sub_command;
777 uint8_t type;
778 uint8_t capability;
779 uint8_t frequency;
780 uint16_t duration;
781 uint16_t ox_id;
782 uint16_t rx_id;
783 struct lpfc_nodelist *ndlp;
784 };
785
786
787 /*
788 * SLI4 specific function prototypes
789 */
790 int lpfc_pci_function_reset(struct lpfc_hba *);
791 int lpfc_sli4_pdev_status_reg_wait(struct lpfc_hba *);
792 int lpfc_sli4_hba_setup(struct lpfc_hba *);
793 int lpfc_sli4_config(struct lpfc_hba *, struct lpfcMboxq *, uint8_t,
794 uint8_t, uint32_t, bool);
795 void lpfc_sli4_mbox_cmd_free(struct lpfc_hba *, struct lpfcMboxq *);
796 void lpfc_sli4_mbx_sge_set(struct lpfcMboxq *, uint32_t, dma_addr_t, uint32_t);
797 void lpfc_sli4_mbx_sge_get(struct lpfcMboxq *, uint32_t,
798 struct lpfc_mbx_sge *);
799 int lpfc_sli4_mbx_read_fcf_rec(struct lpfc_hba *, struct lpfcMboxq *,
800 uint16_t);
801
802 void lpfc_sli4_hba_reset(struct lpfc_hba *);
803 struct lpfc_queue *lpfc_sli4_queue_alloc(struct lpfc_hba *, uint32_t,
804 uint32_t, uint32_t);
805 void lpfc_sli4_queue_free(struct lpfc_queue *);
806 int lpfc_eq_create(struct lpfc_hba *, struct lpfc_queue *, uint32_t);
807 int lpfc_modify_hba_eq_delay(struct lpfc_hba *phba, uint32_t startq,
808 uint32_t numq, uint32_t imax);
809 int lpfc_cq_create(struct lpfc_hba *, struct lpfc_queue *,
810 struct lpfc_queue *, uint32_t, uint32_t);
811 int lpfc_cq_create_set(struct lpfc_hba *phba, struct lpfc_queue **cqp,
812 struct lpfc_queue **eqp, uint32_t type,
813 uint32_t subtype);
814 int32_t lpfc_mq_create(struct lpfc_hba *, struct lpfc_queue *,
815 struct lpfc_queue *, uint32_t);
816 int lpfc_wq_create(struct lpfc_hba *, struct lpfc_queue *,
817 struct lpfc_queue *, uint32_t);
818 int lpfc_rq_create(struct lpfc_hba *, struct lpfc_queue *,
819 struct lpfc_queue *, struct lpfc_queue *, uint32_t);
820 int lpfc_mrq_create(struct lpfc_hba *phba, struct lpfc_queue **hrqp,
821 struct lpfc_queue **drqp, struct lpfc_queue **cqp,
822 uint32_t subtype);
823 int lpfc_eq_destroy(struct lpfc_hba *, struct lpfc_queue *);
824 int lpfc_cq_destroy(struct lpfc_hba *, struct lpfc_queue *);
825 int lpfc_mq_destroy(struct lpfc_hba *, struct lpfc_queue *);
826 int lpfc_wq_destroy(struct lpfc_hba *, struct lpfc_queue *);
827 int lpfc_rq_destroy(struct lpfc_hba *, struct lpfc_queue *,
828 struct lpfc_queue *);
829 int lpfc_sli4_queue_setup(struct lpfc_hba *);
830 void lpfc_sli4_queue_unset(struct lpfc_hba *);
831 int lpfc_sli4_post_sgl(struct lpfc_hba *, dma_addr_t, dma_addr_t, uint16_t);
832 int lpfc_sli4_repost_scsi_sgl_list(struct lpfc_hba *);
833 int lpfc_repost_nvme_sgl_list(struct lpfc_hba *phba);
834 uint16_t lpfc_sli4_next_xritag(struct lpfc_hba *);
835 void lpfc_sli4_free_xri(struct lpfc_hba *, int);
836 int lpfc_sli4_post_async_mbox(struct lpfc_hba *);
837 int lpfc_sli4_post_scsi_sgl_block(struct lpfc_hba *, struct list_head *, int);
838 struct lpfc_cq_event *__lpfc_sli4_cq_event_alloc(struct lpfc_hba *);
839 struct lpfc_cq_event *lpfc_sli4_cq_event_alloc(struct lpfc_hba *);
840 void __lpfc_sli4_cq_event_release(struct lpfc_hba *, struct lpfc_cq_event *);
841 void lpfc_sli4_cq_event_release(struct lpfc_hba *, struct lpfc_cq_event *);
842 int lpfc_sli4_init_rpi_hdrs(struct lpfc_hba *);
843 int lpfc_sli4_post_rpi_hdr(struct lpfc_hba *, struct lpfc_rpi_hdr *);
844 int lpfc_sli4_post_all_rpi_hdrs(struct lpfc_hba *);
845 struct lpfc_rpi_hdr *lpfc_sli4_create_rpi_hdr(struct lpfc_hba *);
846 void lpfc_sli4_remove_rpi_hdrs(struct lpfc_hba *);
847 int lpfc_sli4_alloc_rpi(struct lpfc_hba *);
848 void lpfc_sli4_free_rpi(struct lpfc_hba *, int);
849 void lpfc_sli4_remove_rpis(struct lpfc_hba *);
850 void lpfc_sli4_async_event_proc(struct lpfc_hba *);
851 void lpfc_sli4_fcf_redisc_event_proc(struct lpfc_hba *);
852 int lpfc_sli4_resume_rpi(struct lpfc_nodelist *,
853 void (*)(struct lpfc_hba *, LPFC_MBOXQ_t *), void *);
854 void lpfc_sli4_fcp_xri_abort_event_proc(struct lpfc_hba *);
855 void lpfc_sli4_els_xri_abort_event_proc(struct lpfc_hba *);
856 void lpfc_sli4_fcp_xri_aborted(struct lpfc_hba *,
857 struct sli4_wcqe_xri_aborted *);
858 void lpfc_sli4_nvme_xri_aborted(struct lpfc_hba *phba,
859 struct sli4_wcqe_xri_aborted *axri);
860 void lpfc_sli4_nvmet_xri_aborted(struct lpfc_hba *phba,
861 struct sli4_wcqe_xri_aborted *axri);
862 void lpfc_sli4_els_xri_aborted(struct lpfc_hba *,
863 struct sli4_wcqe_xri_aborted *);
864 void lpfc_sli4_vport_delete_els_xri_aborted(struct lpfc_vport *);
865 void lpfc_sli4_vport_delete_fcp_xri_aborted(struct lpfc_vport *);
866 int lpfc_sli4_brdreset(struct lpfc_hba *);
867 int lpfc_sli4_add_fcf_record(struct lpfc_hba *, struct fcf_record *);
868 void lpfc_sli_remove_dflt_fcf(struct lpfc_hba *);
869 int lpfc_sli4_get_els_iocb_cnt(struct lpfc_hba *);
870 int lpfc_sli4_get_iocb_cnt(struct lpfc_hba *phba);
871 int lpfc_sli4_init_vpi(struct lpfc_vport *);
872 inline void lpfc_sli4_eq_clr_intr(struct lpfc_queue *);
873 uint32_t lpfc_sli4_cq_release(struct lpfc_queue *, bool);
874 uint32_t lpfc_sli4_eq_release(struct lpfc_queue *, bool);
875 inline void lpfc_sli4_if6_eq_clr_intr(struct lpfc_queue *q);
876 uint32_t lpfc_sli4_if6_cq_release(struct lpfc_queue *q, bool arm);
877 uint32_t lpfc_sli4_if6_eq_release(struct lpfc_queue *q, bool arm);
878 void lpfc_sli4_fcfi_unreg(struct lpfc_hba *, uint16_t);
879 int lpfc_sli4_fcf_scan_read_fcf_rec(struct lpfc_hba *, uint16_t);
880 int lpfc_sli4_fcf_rr_read_fcf_rec(struct lpfc_hba *, uint16_t);
881 int lpfc_sli4_read_fcf_rec(struct lpfc_hba *, uint16_t);
882 void lpfc_mbx_cmpl_fcf_scan_read_fcf_rec(struct lpfc_hba *, LPFC_MBOXQ_t *);
883 void lpfc_mbx_cmpl_fcf_rr_read_fcf_rec(struct lpfc_hba *, LPFC_MBOXQ_t *);
884 void lpfc_mbx_cmpl_read_fcf_rec(struct lpfc_hba *, LPFC_MBOXQ_t *);
885 int lpfc_sli4_unregister_fcf(struct lpfc_hba *);
886 int lpfc_sli4_post_status_check(struct lpfc_hba *);
887 uint8_t lpfc_sli_config_mbox_subsys_get(struct lpfc_hba *, LPFC_MBOXQ_t *);
888 uint8_t lpfc_sli_config_mbox_opcode_get(struct lpfc_hba *, LPFC_MBOXQ_t *);
Linux with added FPC-III support