?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
net: sungem: fix rx checksum support
[linux/fpc-iii.git] / drivers / mfd / arizona-core.c
blob83f1c5a516d99a974bd399c6fad01a3bcb7a59df
1 /*
2 * Arizona core driver
3 *
4 * Copyright 2012 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13 #include <linux/clk.h>
14 #include <linux/delay.h>
15 #include <linux/err.h>
16 #include <linux/gpio/consumer.h>
17 #include <linux/interrupt.h>
18 #include <linux/mfd/core.h>
19 #include <linux/module.h>
20 #include <linux/of.h>
21 #include <linux/of_device.h>
22 #include <linux/pm_runtime.h>
23 #include <linux/regmap.h>
24 #include <linux/regulator/consumer.h>
25 #include <linux/regulator/machine.h>
26 #include <linux/slab.h>
27 #include <linux/platform_device.h>
28
29 #include <linux/mfd/arizona/core.h>
30 #include <linux/mfd/arizona/registers.h>
31
32 #include "arizona.h"
33
34 static const char * const wm5102_core_supplies[] = {
35 "AVDD",
36 "DBVDD1",
37 };
38
39 int arizona_clk32k_enable(struct arizona *arizona)
40 {
41 int ret = 0;
42
43 mutex_lock(&arizona->clk_lock);
44
45 arizona->clk32k_ref++;
46
47 if (arizona->clk32k_ref == 1) {
48 switch (arizona->pdata.clk32k_src) {
49 case ARIZONA_32KZ_MCLK1:
50 ret = pm_runtime_get_sync(arizona->dev);
51 if (ret != 0)
52 goto err_ref;
53 ret = clk_prepare_enable(arizona->mclk[ARIZONA_MCLK1]);
54 if (ret != 0)
55 goto err_pm;
56 break;
57 case ARIZONA_32KZ_MCLK2:
58 ret = clk_prepare_enable(arizona->mclk[ARIZONA_MCLK2]);
59 if (ret != 0)
60 goto err_ref;
61 break;
62 }
63
64 ret = regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
65 ARIZONA_CLK_32K_ENA,
66 ARIZONA_CLK_32K_ENA);
67 }
68
69 err_pm:
70 pm_runtime_put_sync(arizona->dev);
71 err_ref:
72 if (ret != 0)
73 arizona->clk32k_ref--;
74
75 mutex_unlock(&arizona->clk_lock);
76
77 return ret;
78 }
79 EXPORT_SYMBOL_GPL(arizona_clk32k_enable);
80
81 int arizona_clk32k_disable(struct arizona *arizona)
82 {
83 mutex_lock(&arizona->clk_lock);
84
85 BUG_ON(arizona->clk32k_ref <= 0);
86
87 arizona->clk32k_ref--;
88
89 if (arizona->clk32k_ref == 0) {
90 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
91 ARIZONA_CLK_32K_ENA, 0);
92
93 switch (arizona->pdata.clk32k_src) {
94 case ARIZONA_32KZ_MCLK1:
95 pm_runtime_put_sync(arizona->dev);
96 clk_disable_unprepare(arizona->mclk[ARIZONA_MCLK1]);
97 break;
98 case ARIZONA_32KZ_MCLK2:
99 clk_disable_unprepare(arizona->mclk[ARIZONA_MCLK2]);
100 break;
101 }
102 }
103
104 mutex_unlock(&arizona->clk_lock);
105
106 return 0;
107 }
108 EXPORT_SYMBOL_GPL(arizona_clk32k_disable);
109
110 static irqreturn_t arizona_clkgen_err(int irq, void *data)
111 {
112 struct arizona *arizona = data;
113
114 dev_err(arizona->dev, "CLKGEN error\n");
115
116 return IRQ_HANDLED;
117 }
118
119 static irqreturn_t arizona_underclocked(int irq, void *data)
120 {
121 struct arizona *arizona = data;
122 unsigned int val;
123 int ret;
124
125 ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_8,
126 &val);
127 if (ret != 0) {
128 dev_err(arizona->dev, "Failed to read underclock status: %d\n",
129 ret);
130 return IRQ_NONE;
131 }
132
133 if (val & ARIZONA_AIF3_UNDERCLOCKED_STS)
134 dev_err(arizona->dev, "AIF3 underclocked\n");
135 if (val & ARIZONA_AIF2_UNDERCLOCKED_STS)
136 dev_err(arizona->dev, "AIF2 underclocked\n");
137 if (val & ARIZONA_AIF1_UNDERCLOCKED_STS)
138 dev_err(arizona->dev, "AIF1 underclocked\n");
139 if (val & ARIZONA_ISRC3_UNDERCLOCKED_STS)
140 dev_err(arizona->dev, "ISRC3 underclocked\n");
141 if (val & ARIZONA_ISRC2_UNDERCLOCKED_STS)
142 dev_err(arizona->dev, "ISRC2 underclocked\n");
143 if (val & ARIZONA_ISRC1_UNDERCLOCKED_STS)
144 dev_err(arizona->dev, "ISRC1 underclocked\n");
145 if (val & ARIZONA_FX_UNDERCLOCKED_STS)
146 dev_err(arizona->dev, "FX underclocked\n");
147 if (val & ARIZONA_ASRC_UNDERCLOCKED_STS)
148 dev_err(arizona->dev, "ASRC underclocked\n");
149 if (val & ARIZONA_DAC_UNDERCLOCKED_STS)
150 dev_err(arizona->dev, "DAC underclocked\n");
151 if (val & ARIZONA_ADC_UNDERCLOCKED_STS)
152 dev_err(arizona->dev, "ADC underclocked\n");
153 if (val & ARIZONA_MIXER_UNDERCLOCKED_STS)
154 dev_err(arizona->dev, "Mixer dropped sample\n");
155
156 return IRQ_HANDLED;
157 }
158
159 static irqreturn_t arizona_overclocked(int irq, void *data)
160 {
161 struct arizona *arizona = data;
162 unsigned int val[3];
163 int ret;
164
165 ret = regmap_bulk_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_6,
166 &val[0], 3);
167 if (ret != 0) {
168 dev_err(arizona->dev, "Failed to read overclock status: %d\n",
169 ret);
170 return IRQ_NONE;
171 }
172
173 switch (arizona->type) {
174 case WM8998:
175 case WM1814:
176 /* Some bits are shifted on WM8998,
177 * rearrange to match the standard bit layout
178 */
179 val[0] = ((val[0] & 0x60e0) >> 1) |
180 ((val[0] & 0x1e00) >> 2) |
181 (val[0] & 0x000f);
182 break;
183 default:
184 break;
185 }
186
187 if (val[0] & ARIZONA_PWM_OVERCLOCKED_STS)
188 dev_err(arizona->dev, "PWM overclocked\n");
189 if (val[0] & ARIZONA_FX_CORE_OVERCLOCKED_STS)
190 dev_err(arizona->dev, "FX core overclocked\n");
191 if (val[0] & ARIZONA_DAC_SYS_OVERCLOCKED_STS)
192 dev_err(arizona->dev, "DAC SYS overclocked\n");
193 if (val[0] & ARIZONA_DAC_WARP_OVERCLOCKED_STS)
194 dev_err(arizona->dev, "DAC WARP overclocked\n");
195 if (val[0] & ARIZONA_ADC_OVERCLOCKED_STS)
196 dev_err(arizona->dev, "ADC overclocked\n");
197 if (val[0] & ARIZONA_MIXER_OVERCLOCKED_STS)
198 dev_err(arizona->dev, "Mixer overclocked\n");
199 if (val[0] & ARIZONA_AIF3_SYNC_OVERCLOCKED_STS)
200 dev_err(arizona->dev, "AIF3 overclocked\n");
201 if (val[0] & ARIZONA_AIF2_SYNC_OVERCLOCKED_STS)
202 dev_err(arizona->dev, "AIF2 overclocked\n");
203 if (val[0] & ARIZONA_AIF1_SYNC_OVERCLOCKED_STS)
204 dev_err(arizona->dev, "AIF1 overclocked\n");
205 if (val[0] & ARIZONA_PAD_CTRL_OVERCLOCKED_STS)
206 dev_err(arizona->dev, "Pad control overclocked\n");
207
208 if (val[1] & ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS)
209 dev_err(arizona->dev, "Slimbus subsystem overclocked\n");
210 if (val[1] & ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS)
211 dev_err(arizona->dev, "Slimbus async overclocked\n");
212 if (val[1] & ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS)
213 dev_err(arizona->dev, "Slimbus sync overclocked\n");
214 if (val[1] & ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS)
215 dev_err(arizona->dev, "ASRC async system overclocked\n");
216 if (val[1] & ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS)
217 dev_err(arizona->dev, "ASRC async WARP overclocked\n");
218 if (val[1] & ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS)
219 dev_err(arizona->dev, "ASRC sync system overclocked\n");
220 if (val[1] & ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS)
221 dev_err(arizona->dev, "ASRC sync WARP overclocked\n");
222 if (val[1] & ARIZONA_ADSP2_1_OVERCLOCKED_STS)
223 dev_err(arizona->dev, "DSP1 overclocked\n");
224 if (val[1] & ARIZONA_ISRC3_OVERCLOCKED_STS)
225 dev_err(arizona->dev, "ISRC3 overclocked\n");
226 if (val[1] & ARIZONA_ISRC2_OVERCLOCKED_STS)
227 dev_err(arizona->dev, "ISRC2 overclocked\n");
228 if (val[1] & ARIZONA_ISRC1_OVERCLOCKED_STS)
229 dev_err(arizona->dev, "ISRC1 overclocked\n");
230
231 if (val[2] & ARIZONA_SPDIF_OVERCLOCKED_STS)
232 dev_err(arizona->dev, "SPDIF overclocked\n");
233
234 return IRQ_HANDLED;
235 }
236
237 #define ARIZONA_REG_POLL_DELAY_US 7500
238
239 static int arizona_poll_reg(struct arizona *arizona,
240 int timeout_ms, unsigned int reg,
241 unsigned int mask, unsigned int target)
242 {
243 unsigned int val = 0;
244 int ret;
245
246 ret = regmap_read_poll_timeout(arizona->regmap,
247 reg, val, ((val & mask) == target),
248 ARIZONA_REG_POLL_DELAY_US,
249 timeout_ms * 1000);
250 if (ret)
251 dev_err(arizona->dev, "Polling reg 0x%x timed out: %x\n",
252 reg, val);
253
254 return ret;
255 }
256
257 static int arizona_wait_for_boot(struct arizona *arizona)
258 {
259 int ret;
260
261 /*
262 * We can't use an interrupt as we need to runtime resume to do so,
263 * we won't race with the interrupt handler as it'll be blocked on
264 * runtime resume.
265 */
266 ret = arizona_poll_reg(arizona, 30, ARIZONA_INTERRUPT_RAW_STATUS_5,
267 ARIZONA_BOOT_DONE_STS, ARIZONA_BOOT_DONE_STS);
268
269 if (!ret)
270 regmap_write(arizona->regmap, ARIZONA_INTERRUPT_STATUS_5,
271 ARIZONA_BOOT_DONE_STS);
272
273 pm_runtime_mark_last_busy(arizona->dev);
274
275 return ret;
276 }
277
278 static inline void arizona_enable_reset(struct arizona *arizona)
279 {
280 if (arizona->pdata.reset)
281 gpiod_set_raw_value_cansleep(arizona->pdata.reset, 0);
282 }
283
284 static void arizona_disable_reset(struct arizona *arizona)
285 {
286 if (arizona->pdata.reset) {
287 switch (arizona->type) {
288 case WM5110:
289 case WM8280:
290 /* Meet requirements for minimum reset duration */
291 usleep_range(5000, 10000);
292 break;
293 default:
294 break;
295 }
296
297 gpiod_set_raw_value_cansleep(arizona->pdata.reset, 1);
298 usleep_range(1000, 5000);
299 }
300 }
301
302 struct arizona_sysclk_state {
303 unsigned int fll;
304 unsigned int sysclk;
305 };
306
307 static int arizona_enable_freerun_sysclk(struct arizona *arizona,
308 struct arizona_sysclk_state *state)
309 {
310 int ret, err;
311
312 /* Cache existing FLL and SYSCLK settings */
313 ret = regmap_read(arizona->regmap, ARIZONA_FLL1_CONTROL_1, &state->fll);
314 if (ret) {
315 dev_err(arizona->dev, "Failed to cache FLL settings: %d\n",
316 ret);
317 return ret;
318 }
319 ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1,
320 &state->sysclk);
321 if (ret) {
322 dev_err(arizona->dev, "Failed to cache SYSCLK settings: %d\n",
323 ret);
324 return ret;
325 }
326
327 /* Start up SYSCLK using the FLL in free running mode */
328 ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1,
329 ARIZONA_FLL1_ENA | ARIZONA_FLL1_FREERUN);
330 if (ret) {
331 dev_err(arizona->dev,
332 "Failed to start FLL in freerunning mode: %d\n",
333 ret);
334 return ret;
335 }
336 ret = arizona_poll_reg(arizona, 180, ARIZONA_INTERRUPT_RAW_STATUS_5,
337 ARIZONA_FLL1_CLOCK_OK_STS,
338 ARIZONA_FLL1_CLOCK_OK_STS);
339 if (ret)
340 goto err_fll;
341
342 ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, 0x0144);
343 if (ret) {
344 dev_err(arizona->dev, "Failed to start SYSCLK: %d\n", ret);
345 goto err_fll;
346 }
347
348 return 0;
349
350 err_fll:
351 err = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, state->fll);
352 if (err)
353 dev_err(arizona->dev,
354 "Failed to re-apply old FLL settings: %d\n", err);
355
356 return ret;
357 }
358
359 static int arizona_disable_freerun_sysclk(struct arizona *arizona,
360 struct arizona_sysclk_state *state)
361 {
362 int ret;
363
364 ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1,
365 state->sysclk);
366 if (ret) {
367 dev_err(arizona->dev,
368 "Failed to re-apply old SYSCLK settings: %d\n", ret);
369 return ret;
370 }
371
372 ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, state->fll);
373 if (ret) {
374 dev_err(arizona->dev,
375 "Failed to re-apply old FLL settings: %d\n", ret);
376 return ret;
377 }
378
379 return 0;
380 }
381
382 static int wm5102_apply_hardware_patch(struct arizona *arizona)
383 {
384 struct arizona_sysclk_state state;
385 int err, ret;
386
387 ret = arizona_enable_freerun_sysclk(arizona, &state);
388 if (ret)
389 return ret;
390
391 /* Start the write sequencer and wait for it to finish */
392 ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0,
393 ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | 160);
394 if (ret) {
395 dev_err(arizona->dev, "Failed to start write sequencer: %d\n",
396 ret);
397 goto err;
398 }
399
400 ret = arizona_poll_reg(arizona, 30, ARIZONA_WRITE_SEQUENCER_CTRL_1,
401 ARIZONA_WSEQ_BUSY, 0);
402 if (ret)
403 regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0,
404 ARIZONA_WSEQ_ABORT);
405
406 err:
407 err = arizona_disable_freerun_sysclk(arizona, &state);
408
409 return ret ?: err;
410 }
411
412 /*
413 * Register patch to some of the CODECs internal write sequences
414 * to ensure a clean exit from the low power sleep state.
415 */
416 static const struct reg_sequence wm5110_sleep_patch[] = {
417 { 0x337A, 0xC100 },
418 { 0x337B, 0x0041 },
419 { 0x3300, 0xA210 },
420 { 0x3301, 0x050C },
421 };
422
423 static int wm5110_apply_sleep_patch(struct arizona *arizona)
424 {
425 struct arizona_sysclk_state state;
426 int err, ret;
427
428 ret = arizona_enable_freerun_sysclk(arizona, &state);
429 if (ret)
430 return ret;
431
432 ret = regmap_multi_reg_write_bypassed(arizona->regmap,
433 wm5110_sleep_patch,
434 ARRAY_SIZE(wm5110_sleep_patch));
435
436 err = arizona_disable_freerun_sysclk(arizona, &state);
437
438 return ret ?: err;
439 }
440
441 static int wm5102_clear_write_sequencer(struct arizona *arizona)
442 {
443 int ret;
444
445 ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_3,
446 0x0);
447 if (ret) {
448 dev_err(arizona->dev,
449 "Failed to clear write sequencer state: %d\n", ret);
450 return ret;
451 }
452
453 arizona_enable_reset(arizona);
454 regulator_disable(arizona->dcvdd);
455
456 msleep(20);
457
458 ret = regulator_enable(arizona->dcvdd);
459 if (ret) {
460 dev_err(arizona->dev, "Failed to re-enable DCVDD: %d\n", ret);
461 return ret;
462 }
463 arizona_disable_reset(arizona);
464
465 return 0;
466 }
467
468 #ifdef CONFIG_PM
469 static int arizona_isolate_dcvdd(struct arizona *arizona)
470 {
471 int ret;
472
473 ret = regmap_update_bits(arizona->regmap,
474 ARIZONA_ISOLATION_CONTROL,
475 ARIZONA_ISOLATE_DCVDD1,
476 ARIZONA_ISOLATE_DCVDD1);
477 if (ret != 0)
478 dev_err(arizona->dev, "Failed to isolate DCVDD: %d\n", ret);
479
480 return ret;
481 }
482
483 static int arizona_connect_dcvdd(struct arizona *arizona)
484 {
485 int ret;
486
487 ret = regmap_update_bits(arizona->regmap,
488 ARIZONA_ISOLATION_CONTROL,
489 ARIZONA_ISOLATE_DCVDD1, 0);
490 if (ret != 0)
491 dev_err(arizona->dev, "Failed to connect DCVDD: %d\n", ret);
492
493 return ret;
494 }
495
496 static int arizona_is_jack_det_active(struct arizona *arizona)
497 {
498 unsigned int val;
499 int ret;
500
501 ret = regmap_read(arizona->regmap, ARIZONA_JACK_DETECT_ANALOGUE, &val);
502 if (ret) {
503 dev_err(arizona->dev,
504 "Failed to check jack det status: %d\n", ret);
505 return ret;
506 } else if (val & ARIZONA_JD1_ENA) {
507 return 1;
508 } else {
509 return 0;
510 }
511 }
512
513 static int arizona_runtime_resume(struct device *dev)
514 {
515 struct arizona *arizona = dev_get_drvdata(dev);
516 int ret;
517
518 dev_dbg(arizona->dev, "Leaving AoD mode\n");
519
520 if (arizona->has_fully_powered_off) {
521 dev_dbg(arizona->dev, "Re-enabling core supplies\n");
522
523 ret = regulator_bulk_enable(arizona->num_core_supplies,
524 arizona->core_supplies);
525 if (ret) {
526 dev_err(dev, "Failed to enable core supplies: %d\n",
527 ret);
528 return ret;
529 }
530 }
531
532 ret = regulator_enable(arizona->dcvdd);
533 if (ret != 0) {
534 dev_err(arizona->dev, "Failed to enable DCVDD: %d\n", ret);
535 if (arizona->has_fully_powered_off)
536 regulator_bulk_disable(arizona->num_core_supplies,
537 arizona->core_supplies);
538 return ret;
539 }
540
541 if (arizona->has_fully_powered_off) {
542 arizona_disable_reset(arizona);
543 enable_irq(arizona->irq);
544 arizona->has_fully_powered_off = false;
545 }
546
547 regcache_cache_only(arizona->regmap, false);
548
549 switch (arizona->type) {
550 case WM5102:
551 if (arizona->external_dcvdd) {
552 ret = arizona_connect_dcvdd(arizona);
553 if (ret != 0)
554 goto err;
555 }
556
557 ret = wm5102_patch(arizona);
558 if (ret != 0) {
559 dev_err(arizona->dev, "Failed to apply patch: %d\n",
560 ret);
561 goto err;
562 }
563
564 ret = wm5102_apply_hardware_patch(arizona);
565 if (ret) {
566 dev_err(arizona->dev,
567 "Failed to apply hardware patch: %d\n",
568 ret);
569 goto err;
570 }
571 break;
572 case WM5110:
573 case WM8280:
574 ret = arizona_wait_for_boot(arizona);
575 if (ret)
576 goto err;
577
578 if (arizona->external_dcvdd) {
579 ret = arizona_connect_dcvdd(arizona);
580 if (ret != 0)
581 goto err;
582 } else {
583 /*
584 * As this is only called for the internal regulator
585 * (where we know voltage ranges available) it is ok
586 * to request an exact range.
587 */
588 ret = regulator_set_voltage(arizona->dcvdd,
589 1200000, 1200000);
590 if (ret < 0) {
591 dev_err(arizona->dev,
592 "Failed to set resume voltage: %d\n",
593 ret);
594 goto err;
595 }
596 }
597
598 ret = wm5110_apply_sleep_patch(arizona);
599 if (ret) {
600 dev_err(arizona->dev,
601 "Failed to re-apply sleep patch: %d\n",
602 ret);
603 goto err;
604 }
605 break;
606 case WM1831:
607 case CS47L24:
608 ret = arizona_wait_for_boot(arizona);
609 if (ret != 0)
610 goto err;
611 break;
612 default:
613 ret = arizona_wait_for_boot(arizona);
614 if (ret != 0)
615 goto err;
616
617 if (arizona->external_dcvdd) {
618 ret = arizona_connect_dcvdd(arizona);
619 if (ret != 0)
620 goto err;
621 }
622 break;
623 }
624
625 ret = regcache_sync(arizona->regmap);
626 if (ret != 0) {
627 dev_err(arizona->dev, "Failed to restore register cache\n");
628 goto err;
629 }
630
631 return 0;
632
633 err:
634 regcache_cache_only(arizona->regmap, true);
635 regulator_disable(arizona->dcvdd);
636 return ret;
637 }
638
639 static int arizona_runtime_suspend(struct device *dev)
640 {
641 struct arizona *arizona = dev_get_drvdata(dev);
642 int jd_active = 0;
643 int ret;
644
645 dev_dbg(arizona->dev, "Entering AoD mode\n");
646
647 switch (arizona->type) {
648 case WM5110:
649 case WM8280:
650 jd_active = arizona_is_jack_det_active(arizona);
651 if (jd_active < 0)
652 return jd_active;
653
654 if (arizona->external_dcvdd) {
655 ret = arizona_isolate_dcvdd(arizona);
656 if (ret != 0)
657 return ret;
658 } else {
659 /*
660 * As this is only called for the internal regulator
661 * (where we know voltage ranges available) it is ok
662 * to request an exact range.
663 */
664 ret = regulator_set_voltage(arizona->dcvdd,
665 1175000, 1175000);
666 if (ret < 0) {
667 dev_err(arizona->dev,
668 "Failed to set suspend voltage: %d\n",
669 ret);
670 return ret;
671 }
672 }
673 break;
674 case WM5102:
675 jd_active = arizona_is_jack_det_active(arizona);
676 if (jd_active < 0)
677 return jd_active;
678
679 if (arizona->external_dcvdd) {
680 ret = arizona_isolate_dcvdd(arizona);
681 if (ret != 0)
682 return ret;
683 }
684
685 if (!jd_active) {
686 ret = regmap_write(arizona->regmap,
687 ARIZONA_WRITE_SEQUENCER_CTRL_3, 0x0);
688 if (ret) {
689 dev_err(arizona->dev,
690 "Failed to clear write sequencer: %d\n",
691 ret);
692 return ret;
693 }
694 }
695 break;
696 case WM1831:
697 case CS47L24:
698 break;
699 default:
700 jd_active = arizona_is_jack_det_active(arizona);
701 if (jd_active < 0)
702 return jd_active;
703
704 if (arizona->external_dcvdd) {
705 ret = arizona_isolate_dcvdd(arizona);
706 if (ret != 0)
707 return ret;
708 }
709 break;
710 }
711
712 regcache_cache_only(arizona->regmap, true);
713 regcache_mark_dirty(arizona->regmap);
714 regulator_disable(arizona->dcvdd);
715
716 /* Allow us to completely power down if no jack detection */
717 if (!jd_active) {
718 dev_dbg(arizona->dev, "Fully powering off\n");
719
720 arizona->has_fully_powered_off = true;
721
722 disable_irq_nosync(arizona->irq);
723 arizona_enable_reset(arizona);
724 regulator_bulk_disable(arizona->num_core_supplies,
725 arizona->core_supplies);
726 }
727
728 return 0;
729 }
730 #endif
731
732 #ifdef CONFIG_PM_SLEEP
733 static int arizona_suspend(struct device *dev)
734 {
735 struct arizona *arizona = dev_get_drvdata(dev);
736
737 dev_dbg(arizona->dev, "Suspend, disabling IRQ\n");
738 disable_irq(arizona->irq);
739
740 return 0;
741 }
742
743 static int arizona_suspend_noirq(struct device *dev)
744 {
745 struct arizona *arizona = dev_get_drvdata(dev);
746
747 dev_dbg(arizona->dev, "Late suspend, reenabling IRQ\n");
748 enable_irq(arizona->irq);
749
750 return 0;
751 }
752
753 static int arizona_resume_noirq(struct device *dev)
754 {
755 struct arizona *arizona = dev_get_drvdata(dev);
756
757 dev_dbg(arizona->dev, "Early resume, disabling IRQ\n");
758 disable_irq(arizona->irq);
759
760 return 0;
761 }
762
763 static int arizona_resume(struct device *dev)
764 {
765 struct arizona *arizona = dev_get_drvdata(dev);
766
767 dev_dbg(arizona->dev, "Resume, reenabling IRQ\n");
768 enable_irq(arizona->irq);
769
770 return 0;
771 }
772 #endif
773
774 const struct dev_pm_ops arizona_pm_ops = {
775 SET_RUNTIME_PM_OPS(arizona_runtime_suspend,
776 arizona_runtime_resume,
777 NULL)
778 SET_SYSTEM_SLEEP_PM_OPS(arizona_suspend, arizona_resume)
779 SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(arizona_suspend_noirq,
780 arizona_resume_noirq)
781 };
782 EXPORT_SYMBOL_GPL(arizona_pm_ops);
783
784 #ifdef CONFIG_OF
785 unsigned long arizona_of_get_type(struct device *dev)
786 {
787 const struct of_device_id *id = of_match_device(arizona_of_match, dev);
788
789 if (id)
790 return (unsigned long)id->data;
791 else
792 return 0;
793 }
794 EXPORT_SYMBOL_GPL(arizona_of_get_type);
795
796 static int arizona_of_get_core_pdata(struct arizona *arizona)
797 {
798 struct arizona_pdata *pdata = &arizona->pdata;
799 int ret, i;
800
801 /* Handle old non-standard DT binding */
802 pdata->reset = devm_gpiod_get_from_of_node(arizona->dev,
803 arizona->dev->of_node,
804 "wlf,reset", 0,
805 GPIOD_OUT_LOW,
806 "arizona /RESET");
807 if (IS_ERR(pdata->reset)) {
808 ret = PTR_ERR(pdata->reset);
809
810 /*
811 * Reset missing will be caught when other binding is read
812 * but all other errors imply this binding is in use but has
813 * encountered a problem so should be handled.
814 */
815 if (ret == -EPROBE_DEFER)
816 return ret;
817 else if (ret != -ENOENT && ret != -ENOSYS)
818 dev_err(arizona->dev, "Reset GPIO malformed: %d\n",
819 ret);
820
821 pdata->reset = NULL;
822 }
823
824 ret = of_property_read_u32_array(arizona->dev->of_node,
825 "wlf,gpio-defaults",
826 pdata->gpio_defaults,
827 ARRAY_SIZE(pdata->gpio_defaults));
828 if (ret >= 0) {
829 /*
830 * All values are literal except out of range values
831 * which are chip default, translate into platform
832 * data which uses 0 as chip default and out of range
833 * as zero.
834 */
835 for (i = 0; i < ARRAY_SIZE(pdata->gpio_defaults); i++) {
836 if (pdata->gpio_defaults[i] > 0xffff)
837 pdata->gpio_defaults[i] = 0;
838 else if (pdata->gpio_defaults[i] == 0)
839 pdata->gpio_defaults[i] = 0x10000;
840 }
841 } else {
842 dev_err(arizona->dev, "Failed to parse GPIO defaults: %d\n",
843 ret);
844 }
845
846 return 0;
847 }
848
849 const struct of_device_id arizona_of_match[] = {
850 { .compatible = "wlf,wm5102", .data = (void *)WM5102 },
851 { .compatible = "wlf,wm5110", .data = (void *)WM5110 },
852 { .compatible = "wlf,wm8280", .data = (void *)WM8280 },
853 { .compatible = "wlf,wm8997", .data = (void *)WM8997 },
854 { .compatible = "wlf,wm8998", .data = (void *)WM8998 },
855 { .compatible = "wlf,wm1814", .data = (void *)WM1814 },
856 { .compatible = "wlf,wm1831", .data = (void *)WM1831 },
857 { .compatible = "cirrus,cs47l24", .data = (void *)CS47L24 },
858 {},
859 };
860 EXPORT_SYMBOL_GPL(arizona_of_match);
861 #else
862 static inline int arizona_of_get_core_pdata(struct arizona *arizona)
863 {
864 return 0;
865 }
866 #endif
867
868 static const struct mfd_cell early_devs[] = {
869 { .name = "arizona-ldo1" },
870 };
871
872 static const char * const wm5102_supplies[] = {
873 "MICVDD",
874 "DBVDD2",
875 "DBVDD3",
876 "CPVDD",
877 "SPKVDDL",
878 "SPKVDDR",
879 };
880
881 static const struct mfd_cell wm5102_devs[] = {
882 { .name = "arizona-micsupp" },
883 { .name = "arizona-gpio" },
884 {
885 .name = "arizona-extcon",
886 .parent_supplies = wm5102_supplies,
887 .num_parent_supplies = 1, /* We only need MICVDD */
888 },
889 { .name = "arizona-haptics" },
890 { .name = "arizona-pwm" },
891 {
892 .name = "wm5102-codec",
893 .parent_supplies = wm5102_supplies,
894 .num_parent_supplies = ARRAY_SIZE(wm5102_supplies),
895 },
896 };
897
898 static const struct mfd_cell wm5110_devs[] = {
899 { .name = "arizona-micsupp" },
900 { .name = "arizona-gpio" },
901 {
902 .name = "arizona-extcon",
903 .parent_supplies = wm5102_supplies,
904 .num_parent_supplies = 1, /* We only need MICVDD */
905 },
906 { .name = "arizona-haptics" },
907 { .name = "arizona-pwm" },
908 {
909 .name = "wm5110-codec",
910 .parent_supplies = wm5102_supplies,
911 .num_parent_supplies = ARRAY_SIZE(wm5102_supplies),
912 },
913 };
914
915 static const char * const cs47l24_supplies[] = {
916 "MICVDD",
917 "CPVDD",
918 "SPKVDD",
919 };
920
921 static const struct mfd_cell cs47l24_devs[] = {
922 { .name = "arizona-gpio" },
923 { .name = "arizona-haptics" },
924 { .name = "arizona-pwm" },
925 {
926 .name = "cs47l24-codec",
927 .parent_supplies = cs47l24_supplies,
928 .num_parent_supplies = ARRAY_SIZE(cs47l24_supplies),
929 },
930 };
931
932 static const char * const wm8997_supplies[] = {
933 "MICVDD",
934 "DBVDD2",
935 "CPVDD",
936 "SPKVDD",
937 };
938
939 static const struct mfd_cell wm8997_devs[] = {
940 { .name = "arizona-micsupp" },
941 { .name = "arizona-gpio" },
942 {
943 .name = "arizona-extcon",
944 .parent_supplies = wm8997_supplies,
945 .num_parent_supplies = 1, /* We only need MICVDD */
946 },
947 { .name = "arizona-haptics" },
948 { .name = "arizona-pwm" },
949 {
950 .name = "wm8997-codec",
951 .parent_supplies = wm8997_supplies,
952 .num_parent_supplies = ARRAY_SIZE(wm8997_supplies),
953 },
954 };
955
956 static const struct mfd_cell wm8998_devs[] = {
957 { .name = "arizona-micsupp" },
958 { .name = "arizona-gpio" },
959 {
960 .name = "arizona-extcon",
961 .parent_supplies = wm5102_supplies,
962 .num_parent_supplies = 1, /* We only need MICVDD */
963 },
964 { .name = "arizona-haptics" },
965 { .name = "arizona-pwm" },
966 {
967 .name = "wm8998-codec",
968 .parent_supplies = wm5102_supplies,
969 .num_parent_supplies = ARRAY_SIZE(wm5102_supplies),
970 },
971 };
972
973 int arizona_dev_init(struct arizona *arizona)
974 {
975 const char * const mclk_name[] = { "mclk1", "mclk2" };
976 struct device *dev = arizona->dev;
977 const char *type_name = NULL;
978 unsigned int reg, val;
979 int (*apply_patch)(struct arizona *) = NULL;
980 const struct mfd_cell *subdevs = NULL;
981 int n_subdevs, ret, i;
982
983 dev_set_drvdata(arizona->dev, arizona);
984 mutex_init(&arizona->clk_lock);
985
986 if (dev_get_platdata(arizona->dev)) {
987 memcpy(&arizona->pdata, dev_get_platdata(arizona->dev),
988 sizeof(arizona->pdata));
989 } else {
990 ret = arizona_of_get_core_pdata(arizona);
991 if (ret < 0)
992 return ret;
993 }
994
995 BUILD_BUG_ON(ARRAY_SIZE(arizona->mclk) != ARRAY_SIZE(mclk_name));
996 for (i = 0; i < ARRAY_SIZE(arizona->mclk); i++) {
997 arizona->mclk[i] = devm_clk_get(arizona->dev, mclk_name[i]);
998 if (IS_ERR(arizona->mclk[i])) {
999 dev_info(arizona->dev, "Failed to get %s: %ld\n",
1000 mclk_name[i], PTR_ERR(arizona->mclk[i]));
1001 arizona->mclk[i] = NULL;
1002 }
1003 }
1004
1005 regcache_cache_only(arizona->regmap, true);
1006
1007 switch (arizona->type) {
1008 case WM5102:
1009 case WM5110:
1010 case WM8280:
1011 case WM8997:
1012 case WM8998:
1013 case WM1814:
1014 case WM1831:
1015 case CS47L24:
1016 for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++)
1017 arizona->core_supplies[i].supply
1018 = wm5102_core_supplies[i];
1019 arizona->num_core_supplies = ARRAY_SIZE(wm5102_core_supplies);
1020 break;
1021 default:
1022 dev_err(arizona->dev, "Unknown device type %d\n",
1023 arizona->type);
1024 return -ENODEV;
1025 }
1026
1027 /* Mark DCVDD as external, LDO1 driver will clear if internal */
1028 arizona->external_dcvdd = true;
1029
1030 switch (arizona->type) {
1031 case WM1831:
1032 case CS47L24:
1033 break; /* No LDO1 regulator */
1034 default:
1035 ret = mfd_add_devices(arizona->dev, -1, early_devs,
1036 ARRAY_SIZE(early_devs), NULL, 0, NULL);
1037 if (ret != 0) {
1038 dev_err(dev, "Failed to add early children: %d\n", ret);
1039 return ret;
1040 }
1041 break;
1042 }
1043
1044 ret = devm_regulator_bulk_get(dev, arizona->num_core_supplies,
1045 arizona->core_supplies);
1046 if (ret != 0) {
1047 dev_err(dev, "Failed to request core supplies: %d\n",
1048 ret);
1049 goto err_early;
1050 }
1051
1052 /**
1053 * Don't use devres here because the only device we have to get
1054 * against is the MFD device and DCVDD will likely be supplied by
1055 * one of its children. Meaning that the regulator will be
1056 * destroyed by the time devres calls regulator put.
1057 */
1058 arizona->dcvdd = regulator_get(arizona->dev, "DCVDD");
1059 if (IS_ERR(arizona->dcvdd)) {
1060 ret = PTR_ERR(arizona->dcvdd);
1061 dev_err(dev, "Failed to request DCVDD: %d\n", ret);
1062 goto err_early;
1063 }
1064
1065 if (!arizona->pdata.reset) {
1066 /* Start out with /RESET low to put the chip into reset */
1067 arizona->pdata.reset = devm_gpiod_get(arizona->dev, "reset",
1068 GPIOD_OUT_LOW);
1069 if (IS_ERR(arizona->pdata.reset)) {
1070 ret = PTR_ERR(arizona->pdata.reset);
1071 if (ret == -EPROBE_DEFER)
1072 goto err_dcvdd;
1073
1074 dev_err(arizona->dev,
1075 "Reset GPIO missing/malformed: %d\n", ret);
1076
1077 arizona->pdata.reset = NULL;
1078 }
1079 }
1080
1081 ret = regulator_bulk_enable(arizona->num_core_supplies,
1082 arizona->core_supplies);
1083 if (ret != 0) {
1084 dev_err(dev, "Failed to enable core supplies: %d\n",
1085 ret);
1086 goto err_dcvdd;
1087 }
1088
1089 ret = regulator_enable(arizona->dcvdd);
1090 if (ret != 0) {
1091 dev_err(dev, "Failed to enable DCVDD: %d\n", ret);
1092 goto err_enable;
1093 }
1094
1095 arizona_disable_reset(arizona);
1096
1097 regcache_cache_only(arizona->regmap, false);
1098
1099 /* Verify that this is a chip we know about */
1100 ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, &reg);
1101 if (ret != 0) {
1102 dev_err(dev, "Failed to read ID register: %d\n", ret);
1103 goto err_reset;
1104 }
1105
1106 switch (reg) {
1107 case 0x5102:
1108 case 0x5110:
1109 case 0x6349:
1110 case 0x6363:
1111 case 0x8997:
1112 break;
1113 default:
1114 dev_err(arizona->dev, "Unknown device ID: %x\n", reg);
1115 ret = -ENODEV;
1116 goto err_reset;
1117 }
1118
1119 /* If we have a /RESET GPIO we'll already be reset */
1120 if (!arizona->pdata.reset) {
1121 ret = regmap_write(arizona->regmap, ARIZONA_SOFTWARE_RESET, 0);
1122 if (ret != 0) {
1123 dev_err(dev, "Failed to reset device: %d\n", ret);
1124 goto err_reset;
1125 }
1126
1127 usleep_range(1000, 5000);
1128 }
1129
1130 /* Ensure device startup is complete */
1131 switch (arizona->type) {
1132 case WM5102:
1133 ret = regmap_read(arizona->regmap,
1134 ARIZONA_WRITE_SEQUENCER_CTRL_3, &val);
1135 if (ret) {
1136 dev_err(dev,
1137 "Failed to check write sequencer state: %d\n",
1138 ret);
1139 } else if (val & 0x01) {
1140 ret = wm5102_clear_write_sequencer(arizona);
1141 if (ret)
1142 return ret;
1143 }
1144 break;
1145 default:
1146 break;
1147 }
1148
1149 ret = arizona_wait_for_boot(arizona);
1150 if (ret) {
1151 dev_err(arizona->dev, "Device failed initial boot: %d\n", ret);
1152 goto err_reset;
1153 }
1154
1155 /* Read the device ID information & do device specific stuff */
1156 ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, &reg);
1157 if (ret != 0) {
1158 dev_err(dev, "Failed to read ID register: %d\n", ret);
1159 goto err_reset;
1160 }
1161
1162 ret = regmap_read(arizona->regmap, ARIZONA_DEVICE_REVISION,
1163 &arizona->rev);
1164 if (ret != 0) {
1165 dev_err(dev, "Failed to read revision register: %d\n", ret);
1166 goto err_reset;
1167 }
1168 arizona->rev &= ARIZONA_DEVICE_REVISION_MASK;
1169
1170 switch (reg) {
1171 case 0x5102:
1172 if (IS_ENABLED(CONFIG_MFD_WM5102)) {
1173 type_name = "WM5102";
1174 if (arizona->type != WM5102) {
1175 dev_warn(arizona->dev,
1176 "WM5102 registered as %d\n",
1177 arizona->type);
1178 arizona->type = WM5102;
1179 }
1180
1181 apply_patch = wm5102_patch;
1182 arizona->rev &= 0x7;
1183 subdevs = wm5102_devs;
1184 n_subdevs = ARRAY_SIZE(wm5102_devs);
1185 }
1186 break;
1187 case 0x5110:
1188 if (IS_ENABLED(CONFIG_MFD_WM5110)) {
1189 switch (arizona->type) {
1190 case WM5110:
1191 type_name = "WM5110";
1192 break;
1193 case WM8280:
1194 type_name = "WM8280";
1195 break;
1196 default:
1197 type_name = "WM5110";
1198 dev_warn(arizona->dev,
1199 "WM5110 registered as %d\n",
1200 arizona->type);
1201 arizona->type = WM5110;
1202 break;
1203 }
1204
1205 apply_patch = wm5110_patch;
1206 subdevs = wm5110_devs;
1207 n_subdevs = ARRAY_SIZE(wm5110_devs);
1208 }
1209 break;
1210 case 0x6363:
1211 if (IS_ENABLED(CONFIG_MFD_CS47L24)) {
1212 switch (arizona->type) {
1213 case CS47L24:
1214 type_name = "CS47L24";
1215 break;
1216
1217 case WM1831:
1218 type_name = "WM1831";
1219 break;
1220
1221 default:
1222 dev_warn(arizona->dev,
1223 "CS47L24 registered as %d\n",
1224 arizona->type);
1225 arizona->type = CS47L24;
1226 break;
1227 }
1228
1229 apply_patch = cs47l24_patch;
1230 subdevs = cs47l24_devs;
1231 n_subdevs = ARRAY_SIZE(cs47l24_devs);
1232 }
1233 break;
1234 case 0x8997:
1235 if (IS_ENABLED(CONFIG_MFD_WM8997)) {
1236 type_name = "WM8997";
1237 if (arizona->type != WM8997) {
1238 dev_warn(arizona->dev,
1239 "WM8997 registered as %d\n",
1240 arizona->type);
1241 arizona->type = WM8997;
1242 }
1243
1244 apply_patch = wm8997_patch;
1245 subdevs = wm8997_devs;
1246 n_subdevs = ARRAY_SIZE(wm8997_devs);
1247 }
1248 break;
1249 case 0x6349:
1250 if (IS_ENABLED(CONFIG_MFD_WM8998)) {
1251 switch (arizona->type) {
1252 case WM8998:
1253 type_name = "WM8998";
1254 break;
1255
1256 case WM1814:
1257 type_name = "WM1814";
1258 break;
1259
1260 default:
1261 type_name = "WM8998";
1262 dev_warn(arizona->dev,
1263 "WM8998 registered as %d\n",
1264 arizona->type);
1265 arizona->type = WM8998;
1266 }
1267
1268 apply_patch = wm8998_patch;
1269 subdevs = wm8998_devs;
1270 n_subdevs = ARRAY_SIZE(wm8998_devs);
1271 }
1272 break;
1273 default:
1274 dev_err(arizona->dev, "Unknown device ID %x\n", reg);
1275 ret = -ENODEV;
1276 goto err_reset;
1277 }
1278
1279 if (!subdevs) {
1280 dev_err(arizona->dev,
1281 "No kernel support for device ID %x\n", reg);
1282 ret = -ENODEV;
1283 goto err_reset;
1284 }
1285
1286 dev_info(dev, "%s revision %c\n", type_name, arizona->rev + 'A');
1287
1288 if (apply_patch) {
1289 ret = apply_patch(arizona);
1290 if (ret != 0) {
1291 dev_err(arizona->dev, "Failed to apply patch: %d\n",
1292 ret);
1293 goto err_reset;
1294 }
1295
1296 switch (arizona->type) {
1297 case WM5102:
1298 ret = wm5102_apply_hardware_patch(arizona);
1299 if (ret) {
1300 dev_err(arizona->dev,
1301 "Failed to apply hardware patch: %d\n",
1302 ret);
1303 goto err_reset;
1304 }
1305 break;
1306 case WM5110:
1307 case WM8280:
1308 ret = wm5110_apply_sleep_patch(arizona);
1309 if (ret) {
1310 dev_err(arizona->dev,
1311 "Failed to apply sleep patch: %d\n",
1312 ret);
1313 goto err_reset;
1314 }
1315 break;
1316 default:
1317 break;
1318 }
1319 }
1320
1321 for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) {
1322 if (!arizona->pdata.gpio_defaults[i])
1323 continue;
1324
1325 regmap_write(arizona->regmap, ARIZONA_GPIO1_CTRL + i,
1326 arizona->pdata.gpio_defaults[i]);
1327 }
1328
1329 /* Chip default */
1330 if (!arizona->pdata.clk32k_src)
1331 arizona->pdata.clk32k_src = ARIZONA_32KZ_MCLK2;
1332
1333 switch (arizona->pdata.clk32k_src) {
1334 case ARIZONA_32KZ_MCLK1:
1335 case ARIZONA_32KZ_MCLK2:
1336 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
1337 ARIZONA_CLK_32K_SRC_MASK,
1338 arizona->pdata.clk32k_src - 1);
1339 arizona_clk32k_enable(arizona);
1340 break;
1341 case ARIZONA_32KZ_NONE:
1342 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
1343 ARIZONA_CLK_32K_SRC_MASK, 2);
1344 break;
1345 default:
1346 dev_err(arizona->dev, "Invalid 32kHz clock source: %d\n",
1347 arizona->pdata.clk32k_src);
1348 ret = -EINVAL;
1349 goto err_reset;
1350 }
1351
1352 for (i = 0; i < ARIZONA_MAX_MICBIAS; i++) {
1353 if (!arizona->pdata.micbias[i].mV &&
1354 !arizona->pdata.micbias[i].bypass)
1355 continue;
1356
1357 /* Apply default for bypass mode */
1358 if (!arizona->pdata.micbias[i].mV)
1359 arizona->pdata.micbias[i].mV = 2800;
1360
1361 val = (arizona->pdata.micbias[i].mV - 1500) / 100;
1362
1363 val <<= ARIZONA_MICB1_LVL_SHIFT;
1364
1365 if (arizona->pdata.micbias[i].ext_cap)
1366 val |= ARIZONA_MICB1_EXT_CAP;
1367
1368 if (arizona->pdata.micbias[i].discharge)
1369 val |= ARIZONA_MICB1_DISCH;
1370
1371 if (arizona->pdata.micbias[i].soft_start)
1372 val |= ARIZONA_MICB1_RATE;
1373
1374 if (arizona->pdata.micbias[i].bypass)
1375 val |= ARIZONA_MICB1_BYPASS;
1376
1377 regmap_update_bits(arizona->regmap,
1378 ARIZONA_MIC_BIAS_CTRL_1 + i,
1379 ARIZONA_MICB1_LVL_MASK |
1380 ARIZONA_MICB1_EXT_CAP |
1381 ARIZONA_MICB1_DISCH |
1382 ARIZONA_MICB1_BYPASS |
1383 ARIZONA_MICB1_RATE, val);
1384 }
1385
1386 pm_runtime_set_active(arizona->dev);
1387 pm_runtime_enable(arizona->dev);
1388
1389 /* Set up for interrupts */
1390 ret = arizona_irq_init(arizona);
1391 if (ret != 0)
1392 goto err_pm;
1393
1394 pm_runtime_set_autosuspend_delay(arizona->dev, 100);
1395 pm_runtime_use_autosuspend(arizona->dev);
1396
1397 arizona_request_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, "CLKGEN error",
1398 arizona_clkgen_err, arizona);
1399 arizona_request_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, "Overclocked",
1400 arizona_overclocked, arizona);
1401 arizona_request_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, "Underclocked",
1402 arizona_underclocked, arizona);
1403
1404 ret = mfd_add_devices(arizona->dev, PLATFORM_DEVID_NONE,
1405 subdevs, n_subdevs, NULL, 0, NULL);
1406
1407 if (ret) {
1408 dev_err(arizona->dev, "Failed to add subdevices: %d\n", ret);
1409 goto err_irq;
1410 }
1411
1412 return 0;
1413
1414 err_irq:
1415 arizona_irq_exit(arizona);
1416 err_pm:
1417 pm_runtime_disable(arizona->dev);
1418 err_reset:
1419 arizona_enable_reset(arizona);
1420 regulator_disable(arizona->dcvdd);
1421 err_enable:
1422 regulator_bulk_disable(arizona->num_core_supplies,
1423 arizona->core_supplies);
1424 err_dcvdd:
1425 regulator_put(arizona->dcvdd);
1426 err_early:
1427 mfd_remove_devices(dev);
1428 return ret;
1429 }
1430 EXPORT_SYMBOL_GPL(arizona_dev_init);
1431
1432 int arizona_dev_exit(struct arizona *arizona)
1433 {
1434 disable_irq(arizona->irq);
1435 pm_runtime_disable(arizona->dev);
1436
1437 regulator_disable(arizona->dcvdd);
1438 regulator_put(arizona->dcvdd);
1439
1440 mfd_remove_devices(arizona->dev);
1441 arizona_free_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, arizona);
1442 arizona_free_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, arizona);
1443 arizona_free_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, arizona);
1444 arizona_irq_exit(arizona);
1445 arizona_enable_reset(arizona);
1446
1447 regulator_bulk_disable(arizona->num_core_supplies,
1448 arizona->core_supplies);
1449 return 0;
1450 }
1451 EXPORT_SYMBOL_GPL(arizona_dev_exit);
Linux with added FPC-III support