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x86/ldt: Further fix FPU emulation
[linux/fpc-iii.git] / drivers / net / ethernet / sfc / mcdi.c
blob81640f8bb811b099f6b2afb55cbb55f004c1096e
1 /****************************************************************************
2 * Driver for Solarflare network controllers and boards
3 * Copyright 2008-2013 Solarflare Communications Inc.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published
7 * by the Free Software Foundation, incorporated herein by reference.
8 */
9
10 #include <linux/delay.h>
11 #include <linux/moduleparam.h>
12 #include <asm/cmpxchg.h>
13 #include "net_driver.h"
14 #include "nic.h"
15 #include "io.h"
16 #include "farch_regs.h"
17 #include "mcdi_pcol.h"
18 #include "phy.h"
19
20 /**************************************************************************
21 *
22 * Management-Controller-to-Driver Interface
23 *
24 **************************************************************************
25 */
26
27 #define MCDI_RPC_TIMEOUT (10 * HZ)
28
29 /* A reboot/assertion causes the MCDI status word to be set after the
30 * command word is set or a REBOOT event is sent. If we notice a reboot
31 * via these mechanisms then wait 250ms for the status word to be set.
32 */
33 #define MCDI_STATUS_DELAY_US 100
34 #define MCDI_STATUS_DELAY_COUNT 2500
35 #define MCDI_STATUS_SLEEP_MS \
36 (MCDI_STATUS_DELAY_US * MCDI_STATUS_DELAY_COUNT / 1000)
37
38 #define SEQ_MASK \
39 EFX_MASK32(EFX_WIDTH(MCDI_HEADER_SEQ))
40
41 struct efx_mcdi_async_param {
42 struct list_head list;
43 unsigned int cmd;
44 size_t inlen;
45 size_t outlen;
46 bool quiet;
47 efx_mcdi_async_completer *complete;
48 unsigned long cookie;
49 /* followed by request/response buffer */
50 };
51
52 static void efx_mcdi_timeout_async(unsigned long context);
53 static int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating,
54 bool *was_attached_out);
55 static bool efx_mcdi_poll_once(struct efx_nic *efx);
56 static void efx_mcdi_abandon(struct efx_nic *efx);
57
58 #ifdef CONFIG_SFC_MCDI_LOGGING
59 static bool mcdi_logging_default;
60 module_param(mcdi_logging_default, bool, 0644);
61 MODULE_PARM_DESC(mcdi_logging_default,
62 "Enable MCDI logging on newly-probed functions");
63 #endif
64
65 int efx_mcdi_init(struct efx_nic *efx)
66 {
67 struct efx_mcdi_iface *mcdi;
68 bool already_attached;
69 int rc = -ENOMEM;
70
71 efx->mcdi = kzalloc(sizeof(*efx->mcdi), GFP_KERNEL);
72 if (!efx->mcdi)
73 goto fail;
74
75 mcdi = efx_mcdi(efx);
76 mcdi->efx = efx;
77 #ifdef CONFIG_SFC_MCDI_LOGGING
78 /* consuming code assumes buffer is page-sized */
79 mcdi->logging_buffer = (char *)__get_free_page(GFP_KERNEL);
80 if (!mcdi->logging_buffer)
81 goto fail1;
82 mcdi->logging_enabled = mcdi_logging_default;
83 #endif
84 init_waitqueue_head(&mcdi->wq);
85 spin_lock_init(&mcdi->iface_lock);
86 mcdi->state = MCDI_STATE_QUIESCENT;
87 mcdi->mode = MCDI_MODE_POLL;
88 spin_lock_init(&mcdi->async_lock);
89 INIT_LIST_HEAD(&mcdi->async_list);
90 setup_timer(&mcdi->async_timer, efx_mcdi_timeout_async,
91 (unsigned long)mcdi);
92
93 (void) efx_mcdi_poll_reboot(efx);
94 mcdi->new_epoch = true;
95
96 /* Recover from a failed assertion before probing */
97 rc = efx_mcdi_handle_assertion(efx);
98 if (rc)
99 goto fail2;
100
101 /* Let the MC (and BMC, if this is a LOM) know that the driver
102 * is loaded. We should do this before we reset the NIC.
103 */
104 rc = efx_mcdi_drv_attach(efx, true, &already_attached);
105 if (rc) {
106 netif_err(efx, probe, efx->net_dev,
107 "Unable to register driver with MCPU\n");
108 goto fail2;
109 }
110 if (already_attached)
111 /* Not a fatal error */
112 netif_err(efx, probe, efx->net_dev,
113 "Host already registered with MCPU\n");
114
115 if (efx->mcdi->fn_flags &
116 (1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_PRIMARY))
117 efx->primary = efx;
118
119 return 0;
120 fail2:
121 #ifdef CONFIG_SFC_MCDI_LOGGING
122 free_page((unsigned long)mcdi->logging_buffer);
123 fail1:
124 #endif
125 kfree(efx->mcdi);
126 efx->mcdi = NULL;
127 fail:
128 return rc;
129 }
130
131 void efx_mcdi_fini(struct efx_nic *efx)
132 {
133 if (!efx->mcdi)
134 return;
135
136 BUG_ON(efx->mcdi->iface.state != MCDI_STATE_QUIESCENT);
137
138 /* Relinquish the device (back to the BMC, if this is a LOM) */
139 efx_mcdi_drv_attach(efx, false, NULL);
140
141 #ifdef CONFIG_SFC_MCDI_LOGGING
142 free_page((unsigned long)efx->mcdi->iface.logging_buffer);
143 #endif
144
145 kfree(efx->mcdi);
146 }
147
148 static void efx_mcdi_send_request(struct efx_nic *efx, unsigned cmd,
149 const efx_dword_t *inbuf, size_t inlen)
150 {
151 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
152 #ifdef CONFIG_SFC_MCDI_LOGGING
153 char *buf = mcdi->logging_buffer; /* page-sized */
154 #endif
155 efx_dword_t hdr[2];
156 size_t hdr_len;
157 u32 xflags, seqno;
158
159 BUG_ON(mcdi->state == MCDI_STATE_QUIESCENT);
160
161 /* Serialise with efx_mcdi_ev_cpl() and efx_mcdi_ev_death() */
162 spin_lock_bh(&mcdi->iface_lock);
163 ++mcdi->seqno;
164 spin_unlock_bh(&mcdi->iface_lock);
165
166 seqno = mcdi->seqno & SEQ_MASK;
167 xflags = 0;
168 if (mcdi->mode == MCDI_MODE_EVENTS)
169 xflags |= MCDI_HEADER_XFLAGS_EVREQ;
170
171 if (efx->type->mcdi_max_ver == 1) {
172 /* MCDI v1 */
173 EFX_POPULATE_DWORD_7(hdr[0],
174 MCDI_HEADER_RESPONSE, 0,
175 MCDI_HEADER_RESYNC, 1,
176 MCDI_HEADER_CODE, cmd,
177 MCDI_HEADER_DATALEN, inlen,
178 MCDI_HEADER_SEQ, seqno,
179 MCDI_HEADER_XFLAGS, xflags,
180 MCDI_HEADER_NOT_EPOCH, !mcdi->new_epoch);
181 hdr_len = 4;
182 } else {
183 /* MCDI v2 */
184 BUG_ON(inlen > MCDI_CTL_SDU_LEN_MAX_V2);
185 EFX_POPULATE_DWORD_7(hdr[0],
186 MCDI_HEADER_RESPONSE, 0,
187 MCDI_HEADER_RESYNC, 1,
188 MCDI_HEADER_CODE, MC_CMD_V2_EXTN,
189 MCDI_HEADER_DATALEN, 0,
190 MCDI_HEADER_SEQ, seqno,
191 MCDI_HEADER_XFLAGS, xflags,
192 MCDI_HEADER_NOT_EPOCH, !mcdi->new_epoch);
193 EFX_POPULATE_DWORD_2(hdr[1],
194 MC_CMD_V2_EXTN_IN_EXTENDED_CMD, cmd,
195 MC_CMD_V2_EXTN_IN_ACTUAL_LEN, inlen);
196 hdr_len = 8;
197 }
198
199 #ifdef CONFIG_SFC_MCDI_LOGGING
200 if (mcdi->logging_enabled && !WARN_ON_ONCE(!buf)) {
201 int bytes = 0;
202 int i;
203 /* Lengths should always be a whole number of dwords, so scream
204 * if they're not.
205 */
206 WARN_ON_ONCE(hdr_len % 4);
207 WARN_ON_ONCE(inlen % 4);
208
209 /* We own the logging buffer, as only one MCDI can be in
210 * progress on a NIC at any one time. So no need for locking.
211 */
212 for (i = 0; i < hdr_len / 4 && bytes < PAGE_SIZE; i++)
213 bytes += snprintf(buf + bytes, PAGE_SIZE - bytes,
214 " %08x", le32_to_cpu(hdr[i].u32[0]));
215
216 for (i = 0; i < inlen / 4 && bytes < PAGE_SIZE; i++)
217 bytes += snprintf(buf + bytes, PAGE_SIZE - bytes,
218 " %08x", le32_to_cpu(inbuf[i].u32[0]));
219
220 netif_info(efx, hw, efx->net_dev, "MCDI RPC REQ:%s\n", buf);
221 }
222 #endif
223
224 efx->type->mcdi_request(efx, hdr, hdr_len, inbuf, inlen);
225
226 mcdi->new_epoch = false;
227 }
228
229 static int efx_mcdi_errno(unsigned int mcdi_err)
230 {
231 switch (mcdi_err) {
232 case 0:
233 return 0;
234 #define TRANSLATE_ERROR(name) \
235 case MC_CMD_ERR_ ## name: \
236 return -name;
237 TRANSLATE_ERROR(EPERM);
238 TRANSLATE_ERROR(ENOENT);
239 TRANSLATE_ERROR(EINTR);
240 TRANSLATE_ERROR(EAGAIN);
241 TRANSLATE_ERROR(EACCES);
242 TRANSLATE_ERROR(EBUSY);
243 TRANSLATE_ERROR(EINVAL);
244 TRANSLATE_ERROR(EDEADLK);
245 TRANSLATE_ERROR(ENOSYS);
246 TRANSLATE_ERROR(ETIME);
247 TRANSLATE_ERROR(EALREADY);
248 TRANSLATE_ERROR(ENOSPC);
249 #undef TRANSLATE_ERROR
250 case MC_CMD_ERR_ENOTSUP:
251 return -EOPNOTSUPP;
252 case MC_CMD_ERR_ALLOC_FAIL:
253 return -ENOBUFS;
254 case MC_CMD_ERR_MAC_EXIST:
255 return -EADDRINUSE;
256 default:
257 return -EPROTO;
258 }
259 }
260
261 static void efx_mcdi_read_response_header(struct efx_nic *efx)
262 {
263 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
264 unsigned int respseq, respcmd, error;
265 #ifdef CONFIG_SFC_MCDI_LOGGING
266 char *buf = mcdi->logging_buffer; /* page-sized */
267 #endif
268 efx_dword_t hdr;
269
270 efx->type->mcdi_read_response(efx, &hdr, 0, 4);
271 respseq = EFX_DWORD_FIELD(hdr, MCDI_HEADER_SEQ);
272 respcmd = EFX_DWORD_FIELD(hdr, MCDI_HEADER_CODE);
273 error = EFX_DWORD_FIELD(hdr, MCDI_HEADER_ERROR);
274
275 if (respcmd != MC_CMD_V2_EXTN) {
276 mcdi->resp_hdr_len = 4;
277 mcdi->resp_data_len = EFX_DWORD_FIELD(hdr, MCDI_HEADER_DATALEN);
278 } else {
279 efx->type->mcdi_read_response(efx, &hdr, 4, 4);
280 mcdi->resp_hdr_len = 8;
281 mcdi->resp_data_len =
282 EFX_DWORD_FIELD(hdr, MC_CMD_V2_EXTN_IN_ACTUAL_LEN);
283 }
284
285 #ifdef CONFIG_SFC_MCDI_LOGGING
286 if (mcdi->logging_enabled && !WARN_ON_ONCE(!buf)) {
287 size_t hdr_len, data_len;
288 int bytes = 0;
289 int i;
290
291 WARN_ON_ONCE(mcdi->resp_hdr_len % 4);
292 hdr_len = mcdi->resp_hdr_len / 4;
293 /* MCDI_DECLARE_BUF ensures that underlying buffer is padded
294 * to dword size, and the MCDI buffer is always dword size
295 */
296 data_len = DIV_ROUND_UP(mcdi->resp_data_len, 4);
297
298 /* We own the logging buffer, as only one MCDI can be in
299 * progress on a NIC at any one time. So no need for locking.
300 */
301 for (i = 0; i < hdr_len && bytes < PAGE_SIZE; i++) {
302 efx->type->mcdi_read_response(efx, &hdr, (i * 4), 4);
303 bytes += snprintf(buf + bytes, PAGE_SIZE - bytes,
304 " %08x", le32_to_cpu(hdr.u32[0]));
305 }
306
307 for (i = 0; i < data_len && bytes < PAGE_SIZE; i++) {
308 efx->type->mcdi_read_response(efx, &hdr,
309 mcdi->resp_hdr_len + (i * 4), 4);
310 bytes += snprintf(buf + bytes, PAGE_SIZE - bytes,
311 " %08x", le32_to_cpu(hdr.u32[0]));
312 }
313
314 netif_info(efx, hw, efx->net_dev, "MCDI RPC RESP:%s\n", buf);
315 }
316 #endif
317
318 if (error && mcdi->resp_data_len == 0) {
319 netif_err(efx, hw, efx->net_dev, "MC rebooted\n");
320 mcdi->resprc = -EIO;
321 } else if ((respseq ^ mcdi->seqno) & SEQ_MASK) {
322 netif_err(efx, hw, efx->net_dev,
323 "MC response mismatch tx seq 0x%x rx seq 0x%x\n",
324 respseq, mcdi->seqno);
325 mcdi->resprc = -EIO;
326 } else if (error) {
327 efx->type->mcdi_read_response(efx, &hdr, mcdi->resp_hdr_len, 4);
328 mcdi->resprc =
329 efx_mcdi_errno(EFX_DWORD_FIELD(hdr, EFX_DWORD_0));
330 } else {
331 mcdi->resprc = 0;
332 }
333 }
334
335 static bool efx_mcdi_poll_once(struct efx_nic *efx)
336 {
337 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
338
339 rmb();
340 if (!efx->type->mcdi_poll_response(efx))
341 return false;
342
343 spin_lock_bh(&mcdi->iface_lock);
344 efx_mcdi_read_response_header(efx);
345 spin_unlock_bh(&mcdi->iface_lock);
346
347 return true;
348 }
349
350 static int efx_mcdi_poll(struct efx_nic *efx)
351 {
352 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
353 unsigned long time, finish;
354 unsigned int spins;
355 int rc;
356
357 /* Check for a reboot atomically with respect to efx_mcdi_copyout() */
358 rc = efx_mcdi_poll_reboot(efx);
359 if (rc) {
360 spin_lock_bh(&mcdi->iface_lock);
361 mcdi->resprc = rc;
362 mcdi->resp_hdr_len = 0;
363 mcdi->resp_data_len = 0;
364 spin_unlock_bh(&mcdi->iface_lock);
365 return 0;
366 }
367
368 /* Poll for completion. Poll quickly (once a us) for the 1st jiffy,
369 * because generally mcdi responses are fast. After that, back off
370 * and poll once a jiffy (approximately)
371 */
372 spins = TICK_USEC;
373 finish = jiffies + MCDI_RPC_TIMEOUT;
374
375 while (1) {
376 if (spins != 0) {
377 --spins;
378 udelay(1);
379 } else {
380 schedule_timeout_uninterruptible(1);
381 }
382
383 time = jiffies;
384
385 if (efx_mcdi_poll_once(efx))
386 break;
387
388 if (time_after(time, finish))
389 return -ETIMEDOUT;
390 }
391
392 /* Return rc=0 like wait_event_timeout() */
393 return 0;
394 }
395
396 /* Test and clear MC-rebooted flag for this port/function; reset
397 * software state as necessary.
398 */
399 int efx_mcdi_poll_reboot(struct efx_nic *efx)
400 {
401 if (!efx->mcdi)
402 return 0;
403
404 return efx->type->mcdi_poll_reboot(efx);
405 }
406
407 static bool efx_mcdi_acquire_async(struct efx_mcdi_iface *mcdi)
408 {
409 return cmpxchg(&mcdi->state,
410 MCDI_STATE_QUIESCENT, MCDI_STATE_RUNNING_ASYNC) ==
411 MCDI_STATE_QUIESCENT;
412 }
413
414 static void efx_mcdi_acquire_sync(struct efx_mcdi_iface *mcdi)
415 {
416 /* Wait until the interface becomes QUIESCENT and we win the race
417 * to mark it RUNNING_SYNC.
418 */
419 wait_event(mcdi->wq,
420 cmpxchg(&mcdi->state,
421 MCDI_STATE_QUIESCENT, MCDI_STATE_RUNNING_SYNC) ==
422 MCDI_STATE_QUIESCENT);
423 }
424
425 static int efx_mcdi_await_completion(struct efx_nic *efx)
426 {
427 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
428
429 if (wait_event_timeout(mcdi->wq, mcdi->state == MCDI_STATE_COMPLETED,
430 MCDI_RPC_TIMEOUT) == 0)
431 return -ETIMEDOUT;
432
433 /* Check if efx_mcdi_set_mode() switched us back to polled completions.
434 * In which case, poll for completions directly. If efx_mcdi_ev_cpl()
435 * completed the request first, then we'll just end up completing the
436 * request again, which is safe.
437 *
438 * We need an smp_rmb() to synchronise with efx_mcdi_mode_poll(), which
439 * wait_event_timeout() implicitly provides.
440 */
441 if (mcdi->mode == MCDI_MODE_POLL)
442 return efx_mcdi_poll(efx);
443
444 return 0;
445 }
446
447 /* If the interface is RUNNING_SYNC, switch to COMPLETED and wake the
448 * requester. Return whether this was done. Does not take any locks.
449 */
450 static bool efx_mcdi_complete_sync(struct efx_mcdi_iface *mcdi)
451 {
452 if (cmpxchg(&mcdi->state,
453 MCDI_STATE_RUNNING_SYNC, MCDI_STATE_COMPLETED) ==
454 MCDI_STATE_RUNNING_SYNC) {
455 wake_up(&mcdi->wq);
456 return true;
457 }
458
459 return false;
460 }
461
462 static void efx_mcdi_release(struct efx_mcdi_iface *mcdi)
463 {
464 if (mcdi->mode == MCDI_MODE_EVENTS) {
465 struct efx_mcdi_async_param *async;
466 struct efx_nic *efx = mcdi->efx;
467
468 /* Process the asynchronous request queue */
469 spin_lock_bh(&mcdi->async_lock);
470 async = list_first_entry_or_null(
471 &mcdi->async_list, struct efx_mcdi_async_param, list);
472 if (async) {
473 mcdi->state = MCDI_STATE_RUNNING_ASYNC;
474 efx_mcdi_send_request(efx, async->cmd,
475 (const efx_dword_t *)(async + 1),
476 async->inlen);
477 mod_timer(&mcdi->async_timer,
478 jiffies + MCDI_RPC_TIMEOUT);
479 }
480 spin_unlock_bh(&mcdi->async_lock);
481
482 if (async)
483 return;
484 }
485
486 mcdi->state = MCDI_STATE_QUIESCENT;
487 wake_up(&mcdi->wq);
488 }
489
490 /* If the interface is RUNNING_ASYNC, switch to COMPLETED, call the
491 * asynchronous completion function, and release the interface.
492 * Return whether this was done. Must be called in bh-disabled
493 * context. Will take iface_lock and async_lock.
494 */
495 static bool efx_mcdi_complete_async(struct efx_mcdi_iface *mcdi, bool timeout)
496 {
497 struct efx_nic *efx = mcdi->efx;
498 struct efx_mcdi_async_param *async;
499 size_t hdr_len, data_len, err_len;
500 efx_dword_t *outbuf;
501 MCDI_DECLARE_BUF_ERR(errbuf);
502 int rc;
503
504 if (cmpxchg(&mcdi->state,
505 MCDI_STATE_RUNNING_ASYNC, MCDI_STATE_COMPLETED) !=
506 MCDI_STATE_RUNNING_ASYNC)
507 return false;
508
509 spin_lock(&mcdi->iface_lock);
510 if (timeout) {
511 /* Ensure that if the completion event arrives later,
512 * the seqno check in efx_mcdi_ev_cpl() will fail
513 */
514 ++mcdi->seqno;
515 ++mcdi->credits;
516 rc = -ETIMEDOUT;
517 hdr_len = 0;
518 data_len = 0;
519 } else {
520 rc = mcdi->resprc;
521 hdr_len = mcdi->resp_hdr_len;
522 data_len = mcdi->resp_data_len;
523 }
524 spin_unlock(&mcdi->iface_lock);
525
526 /* Stop the timer. In case the timer function is running, we
527 * must wait for it to return so that there is no possibility
528 * of it aborting the next request.
529 */
530 if (!timeout)
531 del_timer_sync(&mcdi->async_timer);
532
533 spin_lock(&mcdi->async_lock);
534 async = list_first_entry(&mcdi->async_list,
535 struct efx_mcdi_async_param, list);
536 list_del(&async->list);
537 spin_unlock(&mcdi->async_lock);
538
539 outbuf = (efx_dword_t *)(async + 1);
540 efx->type->mcdi_read_response(efx, outbuf, hdr_len,
541 min(async->outlen, data_len));
542 if (!timeout && rc && !async->quiet) {
543 err_len = min(sizeof(errbuf), data_len);
544 efx->type->mcdi_read_response(efx, errbuf, hdr_len,
545 sizeof(errbuf));
546 efx_mcdi_display_error(efx, async->cmd, async->inlen, errbuf,
547 err_len, rc);
548 }
549 async->complete(efx, async->cookie, rc, outbuf, data_len);
550 kfree(async);
551
552 efx_mcdi_release(mcdi);
553
554 return true;
555 }
556
557 static void efx_mcdi_ev_cpl(struct efx_nic *efx, unsigned int seqno,
558 unsigned int datalen, unsigned int mcdi_err)
559 {
560 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
561 bool wake = false;
562
563 spin_lock(&mcdi->iface_lock);
564
565 if ((seqno ^ mcdi->seqno) & SEQ_MASK) {
566 if (mcdi->credits)
567 /* The request has been cancelled */
568 --mcdi->credits;
569 else
570 netif_err(efx, hw, efx->net_dev,
571 "MC response mismatch tx seq 0x%x rx "
572 "seq 0x%x\n", seqno, mcdi->seqno);
573 } else {
574 if (efx->type->mcdi_max_ver >= 2) {
575 /* MCDI v2 responses don't fit in an event */
576 efx_mcdi_read_response_header(efx);
577 } else {
578 mcdi->resprc = efx_mcdi_errno(mcdi_err);
579 mcdi->resp_hdr_len = 4;
580 mcdi->resp_data_len = datalen;
581 }
582
583 wake = true;
584 }
585
586 spin_unlock(&mcdi->iface_lock);
587
588 if (wake) {
589 if (!efx_mcdi_complete_async(mcdi, false))
590 (void) efx_mcdi_complete_sync(mcdi);
591
592 /* If the interface isn't RUNNING_ASYNC or
593 * RUNNING_SYNC then we've received a duplicate
594 * completion after we've already transitioned back to
595 * QUIESCENT. [A subsequent invocation would increment
596 * seqno, so would have failed the seqno check].
597 */
598 }
599 }
600
601 static void efx_mcdi_timeout_async(unsigned long context)
602 {
603 struct efx_mcdi_iface *mcdi = (struct efx_mcdi_iface *)context;
604
605 efx_mcdi_complete_async(mcdi, true);
606 }
607
608 static int
609 efx_mcdi_check_supported(struct efx_nic *efx, unsigned int cmd, size_t inlen)
610 {
611 if (efx->type->mcdi_max_ver < 0 ||
612 (efx->type->mcdi_max_ver < 2 &&
613 cmd > MC_CMD_CMD_SPACE_ESCAPE_7))
614 return -EINVAL;
615
616 if (inlen > MCDI_CTL_SDU_LEN_MAX_V2 ||
617 (efx->type->mcdi_max_ver < 2 &&
618 inlen > MCDI_CTL_SDU_LEN_MAX_V1))
619 return -EMSGSIZE;
620
621 return 0;
622 }
623
624 static int _efx_mcdi_rpc_finish(struct efx_nic *efx, unsigned cmd, size_t inlen,
625 efx_dword_t *outbuf, size_t outlen,
626 size_t *outlen_actual, bool quiet)
627 {
628 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
629 MCDI_DECLARE_BUF_ERR(errbuf);
630 int rc;
631
632 if (mcdi->mode == MCDI_MODE_POLL)
633 rc = efx_mcdi_poll(efx);
634 else
635 rc = efx_mcdi_await_completion(efx);
636
637 if (rc != 0) {
638 netif_err(efx, hw, efx->net_dev,
639 "MC command 0x%x inlen %d mode %d timed out\n",
640 cmd, (int)inlen, mcdi->mode);
641
642 if (mcdi->mode == MCDI_MODE_EVENTS && efx_mcdi_poll_once(efx)) {
643 netif_err(efx, hw, efx->net_dev,
644 "MCDI request was completed without an event\n");
645 rc = 0;
646 }
647
648 efx_mcdi_abandon(efx);
649
650 /* Close the race with efx_mcdi_ev_cpl() executing just too late
651 * and completing a request we've just cancelled, by ensuring
652 * that the seqno check therein fails.
653 */
654 spin_lock_bh(&mcdi->iface_lock);
655 ++mcdi->seqno;
656 ++mcdi->credits;
657 spin_unlock_bh(&mcdi->iface_lock);
658 }
659
660 if (rc != 0) {
661 if (outlen_actual)
662 *outlen_actual = 0;
663 } else {
664 size_t hdr_len, data_len, err_len;
665
666 /* At the very least we need a memory barrier here to ensure
667 * we pick up changes from efx_mcdi_ev_cpl(). Protect against
668 * a spurious efx_mcdi_ev_cpl() running concurrently by
669 * acquiring the iface_lock. */
670 spin_lock_bh(&mcdi->iface_lock);
671 rc = mcdi->resprc;
672 hdr_len = mcdi->resp_hdr_len;
673 data_len = mcdi->resp_data_len;
674 err_len = min(sizeof(errbuf), data_len);
675 spin_unlock_bh(&mcdi->iface_lock);
676
677 BUG_ON(rc > 0);
678
679 efx->type->mcdi_read_response(efx, outbuf, hdr_len,
680 min(outlen, data_len));
681 if (outlen_actual)
682 *outlen_actual = data_len;
683
684 efx->type->mcdi_read_response(efx, errbuf, hdr_len, err_len);
685
686 if (cmd == MC_CMD_REBOOT && rc == -EIO) {
687 /* Don't reset if MC_CMD_REBOOT returns EIO */
688 } else if (rc == -EIO || rc == -EINTR) {
689 netif_err(efx, hw, efx->net_dev, "MC fatal error %d\n",
690 -rc);
691 efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE);
692 } else if (rc && !quiet) {
693 efx_mcdi_display_error(efx, cmd, inlen, errbuf, err_len,
694 rc);
695 }
696
697 if (rc == -EIO || rc == -EINTR) {
698 msleep(MCDI_STATUS_SLEEP_MS);
699 efx_mcdi_poll_reboot(efx);
700 mcdi->new_epoch = true;
701 }
702 }
703
704 efx_mcdi_release(mcdi);
705 return rc;
706 }
707
708 static int _efx_mcdi_rpc(struct efx_nic *efx, unsigned cmd,
709 const efx_dword_t *inbuf, size_t inlen,
710 efx_dword_t *outbuf, size_t outlen,
711 size_t *outlen_actual, bool quiet)
712 {
713 int rc;
714
715 rc = efx_mcdi_rpc_start(efx, cmd, inbuf, inlen);
716 if (rc) {
717 if (outlen_actual)
718 *outlen_actual = 0;
719 return rc;
720 }
721 return _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen,
722 outlen_actual, quiet);
723 }
724
725 int efx_mcdi_rpc(struct efx_nic *efx, unsigned cmd,
726 const efx_dword_t *inbuf, size_t inlen,
727 efx_dword_t *outbuf, size_t outlen,
728 size_t *outlen_actual)
729 {
730 return _efx_mcdi_rpc(efx, cmd, inbuf, inlen, outbuf, outlen,
731 outlen_actual, false);
732 }
733
734 /* Normally, on receiving an error code in the MCDI response,
735 * efx_mcdi_rpc will log an error message containing (among other
736 * things) the raw error code, by means of efx_mcdi_display_error.
737 * This _quiet version suppresses that; if the caller wishes to log
738 * the error conditionally on the return code, it should call this
739 * function and is then responsible for calling efx_mcdi_display_error
740 * as needed.
741 */
742 int efx_mcdi_rpc_quiet(struct efx_nic *efx, unsigned cmd,
743 const efx_dword_t *inbuf, size_t inlen,
744 efx_dword_t *outbuf, size_t outlen,
745 size_t *outlen_actual)
746 {
747 return _efx_mcdi_rpc(efx, cmd, inbuf, inlen, outbuf, outlen,
748 outlen_actual, true);
749 }
750
751 int efx_mcdi_rpc_start(struct efx_nic *efx, unsigned cmd,
752 const efx_dword_t *inbuf, size_t inlen)
753 {
754 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
755 int rc;
756
757 rc = efx_mcdi_check_supported(efx, cmd, inlen);
758 if (rc)
759 return rc;
760
761 if (efx->mc_bist_for_other_fn)
762 return -ENETDOWN;
763
764 if (mcdi->mode == MCDI_MODE_FAIL)
765 return -ENETDOWN;
766
767 efx_mcdi_acquire_sync(mcdi);
768 efx_mcdi_send_request(efx, cmd, inbuf, inlen);
769 return 0;
770 }
771
772 static int _efx_mcdi_rpc_async(struct efx_nic *efx, unsigned int cmd,
773 const efx_dword_t *inbuf, size_t inlen,
774 size_t outlen,
775 efx_mcdi_async_completer *complete,
776 unsigned long cookie, bool quiet)
777 {
778 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
779 struct efx_mcdi_async_param *async;
780 int rc;
781
782 rc = efx_mcdi_check_supported(efx, cmd, inlen);
783 if (rc)
784 return rc;
785
786 if (efx->mc_bist_for_other_fn)
787 return -ENETDOWN;
788
789 async = kmalloc(sizeof(*async) + ALIGN(max(inlen, outlen), 4),
790 GFP_ATOMIC);
791 if (!async)
792 return -ENOMEM;
793
794 async->cmd = cmd;
795 async->inlen = inlen;
796 async->outlen = outlen;
797 async->quiet = quiet;
798 async->complete = complete;
799 async->cookie = cookie;
800 memcpy(async + 1, inbuf, inlen);
801
802 spin_lock_bh(&mcdi->async_lock);
803
804 if (mcdi->mode == MCDI_MODE_EVENTS) {
805 list_add_tail(&async->list, &mcdi->async_list);
806
807 /* If this is at the front of the queue, try to start it
808 * immediately
809 */
810 if (mcdi->async_list.next == &async->list &&
811 efx_mcdi_acquire_async(mcdi)) {
812 efx_mcdi_send_request(efx, cmd, inbuf, inlen);
813 mod_timer(&mcdi->async_timer,
814 jiffies + MCDI_RPC_TIMEOUT);
815 }
816 } else {
817 kfree(async);
818 rc = -ENETDOWN;
819 }
820
821 spin_unlock_bh(&mcdi->async_lock);
822
823 return rc;
824 }
825
826 /**
827 * efx_mcdi_rpc_async - Schedule an MCDI command to run asynchronously
828 * @efx: NIC through which to issue the command
829 * @cmd: Command type number
830 * @inbuf: Command parameters
831 * @inlen: Length of command parameters, in bytes
832 * @outlen: Length to allocate for response buffer, in bytes
833 * @complete: Function to be called on completion or cancellation.
834 * @cookie: Arbitrary value to be passed to @complete.
835 *
836 * This function does not sleep and therefore may be called in atomic
837 * context. It will fail if event queues are disabled or if MCDI
838 * event completions have been disabled due to an error.
839 *
840 * If it succeeds, the @complete function will be called exactly once
841 * in atomic context, when one of the following occurs:
842 * (a) the completion event is received (in NAPI context)
843 * (b) event queues are disabled (in the process that disables them)
844 * (c) the request times-out (in timer context)
845 */
846 int
847 efx_mcdi_rpc_async(struct efx_nic *efx, unsigned int cmd,
848 const efx_dword_t *inbuf, size_t inlen, size_t outlen,
849 efx_mcdi_async_completer *complete, unsigned long cookie)
850 {
851 return _efx_mcdi_rpc_async(efx, cmd, inbuf, inlen, outlen, complete,
852 cookie, false);
853 }
854
855 int efx_mcdi_rpc_async_quiet(struct efx_nic *efx, unsigned int cmd,
856 const efx_dword_t *inbuf, size_t inlen,
857 size_t outlen, efx_mcdi_async_completer *complete,
858 unsigned long cookie)
859 {
860 return _efx_mcdi_rpc_async(efx, cmd, inbuf, inlen, outlen, complete,
861 cookie, true);
862 }
863
864 int efx_mcdi_rpc_finish(struct efx_nic *efx, unsigned cmd, size_t inlen,
865 efx_dword_t *outbuf, size_t outlen,
866 size_t *outlen_actual)
867 {
868 return _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen,
869 outlen_actual, false);
870 }
871
872 int efx_mcdi_rpc_finish_quiet(struct efx_nic *efx, unsigned cmd, size_t inlen,
873 efx_dword_t *outbuf, size_t outlen,
874 size_t *outlen_actual)
875 {
876 return _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen,
877 outlen_actual, true);
878 }
879
880 void efx_mcdi_display_error(struct efx_nic *efx, unsigned cmd,
881 size_t inlen, efx_dword_t *outbuf,
882 size_t outlen, int rc)
883 {
884 int code = 0, err_arg = 0;
885
886 if (outlen >= MC_CMD_ERR_CODE_OFST + 4)
887 code = MCDI_DWORD(outbuf, ERR_CODE);
888 if (outlen >= MC_CMD_ERR_ARG_OFST + 4)
889 err_arg = MCDI_DWORD(outbuf, ERR_ARG);
890 netif_err(efx, hw, efx->net_dev,
891 "MC command 0x%x inlen %d failed rc=%d (raw=%d) arg=%d\n",
892 cmd, (int)inlen, rc, code, err_arg);
893 }
894
895 /* Switch to polled MCDI completions. This can be called in various
896 * error conditions with various locks held, so it must be lockless.
897 * Caller is responsible for flushing asynchronous requests later.
898 */
899 void efx_mcdi_mode_poll(struct efx_nic *efx)
900 {
901 struct efx_mcdi_iface *mcdi;
902
903 if (!efx->mcdi)
904 return;
905
906 mcdi = efx_mcdi(efx);
907 /* If already in polling mode, nothing to do.
908 * If in fail-fast state, don't switch to polled completion.
909 * FLR recovery will do that later.
910 */
911 if (mcdi->mode == MCDI_MODE_POLL || mcdi->mode == MCDI_MODE_FAIL)
912 return;
913
914 /* We can switch from event completion to polled completion, because
915 * mcdi requests are always completed in shared memory. We do this by
916 * switching the mode to POLL'd then completing the request.
917 * efx_mcdi_await_completion() will then call efx_mcdi_poll().
918 *
919 * We need an smp_wmb() to synchronise with efx_mcdi_await_completion(),
920 * which efx_mcdi_complete_sync() provides for us.
921 */
922 mcdi->mode = MCDI_MODE_POLL;
923
924 efx_mcdi_complete_sync(mcdi);
925 }
926
927 /* Flush any running or queued asynchronous requests, after event processing
928 * is stopped
929 */
930 void efx_mcdi_flush_async(struct efx_nic *efx)
931 {
932 struct efx_mcdi_async_param *async, *next;
933 struct efx_mcdi_iface *mcdi;
934
935 if (!efx->mcdi)
936 return;
937
938 mcdi = efx_mcdi(efx);
939
940 /* We must be in poll or fail mode so no more requests can be queued */
941 BUG_ON(mcdi->mode == MCDI_MODE_EVENTS);
942
943 del_timer_sync(&mcdi->async_timer);
944
945 /* If a request is still running, make sure we give the MC
946 * time to complete it so that the response won't overwrite our
947 * next request.
948 */
949 if (mcdi->state == MCDI_STATE_RUNNING_ASYNC) {
950 efx_mcdi_poll(efx);
951 mcdi->state = MCDI_STATE_QUIESCENT;
952 }
953
954 /* Nothing else will access the async list now, so it is safe
955 * to walk it without holding async_lock. If we hold it while
956 * calling a completer then lockdep may warn that we have
957 * acquired locks in the wrong order.
958 */
959 list_for_each_entry_safe(async, next, &mcdi->async_list, list) {
960 async->complete(efx, async->cookie, -ENETDOWN, NULL, 0);
961 list_del(&async->list);
962 kfree(async);
963 }
964 }
965
966 void efx_mcdi_mode_event(struct efx_nic *efx)
967 {
968 struct efx_mcdi_iface *mcdi;
969
970 if (!efx->mcdi)
971 return;
972
973 mcdi = efx_mcdi(efx);
974 /* If already in event completion mode, nothing to do.
975 * If in fail-fast state, don't switch to event completion. FLR
976 * recovery will do that later.
977 */
978 if (mcdi->mode == MCDI_MODE_EVENTS || mcdi->mode == MCDI_MODE_FAIL)
979 return;
980
981 /* We can't switch from polled to event completion in the middle of a
982 * request, because the completion method is specified in the request.
983 * So acquire the interface to serialise the requestors. We don't need
984 * to acquire the iface_lock to change the mode here, but we do need a
985 * write memory barrier ensure that efx_mcdi_rpc() sees it, which
986 * efx_mcdi_acquire() provides.
987 */
988 efx_mcdi_acquire_sync(mcdi);
989 mcdi->mode = MCDI_MODE_EVENTS;
990 efx_mcdi_release(mcdi);
991 }
992
993 static void efx_mcdi_ev_death(struct efx_nic *efx, int rc)
994 {
995 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
996
997 /* If there is an outstanding MCDI request, it has been terminated
998 * either by a BADASSERT or REBOOT event. If the mcdi interface is
999 * in polled mode, then do nothing because the MC reboot handler will
1000 * set the header correctly. However, if the mcdi interface is waiting
1001 * for a CMDDONE event it won't receive it [and since all MCDI events
1002 * are sent to the same queue, we can't be racing with
1003 * efx_mcdi_ev_cpl()]
1004 *
1005 * If there is an outstanding asynchronous request, we can't
1006 * complete it now (efx_mcdi_complete() would deadlock). The
1007 * reset process will take care of this.
1008 *
1009 * There's a race here with efx_mcdi_send_request(), because
1010 * we might receive a REBOOT event *before* the request has
1011 * been copied out. In polled mode (during startup) this is
1012 * irrelevant, because efx_mcdi_complete_sync() is ignored. In
1013 * event mode, this condition is just an edge-case of
1014 * receiving a REBOOT event after posting the MCDI
1015 * request. Did the mc reboot before or after the copyout? The
1016 * best we can do always is just return failure.
1017 */
1018 spin_lock(&mcdi->iface_lock);
1019 if (efx_mcdi_complete_sync(mcdi)) {
1020 if (mcdi->mode == MCDI_MODE_EVENTS) {
1021 mcdi->resprc = rc;
1022 mcdi->resp_hdr_len = 0;
1023 mcdi->resp_data_len = 0;
1024 ++mcdi->credits;
1025 }
1026 } else {
1027 int count;
1028
1029 /* Consume the status word since efx_mcdi_rpc_finish() won't */
1030 for (count = 0; count < MCDI_STATUS_DELAY_COUNT; ++count) {
1031 if (efx_mcdi_poll_reboot(efx))
1032 break;
1033 udelay(MCDI_STATUS_DELAY_US);
1034 }
1035 mcdi->new_epoch = true;
1036
1037 /* Nobody was waiting for an MCDI request, so trigger a reset */
1038 efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE);
1039 }
1040
1041 spin_unlock(&mcdi->iface_lock);
1042 }
1043
1044 /* The MC is going down in to BIST mode. set the BIST flag to block
1045 * new MCDI, cancel any outstanding MCDI and and schedule a BIST-type reset
1046 * (which doesn't actually execute a reset, it waits for the controlling
1047 * function to reset it).
1048 */
1049 static void efx_mcdi_ev_bist(struct efx_nic *efx)
1050 {
1051 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
1052
1053 spin_lock(&mcdi->iface_lock);
1054 efx->mc_bist_for_other_fn = true;
1055 if (efx_mcdi_complete_sync(mcdi)) {
1056 if (mcdi->mode == MCDI_MODE_EVENTS) {
1057 mcdi->resprc = -EIO;
1058 mcdi->resp_hdr_len = 0;
1059 mcdi->resp_data_len = 0;
1060 ++mcdi->credits;
1061 }
1062 }
1063 mcdi->new_epoch = true;
1064 efx_schedule_reset(efx, RESET_TYPE_MC_BIST);
1065 spin_unlock(&mcdi->iface_lock);
1066 }
1067
1068 /* MCDI timeouts seen, so make all MCDI calls fail-fast and issue an FLR to try
1069 * to recover.
1070 */
1071 static void efx_mcdi_abandon(struct efx_nic *efx)
1072 {
1073 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
1074
1075 if (xchg(&mcdi->mode, MCDI_MODE_FAIL) == MCDI_MODE_FAIL)
1076 return; /* it had already been done */
1077 netif_dbg(efx, hw, efx->net_dev, "MCDI is timing out; trying to recover\n");
1078 efx_schedule_reset(efx, RESET_TYPE_MCDI_TIMEOUT);
1079 }
1080
1081 /* Called from falcon_process_eventq for MCDI events */
1082 void efx_mcdi_process_event(struct efx_channel *channel,
1083 efx_qword_t *event)
1084 {
1085 struct efx_nic *efx = channel->efx;
1086 int code = EFX_QWORD_FIELD(*event, MCDI_EVENT_CODE);
1087 u32 data = EFX_QWORD_FIELD(*event, MCDI_EVENT_DATA);
1088
1089 switch (code) {
1090 case MCDI_EVENT_CODE_BADSSERT:
1091 netif_err(efx, hw, efx->net_dev,
1092 "MC watchdog or assertion failure at 0x%x\n", data);
1093 efx_mcdi_ev_death(efx, -EINTR);
1094 break;
1095
1096 case MCDI_EVENT_CODE_PMNOTICE:
1097 netif_info(efx, wol, efx->net_dev, "MCDI PM event.\n");
1098 break;
1099
1100 case MCDI_EVENT_CODE_CMDDONE:
1101 efx_mcdi_ev_cpl(efx,
1102 MCDI_EVENT_FIELD(*event, CMDDONE_SEQ),
1103 MCDI_EVENT_FIELD(*event, CMDDONE_DATALEN),
1104 MCDI_EVENT_FIELD(*event, CMDDONE_ERRNO));
1105 break;
1106
1107 case MCDI_EVENT_CODE_LINKCHANGE:
1108 efx_mcdi_process_link_change(efx, event);
1109 break;
1110 case MCDI_EVENT_CODE_SENSOREVT:
1111 efx_mcdi_sensor_event(efx, event);
1112 break;
1113 case MCDI_EVENT_CODE_SCHEDERR:
1114 netif_dbg(efx, hw, efx->net_dev,
1115 "MC Scheduler alert (0x%x)\n", data);
1116 break;
1117 case MCDI_EVENT_CODE_REBOOT:
1118 case MCDI_EVENT_CODE_MC_REBOOT:
1119 netif_info(efx, hw, efx->net_dev, "MC Reboot\n");
1120 efx_mcdi_ev_death(efx, -EIO);
1121 break;
1122 case MCDI_EVENT_CODE_MC_BIST:
1123 netif_info(efx, hw, efx->net_dev, "MC entered BIST mode\n");
1124 efx_mcdi_ev_bist(efx);
1125 break;
1126 case MCDI_EVENT_CODE_MAC_STATS_DMA:
1127 /* MAC stats are gather lazily. We can ignore this. */
1128 break;
1129 case MCDI_EVENT_CODE_FLR:
1130 if (efx->type->sriov_flr)
1131 efx->type->sriov_flr(efx,
1132 MCDI_EVENT_FIELD(*event, FLR_VF));
1133 break;
1134 case MCDI_EVENT_CODE_PTP_RX:
1135 case MCDI_EVENT_CODE_PTP_FAULT:
1136 case MCDI_EVENT_CODE_PTP_PPS:
1137 efx_ptp_event(efx, event);
1138 break;
1139 case MCDI_EVENT_CODE_PTP_TIME:
1140 efx_time_sync_event(channel, event);
1141 break;
1142 case MCDI_EVENT_CODE_TX_FLUSH:
1143 case MCDI_EVENT_CODE_RX_FLUSH:
1144 /* Two flush events will be sent: one to the same event
1145 * queue as completions, and one to event queue 0.
1146 * In the latter case the {RX,TX}_FLUSH_TO_DRIVER
1147 * flag will be set, and we should ignore the event
1148 * because we want to wait for all completions.
1149 */
1150 BUILD_BUG_ON(MCDI_EVENT_TX_FLUSH_TO_DRIVER_LBN !=
1151 MCDI_EVENT_RX_FLUSH_TO_DRIVER_LBN);
1152 if (!MCDI_EVENT_FIELD(*event, TX_FLUSH_TO_DRIVER))
1153 efx_ef10_handle_drain_event(efx);
1154 break;
1155 case MCDI_EVENT_CODE_TX_ERR:
1156 case MCDI_EVENT_CODE_RX_ERR:
1157 netif_err(efx, hw, efx->net_dev,
1158 "%s DMA error (event: "EFX_QWORD_FMT")\n",
1159 code == MCDI_EVENT_CODE_TX_ERR ? "TX" : "RX",
1160 EFX_QWORD_VAL(*event));
1161 efx_schedule_reset(efx, RESET_TYPE_DMA_ERROR);
1162 break;
1163 default:
1164 netif_err(efx, hw, efx->net_dev, "Unknown MCDI event 0x%x\n",
1165 code);
1166 }
1167 }
1168
1169 /**************************************************************************
1170 *
1171 * Specific request functions
1172 *
1173 **************************************************************************
1174 */
1175
1176 void efx_mcdi_print_fwver(struct efx_nic *efx, char *buf, size_t len)
1177 {
1178 MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_VERSION_OUT_LEN);
1179 size_t outlength;
1180 const __le16 *ver_words;
1181 size_t offset;
1182 int rc;
1183
1184 BUILD_BUG_ON(MC_CMD_GET_VERSION_IN_LEN != 0);
1185 rc = efx_mcdi_rpc(efx, MC_CMD_GET_VERSION, NULL, 0,
1186 outbuf, sizeof(outbuf), &outlength);
1187 if (rc)
1188 goto fail;
1189 if (outlength < MC_CMD_GET_VERSION_OUT_LEN) {
1190 rc = -EIO;
1191 goto fail;
1192 }
1193
1194 ver_words = (__le16 *)MCDI_PTR(outbuf, GET_VERSION_OUT_VERSION);
1195 offset = snprintf(buf, len, "%u.%u.%u.%u",
1196 le16_to_cpu(ver_words[0]), le16_to_cpu(ver_words[1]),
1197 le16_to_cpu(ver_words[2]), le16_to_cpu(ver_words[3]));
1198
1199 /* EF10 may have multiple datapath firmware variants within a
1200 * single version. Report which variants are running.
1201 */
1202 if (efx_nic_rev(efx) >= EFX_REV_HUNT_A0) {
1203 struct efx_ef10_nic_data *nic_data = efx->nic_data;
1204
1205 offset += snprintf(buf + offset, len - offset, " rx%x tx%x",
1206 nic_data->rx_dpcpu_fw_id,
1207 nic_data->tx_dpcpu_fw_id);
1208
1209 /* It's theoretically possible for the string to exceed 31
1210 * characters, though in practice the first three version
1211 * components are short enough that this doesn't happen.
1212 */
1213 if (WARN_ON(offset >= len))
1214 buf[0] = 0;
1215 }
1216
1217 return;
1218
1219 fail:
1220 netif_err(efx, probe, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1221 buf[0] = 0;
1222 }
1223
1224 static int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating,
1225 bool *was_attached)
1226 {
1227 MCDI_DECLARE_BUF(inbuf, MC_CMD_DRV_ATTACH_IN_LEN);
1228 MCDI_DECLARE_BUF(outbuf, MC_CMD_DRV_ATTACH_EXT_OUT_LEN);
1229 size_t outlen;
1230 int rc;
1231
1232 MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_NEW_STATE,
1233 driver_operating ? 1 : 0);
1234 MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_UPDATE, 1);
1235 MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_FIRMWARE_ID, MC_CMD_FW_LOW_LATENCY);
1236
1237 rc = efx_mcdi_rpc_quiet(efx, MC_CMD_DRV_ATTACH, inbuf, sizeof(inbuf),
1238 outbuf, sizeof(outbuf), &outlen);
1239 /* If we're not the primary PF, trying to ATTACH with a FIRMWARE_ID
1240 * specified will fail with EPERM, and we have to tell the MC we don't
1241 * care what firmware we get.
1242 */
1243 if (rc == -EPERM) {
1244 netif_dbg(efx, probe, efx->net_dev,
1245 "efx_mcdi_drv_attach with fw-variant setting failed EPERM, trying without it\n");
1246 MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_FIRMWARE_ID,
1247 MC_CMD_FW_DONT_CARE);
1248 rc = efx_mcdi_rpc_quiet(efx, MC_CMD_DRV_ATTACH, inbuf,
1249 sizeof(inbuf), outbuf, sizeof(outbuf),
1250 &outlen);
1251 }
1252 if (rc) {
1253 efx_mcdi_display_error(efx, MC_CMD_DRV_ATTACH, sizeof(inbuf),
1254 outbuf, outlen, rc);
1255 goto fail;
1256 }
1257 if (outlen < MC_CMD_DRV_ATTACH_OUT_LEN) {
1258 rc = -EIO;
1259 goto fail;
1260 }
1261
1262 if (driver_operating) {
1263 if (outlen >= MC_CMD_DRV_ATTACH_EXT_OUT_LEN) {
1264 efx->mcdi->fn_flags =
1265 MCDI_DWORD(outbuf,
1266 DRV_ATTACH_EXT_OUT_FUNC_FLAGS);
1267 } else {
1268 /* Synthesise flags for Siena */
1269 efx->mcdi->fn_flags =
1270 1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_LINKCTRL |
1271 1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_TRUSTED |
1272 (efx_port_num(efx) == 0) <<
1273 MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_PRIMARY;
1274 }
1275 }
1276
1277 /* We currently assume we have control of the external link
1278 * and are completely trusted by firmware. Abort probing
1279 * if that's not true for this function.
1280 */
1281
1282 if (was_attached != NULL)
1283 *was_attached = MCDI_DWORD(outbuf, DRV_ATTACH_OUT_OLD_STATE);
1284 return 0;
1285
1286 fail:
1287 netif_err(efx, probe, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1288 return rc;
1289 }
1290
1291 int efx_mcdi_get_board_cfg(struct efx_nic *efx, u8 *mac_address,
1292 u16 *fw_subtype_list, u32 *capabilities)
1293 {
1294 MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_BOARD_CFG_OUT_LENMAX);
1295 size_t outlen, i;
1296 int port_num = efx_port_num(efx);
1297 int rc;
1298
1299 BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_IN_LEN != 0);
1300 /* we need __aligned(2) for ether_addr_copy */
1301 BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0_OFST & 1);
1302 BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1_OFST & 1);
1303
1304 rc = efx_mcdi_rpc(efx, MC_CMD_GET_BOARD_CFG, NULL, 0,
1305 outbuf, sizeof(outbuf), &outlen);
1306 if (rc)
1307 goto fail;
1308
1309 if (outlen < MC_CMD_GET_BOARD_CFG_OUT_LENMIN) {
1310 rc = -EIO;
1311 goto fail;
1312 }
1313
1314 if (mac_address)
1315 ether_addr_copy(mac_address,
1316 port_num ?
1317 MCDI_PTR(outbuf, GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1) :
1318 MCDI_PTR(outbuf, GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0));
1319 if (fw_subtype_list) {
1320 for (i = 0;
1321 i < MCDI_VAR_ARRAY_LEN(outlen,
1322 GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST);
1323 i++)
1324 fw_subtype_list[i] = MCDI_ARRAY_WORD(
1325 outbuf, GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST, i);
1326 for (; i < MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_MAXNUM; i++)
1327 fw_subtype_list[i] = 0;
1328 }
1329 if (capabilities) {
1330 if (port_num)
1331 *capabilities = MCDI_DWORD(outbuf,
1332 GET_BOARD_CFG_OUT_CAPABILITIES_PORT1);
1333 else
1334 *capabilities = MCDI_DWORD(outbuf,
1335 GET_BOARD_CFG_OUT_CAPABILITIES_PORT0);
1336 }
1337
1338 return 0;
1339
1340 fail:
1341 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d len=%d\n",
1342 __func__, rc, (int)outlen);
1343
1344 return rc;
1345 }
1346
1347 int efx_mcdi_log_ctrl(struct efx_nic *efx, bool evq, bool uart, u32 dest_evq)
1348 {
1349 MCDI_DECLARE_BUF(inbuf, MC_CMD_LOG_CTRL_IN_LEN);
1350 u32 dest = 0;
1351 int rc;
1352
1353 if (uart)
1354 dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_UART;
1355 if (evq)
1356 dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_EVQ;
1357
1358 MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST, dest);
1359 MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST_EVQ, dest_evq);
1360
1361 BUILD_BUG_ON(MC_CMD_LOG_CTRL_OUT_LEN != 0);
1362
1363 rc = efx_mcdi_rpc(efx, MC_CMD_LOG_CTRL, inbuf, sizeof(inbuf),
1364 NULL, 0, NULL);
1365 return rc;
1366 }
1367
1368 int efx_mcdi_nvram_types(struct efx_nic *efx, u32 *nvram_types_out)
1369 {
1370 MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_TYPES_OUT_LEN);
1371 size_t outlen;
1372 int rc;
1373
1374 BUILD_BUG_ON(MC_CMD_NVRAM_TYPES_IN_LEN != 0);
1375
1376 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TYPES, NULL, 0,
1377 outbuf, sizeof(outbuf), &outlen);
1378 if (rc)
1379 goto fail;
1380 if (outlen < MC_CMD_NVRAM_TYPES_OUT_LEN) {
1381 rc = -EIO;
1382 goto fail;
1383 }
1384
1385 *nvram_types_out = MCDI_DWORD(outbuf, NVRAM_TYPES_OUT_TYPES);
1386 return 0;
1387
1388 fail:
1389 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n",
1390 __func__, rc);
1391 return rc;
1392 }
1393
1394 int efx_mcdi_nvram_info(struct efx_nic *efx, unsigned int type,
1395 size_t *size_out, size_t *erase_size_out,
1396 bool *protected_out)
1397 {
1398 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_INFO_IN_LEN);
1399 MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_INFO_OUT_LEN);
1400 size_t outlen;
1401 int rc;
1402
1403 MCDI_SET_DWORD(inbuf, NVRAM_INFO_IN_TYPE, type);
1404
1405 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_INFO, inbuf, sizeof(inbuf),
1406 outbuf, sizeof(outbuf), &outlen);
1407 if (rc)
1408 goto fail;
1409 if (outlen < MC_CMD_NVRAM_INFO_OUT_LEN) {
1410 rc = -EIO;
1411 goto fail;
1412 }
1413
1414 *size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_SIZE);
1415 *erase_size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_ERASESIZE);
1416 *protected_out = !!(MCDI_DWORD(outbuf, NVRAM_INFO_OUT_FLAGS) &
1417 (1 << MC_CMD_NVRAM_INFO_OUT_PROTECTED_LBN));
1418 return 0;
1419
1420 fail:
1421 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1422 return rc;
1423 }
1424
1425 static int efx_mcdi_nvram_test(struct efx_nic *efx, unsigned int type)
1426 {
1427 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_TEST_IN_LEN);
1428 MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_TEST_OUT_LEN);
1429 int rc;
1430
1431 MCDI_SET_DWORD(inbuf, NVRAM_TEST_IN_TYPE, type);
1432
1433 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TEST, inbuf, sizeof(inbuf),
1434 outbuf, sizeof(outbuf), NULL);
1435 if (rc)
1436 return rc;
1437
1438 switch (MCDI_DWORD(outbuf, NVRAM_TEST_OUT_RESULT)) {
1439 case MC_CMD_NVRAM_TEST_PASS:
1440 case MC_CMD_NVRAM_TEST_NOTSUPP:
1441 return 0;
1442 default:
1443 return -EIO;
1444 }
1445 }
1446
1447 int efx_mcdi_nvram_test_all(struct efx_nic *efx)
1448 {
1449 u32 nvram_types;
1450 unsigned int type;
1451 int rc;
1452
1453 rc = efx_mcdi_nvram_types(efx, &nvram_types);
1454 if (rc)
1455 goto fail1;
1456
1457 type = 0;
1458 while (nvram_types != 0) {
1459 if (nvram_types & 1) {
1460 rc = efx_mcdi_nvram_test(efx, type);
1461 if (rc)
1462 goto fail2;
1463 }
1464 type++;
1465 nvram_types >>= 1;
1466 }
1467
1468 return 0;
1469
1470 fail2:
1471 netif_err(efx, hw, efx->net_dev, "%s: failed type=%u\n",
1472 __func__, type);
1473 fail1:
1474 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1475 return rc;
1476 }
1477
1478 /* Returns 1 if an assertion was read, 0 if no assertion had fired,
1479 * negative on error.
1480 */
1481 static int efx_mcdi_read_assertion(struct efx_nic *efx)
1482 {
1483 MCDI_DECLARE_BUF(inbuf, MC_CMD_GET_ASSERTS_IN_LEN);
1484 MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_ASSERTS_OUT_LEN);
1485 unsigned int flags, index;
1486 const char *reason;
1487 size_t outlen;
1488 int retry;
1489 int rc;
1490
1491 /* Attempt to read any stored assertion state before we reboot
1492 * the mcfw out of the assertion handler. Retry twice, once
1493 * because a boot-time assertion might cause this command to fail
1494 * with EINTR. And once again because GET_ASSERTS can race with
1495 * MC_CMD_REBOOT running on the other port. */
1496 retry = 2;
1497 do {
1498 MCDI_SET_DWORD(inbuf, GET_ASSERTS_IN_CLEAR, 1);
1499 rc = efx_mcdi_rpc_quiet(efx, MC_CMD_GET_ASSERTS,
1500 inbuf, MC_CMD_GET_ASSERTS_IN_LEN,
1501 outbuf, sizeof(outbuf), &outlen);
1502 if (rc == -EPERM)
1503 return 0;
1504 } while ((rc == -EINTR || rc == -EIO) && retry-- > 0);
1505
1506 if (rc) {
1507 efx_mcdi_display_error(efx, MC_CMD_GET_ASSERTS,
1508 MC_CMD_GET_ASSERTS_IN_LEN, outbuf,
1509 outlen, rc);
1510 return rc;
1511 }
1512 if (outlen < MC_CMD_GET_ASSERTS_OUT_LEN)
1513 return -EIO;
1514
1515 /* Print out any recorded assertion state */
1516 flags = MCDI_DWORD(outbuf, GET_ASSERTS_OUT_GLOBAL_FLAGS);
1517 if (flags == MC_CMD_GET_ASSERTS_FLAGS_NO_FAILS)
1518 return 0;
1519
1520 reason = (flags == MC_CMD_GET_ASSERTS_FLAGS_SYS_FAIL)
1521 ? "system-level assertion"
1522 : (flags == MC_CMD_GET_ASSERTS_FLAGS_THR_FAIL)
1523 ? "thread-level assertion"
1524 : (flags == MC_CMD_GET_ASSERTS_FLAGS_WDOG_FIRED)
1525 ? "watchdog reset"
1526 : "unknown assertion";
1527 netif_err(efx, hw, efx->net_dev,
1528 "MCPU %s at PC = 0x%.8x in thread 0x%.8x\n", reason,
1529 MCDI_DWORD(outbuf, GET_ASSERTS_OUT_SAVED_PC_OFFS),
1530 MCDI_DWORD(outbuf, GET_ASSERTS_OUT_THREAD_OFFS));
1531
1532 /* Print out the registers */
1533 for (index = 0;
1534 index < MC_CMD_GET_ASSERTS_OUT_GP_REGS_OFFS_NUM;
1535 index++)
1536 netif_err(efx, hw, efx->net_dev, "R%.2d (?): 0x%.8x\n",
1537 1 + index,
1538 MCDI_ARRAY_DWORD(outbuf, GET_ASSERTS_OUT_GP_REGS_OFFS,
1539 index));
1540
1541 return 1;
1542 }
1543
1544 static int efx_mcdi_exit_assertion(struct efx_nic *efx)
1545 {
1546 MCDI_DECLARE_BUF(inbuf, MC_CMD_REBOOT_IN_LEN);
1547 int rc;
1548
1549 /* If the MC is running debug firmware, it might now be
1550 * waiting for a debugger to attach, but we just want it to
1551 * reboot. We set a flag that makes the command a no-op if it
1552 * has already done so.
1553 * The MCDI will thus return either 0 or -EIO.
1554 */
1555 BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0);
1556 MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS,
1557 MC_CMD_REBOOT_FLAGS_AFTER_ASSERTION);
1558 rc = efx_mcdi_rpc_quiet(efx, MC_CMD_REBOOT, inbuf, MC_CMD_REBOOT_IN_LEN,
1559 NULL, 0, NULL);
1560 if (rc == -EIO)
1561 rc = 0;
1562 if (rc)
1563 efx_mcdi_display_error(efx, MC_CMD_REBOOT, MC_CMD_REBOOT_IN_LEN,
1564 NULL, 0, rc);
1565 return rc;
1566 }
1567
1568 int efx_mcdi_handle_assertion(struct efx_nic *efx)
1569 {
1570 int rc;
1571
1572 rc = efx_mcdi_read_assertion(efx);
1573 if (rc <= 0)
1574 return rc;
1575
1576 return efx_mcdi_exit_assertion(efx);
1577 }
1578
1579 void efx_mcdi_set_id_led(struct efx_nic *efx, enum efx_led_mode mode)
1580 {
1581 MCDI_DECLARE_BUF(inbuf, MC_CMD_SET_ID_LED_IN_LEN);
1582 int rc;
1583
1584 BUILD_BUG_ON(EFX_LED_OFF != MC_CMD_LED_OFF);
1585 BUILD_BUG_ON(EFX_LED_ON != MC_CMD_LED_ON);
1586 BUILD_BUG_ON(EFX_LED_DEFAULT != MC_CMD_LED_DEFAULT);
1587
1588 BUILD_BUG_ON(MC_CMD_SET_ID_LED_OUT_LEN != 0);
1589
1590 MCDI_SET_DWORD(inbuf, SET_ID_LED_IN_STATE, mode);
1591
1592 rc = efx_mcdi_rpc(efx, MC_CMD_SET_ID_LED, inbuf, sizeof(inbuf),
1593 NULL, 0, NULL);
1594 }
1595
1596 static int efx_mcdi_reset_func(struct efx_nic *efx)
1597 {
1598 MCDI_DECLARE_BUF(inbuf, MC_CMD_ENTITY_RESET_IN_LEN);
1599 int rc;
1600
1601 BUILD_BUG_ON(MC_CMD_ENTITY_RESET_OUT_LEN != 0);
1602 MCDI_POPULATE_DWORD_1(inbuf, ENTITY_RESET_IN_FLAG,
1603 ENTITY_RESET_IN_FUNCTION_RESOURCE_RESET, 1);
1604 rc = efx_mcdi_rpc(efx, MC_CMD_ENTITY_RESET, inbuf, sizeof(inbuf),
1605 NULL, 0, NULL);
1606 return rc;
1607 }
1608
1609 static int efx_mcdi_reset_mc(struct efx_nic *efx)
1610 {
1611 MCDI_DECLARE_BUF(inbuf, MC_CMD_REBOOT_IN_LEN);
1612 int rc;
1613
1614 BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0);
1615 MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS, 0);
1616 rc = efx_mcdi_rpc(efx, MC_CMD_REBOOT, inbuf, sizeof(inbuf),
1617 NULL, 0, NULL);
1618 /* White is black, and up is down */
1619 if (rc == -EIO)
1620 return 0;
1621 if (rc == 0)
1622 rc = -EIO;
1623 return rc;
1624 }
1625
1626 enum reset_type efx_mcdi_map_reset_reason(enum reset_type reason)
1627 {
1628 return RESET_TYPE_RECOVER_OR_ALL;
1629 }
1630
1631 int efx_mcdi_reset(struct efx_nic *efx, enum reset_type method)
1632 {
1633 int rc;
1634
1635 /* If MCDI is down, we can't handle_assertion */
1636 if (method == RESET_TYPE_MCDI_TIMEOUT) {
1637 rc = pci_reset_function(efx->pci_dev);
1638 if (rc)
1639 return rc;
1640 /* Re-enable polled MCDI completion */
1641 if (efx->mcdi) {
1642 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
1643 mcdi->mode = MCDI_MODE_POLL;
1644 }
1645 return 0;
1646 }
1647
1648 /* Recover from a failed assertion pre-reset */
1649 rc = efx_mcdi_handle_assertion(efx);
1650 if (rc)
1651 return rc;
1652
1653 if (method == RESET_TYPE_DATAPATH)
1654 return 0;
1655 else if (method == RESET_TYPE_WORLD)
1656 return efx_mcdi_reset_mc(efx);
1657 else
1658 return efx_mcdi_reset_func(efx);
1659 }
1660
1661 static int efx_mcdi_wol_filter_set(struct efx_nic *efx, u32 type,
1662 const u8 *mac, int *id_out)
1663 {
1664 MCDI_DECLARE_BUF(inbuf, MC_CMD_WOL_FILTER_SET_IN_LEN);
1665 MCDI_DECLARE_BUF(outbuf, MC_CMD_WOL_FILTER_SET_OUT_LEN);
1666 size_t outlen;
1667 int rc;
1668
1669 MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_WOL_TYPE, type);
1670 MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_FILTER_MODE,
1671 MC_CMD_FILTER_MODE_SIMPLE);
1672 ether_addr_copy(MCDI_PTR(inbuf, WOL_FILTER_SET_IN_MAGIC_MAC), mac);
1673
1674 rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_SET, inbuf, sizeof(inbuf),
1675 outbuf, sizeof(outbuf), &outlen);
1676 if (rc)
1677 goto fail;
1678
1679 if (outlen < MC_CMD_WOL_FILTER_SET_OUT_LEN) {
1680 rc = -EIO;
1681 goto fail;
1682 }
1683
1684 *id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_SET_OUT_FILTER_ID);
1685
1686 return 0;
1687
1688 fail:
1689 *id_out = -1;
1690 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1691 return rc;
1692
1693 }
1694
1695
1696 int
1697 efx_mcdi_wol_filter_set_magic(struct efx_nic *efx, const u8 *mac, int *id_out)
1698 {
1699 return efx_mcdi_wol_filter_set(efx, MC_CMD_WOL_TYPE_MAGIC, mac, id_out);
1700 }
1701
1702
1703 int efx_mcdi_wol_filter_get_magic(struct efx_nic *efx, int *id_out)
1704 {
1705 MCDI_DECLARE_BUF(outbuf, MC_CMD_WOL_FILTER_GET_OUT_LEN);
1706 size_t outlen;
1707 int rc;
1708
1709 rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_GET, NULL, 0,
1710 outbuf, sizeof(outbuf), &outlen);
1711 if (rc)
1712 goto fail;
1713
1714 if (outlen < MC_CMD_WOL_FILTER_GET_OUT_LEN) {
1715 rc = -EIO;
1716 goto fail;
1717 }
1718
1719 *id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_GET_OUT_FILTER_ID);
1720
1721 return 0;
1722
1723 fail:
1724 *id_out = -1;
1725 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1726 return rc;
1727 }
1728
1729
1730 int efx_mcdi_wol_filter_remove(struct efx_nic *efx, int id)
1731 {
1732 MCDI_DECLARE_BUF(inbuf, MC_CMD_WOL_FILTER_REMOVE_IN_LEN);
1733 int rc;
1734
1735 MCDI_SET_DWORD(inbuf, WOL_FILTER_REMOVE_IN_FILTER_ID, (u32)id);
1736
1737 rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_REMOVE, inbuf, sizeof(inbuf),
1738 NULL, 0, NULL);
1739 return rc;
1740 }
1741
1742 int efx_mcdi_flush_rxqs(struct efx_nic *efx)
1743 {
1744 struct efx_channel *channel;
1745 struct efx_rx_queue *rx_queue;
1746 MCDI_DECLARE_BUF(inbuf,
1747 MC_CMD_FLUSH_RX_QUEUES_IN_LEN(EFX_MAX_CHANNELS));
1748 int rc, count;
1749
1750 BUILD_BUG_ON(EFX_MAX_CHANNELS >
1751 MC_CMD_FLUSH_RX_QUEUES_IN_QID_OFST_MAXNUM);
1752
1753 count = 0;
1754 efx_for_each_channel(channel, efx) {
1755 efx_for_each_channel_rx_queue(rx_queue, channel) {
1756 if (rx_queue->flush_pending) {
1757 rx_queue->flush_pending = false;
1758 atomic_dec(&efx->rxq_flush_pending);
1759 MCDI_SET_ARRAY_DWORD(
1760 inbuf, FLUSH_RX_QUEUES_IN_QID_OFST,
1761 count, efx_rx_queue_index(rx_queue));
1762 count++;
1763 }
1764 }
1765 }
1766
1767 rc = efx_mcdi_rpc(efx, MC_CMD_FLUSH_RX_QUEUES, inbuf,
1768 MC_CMD_FLUSH_RX_QUEUES_IN_LEN(count), NULL, 0, NULL);
1769 WARN_ON(rc < 0);
1770
1771 return rc;
1772 }
1773
1774 int efx_mcdi_wol_filter_reset(struct efx_nic *efx)
1775 {
1776 int rc;
1777
1778 rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_RESET, NULL, 0, NULL, 0, NULL);
1779 return rc;
1780 }
1781
1782 int efx_mcdi_set_workaround(struct efx_nic *efx, u32 type, bool enabled)
1783 {
1784 MCDI_DECLARE_BUF(inbuf, MC_CMD_WORKAROUND_IN_LEN);
1785
1786 BUILD_BUG_ON(MC_CMD_WORKAROUND_OUT_LEN != 0);
1787 MCDI_SET_DWORD(inbuf, WORKAROUND_IN_TYPE, type);
1788 MCDI_SET_DWORD(inbuf, WORKAROUND_IN_ENABLED, enabled);
1789 return efx_mcdi_rpc(efx, MC_CMD_WORKAROUND, inbuf, sizeof(inbuf),
1790 NULL, 0, NULL);
1791 }
1792
1793 int efx_mcdi_get_workarounds(struct efx_nic *efx, unsigned int *impl_out,
1794 unsigned int *enabled_out)
1795 {
1796 MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_WORKAROUNDS_OUT_LEN);
1797 size_t outlen;
1798 int rc;
1799
1800 rc = efx_mcdi_rpc(efx, MC_CMD_GET_WORKAROUNDS, NULL, 0,
1801 outbuf, sizeof(outbuf), &outlen);
1802 if (rc)
1803 goto fail;
1804
1805 if (outlen < MC_CMD_GET_WORKAROUNDS_OUT_LEN) {
1806 rc = -EIO;
1807 goto fail;
1808 }
1809
1810 if (impl_out)
1811 *impl_out = MCDI_DWORD(outbuf, GET_WORKAROUNDS_OUT_IMPLEMENTED);
1812
1813 if (enabled_out)
1814 *enabled_out = MCDI_DWORD(outbuf, GET_WORKAROUNDS_OUT_ENABLED);
1815
1816 return 0;
1817
1818 fail:
1819 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1820 return rc;
1821 }
1822
1823 #ifdef CONFIG_SFC_MTD
1824
1825 #define EFX_MCDI_NVRAM_LEN_MAX 128
1826
1827 static int efx_mcdi_nvram_update_start(struct efx_nic *efx, unsigned int type)
1828 {
1829 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_UPDATE_START_IN_LEN);
1830 int rc;
1831
1832 MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_START_IN_TYPE, type);
1833
1834 BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_START_OUT_LEN != 0);
1835
1836 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_START, inbuf, sizeof(inbuf),
1837 NULL, 0, NULL);
1838 return rc;
1839 }
1840
1841 static int efx_mcdi_nvram_read(struct efx_nic *efx, unsigned int type,
1842 loff_t offset, u8 *buffer, size_t length)
1843 {
1844 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_READ_IN_LEN);
1845 MCDI_DECLARE_BUF(outbuf,
1846 MC_CMD_NVRAM_READ_OUT_LEN(EFX_MCDI_NVRAM_LEN_MAX));
1847 size_t outlen;
1848 int rc;
1849
1850 MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_TYPE, type);
1851 MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_OFFSET, offset);
1852 MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_LENGTH, length);
1853
1854 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_READ, inbuf, sizeof(inbuf),
1855 outbuf, sizeof(outbuf), &outlen);
1856 if (rc)
1857 return rc;
1858
1859 memcpy(buffer, MCDI_PTR(outbuf, NVRAM_READ_OUT_READ_BUFFER), length);
1860 return 0;
1861 }
1862
1863 static int efx_mcdi_nvram_write(struct efx_nic *efx, unsigned int type,
1864 loff_t offset, const u8 *buffer, size_t length)
1865 {
1866 MCDI_DECLARE_BUF(inbuf,
1867 MC_CMD_NVRAM_WRITE_IN_LEN(EFX_MCDI_NVRAM_LEN_MAX));
1868 int rc;
1869
1870 MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_TYPE, type);
1871 MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_OFFSET, offset);
1872 MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_LENGTH, length);
1873 memcpy(MCDI_PTR(inbuf, NVRAM_WRITE_IN_WRITE_BUFFER), buffer, length);
1874
1875 BUILD_BUG_ON(MC_CMD_NVRAM_WRITE_OUT_LEN != 0);
1876
1877 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_WRITE, inbuf,
1878 ALIGN(MC_CMD_NVRAM_WRITE_IN_LEN(length), 4),
1879 NULL, 0, NULL);
1880 return rc;
1881 }
1882
1883 static int efx_mcdi_nvram_erase(struct efx_nic *efx, unsigned int type,
1884 loff_t offset, size_t length)
1885 {
1886 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_ERASE_IN_LEN);
1887 int rc;
1888
1889 MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_TYPE, type);
1890 MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_OFFSET, offset);
1891 MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_LENGTH, length);
1892
1893 BUILD_BUG_ON(MC_CMD_NVRAM_ERASE_OUT_LEN != 0);
1894
1895 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_ERASE, inbuf, sizeof(inbuf),
1896 NULL, 0, NULL);
1897 return rc;
1898 }
1899
1900 static int efx_mcdi_nvram_update_finish(struct efx_nic *efx, unsigned int type)
1901 {
1902 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_UPDATE_FINISH_IN_LEN);
1903 int rc;
1904
1905 MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_FINISH_IN_TYPE, type);
1906
1907 BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_FINISH_OUT_LEN != 0);
1908
1909 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_FINISH, inbuf, sizeof(inbuf),
1910 NULL, 0, NULL);
1911 return rc;
1912 }
1913
1914 int efx_mcdi_mtd_read(struct mtd_info *mtd, loff_t start,
1915 size_t len, size_t *retlen, u8 *buffer)
1916 {
1917 struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
1918 struct efx_nic *efx = mtd->priv;
1919 loff_t offset = start;
1920 loff_t end = min_t(loff_t, start + len, mtd->size);
1921 size_t chunk;
1922 int rc = 0;
1923
1924 while (offset < end) {
1925 chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX);
1926 rc = efx_mcdi_nvram_read(efx, part->nvram_type, offset,
1927 buffer, chunk);
1928 if (rc)
1929 goto out;
1930 offset += chunk;
1931 buffer += chunk;
1932 }
1933 out:
1934 *retlen = offset - start;
1935 return rc;
1936 }
1937
1938 int efx_mcdi_mtd_erase(struct mtd_info *mtd, loff_t start, size_t len)
1939 {
1940 struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
1941 struct efx_nic *efx = mtd->priv;
1942 loff_t offset = start & ~((loff_t)(mtd->erasesize - 1));
1943 loff_t end = min_t(loff_t, start + len, mtd->size);
1944 size_t chunk = part->common.mtd.erasesize;
1945 int rc = 0;
1946
1947 if (!part->updating) {
1948 rc = efx_mcdi_nvram_update_start(efx, part->nvram_type);
1949 if (rc)
1950 goto out;
1951 part->updating = true;
1952 }
1953
1954 /* The MCDI interface can in fact do multiple erase blocks at once;
1955 * but erasing may be slow, so we make multiple calls here to avoid
1956 * tripping the MCDI RPC timeout. */
1957 while (offset < end) {
1958 rc = efx_mcdi_nvram_erase(efx, part->nvram_type, offset,
1959 chunk);
1960 if (rc)
1961 goto out;
1962 offset += chunk;
1963 }
1964 out:
1965 return rc;
1966 }
1967
1968 int efx_mcdi_mtd_write(struct mtd_info *mtd, loff_t start,
1969 size_t len, size_t *retlen, const u8 *buffer)
1970 {
1971 struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
1972 struct efx_nic *efx = mtd->priv;
1973 loff_t offset = start;
1974 loff_t end = min_t(loff_t, start + len, mtd->size);
1975 size_t chunk;
1976 int rc = 0;
1977
1978 if (!part->updating) {
1979 rc = efx_mcdi_nvram_update_start(efx, part->nvram_type);
1980 if (rc)
1981 goto out;
1982 part->updating = true;
1983 }
1984
1985 while (offset < end) {
1986 chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX);
1987 rc = efx_mcdi_nvram_write(efx, part->nvram_type, offset,
1988 buffer, chunk);
1989 if (rc)
1990 goto out;
1991 offset += chunk;
1992 buffer += chunk;
1993 }
1994 out:
1995 *retlen = offset - start;
1996 return rc;
1997 }
1998
1999 int efx_mcdi_mtd_sync(struct mtd_info *mtd)
2000 {
2001 struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
2002 struct efx_nic *efx = mtd->priv;
2003 int rc = 0;
2004
2005 if (part->updating) {
2006 part->updating = false;
2007 rc = efx_mcdi_nvram_update_finish(efx, part->nvram_type);
2008 }
2009
2010 return rc;
2011 }
2012
2013 void efx_mcdi_mtd_rename(struct efx_mtd_partition *part)
2014 {
2015 struct efx_mcdi_mtd_partition *mcdi_part =
2016 container_of(part, struct efx_mcdi_mtd_partition, common);
2017 struct efx_nic *efx = part->mtd.priv;
2018
2019 snprintf(part->name, sizeof(part->name), "%s %s:%02x",
2020 efx->name, part->type_name, mcdi_part->fw_subtype);
2021 }
2022
2023 #endif /* CONFIG_SFC_MTD */
Linux with added FPC-III support