include/asm-sparc64/ide.h

   1 /* $Id: ide.h,v 1.21 2001/09/25 20:21:48 kanoj Exp $
   2  * ide.h: Ultra/PCI specific IDE glue.
   3  *
   4  * Copyright (C) 1997  David S. Miller (davem@caip.rutgers.edu)
   5  * Copyright (C) 1998  Eddie C. Dost   (ecd@skynet.be)
   6  */
   7
   8 #ifndef _SPARC64_IDE_H
   9 #define _SPARC64_IDE_H
  10
  11 #ifdef __KERNEL__
  12
  13 #include <linux/config.h>
  14 #include <asm/pgalloc.h>
  15 #include <asm/io.h>
  16 #include <asm/spitfire.h>
  17 #include <asm/cacheflush.h>
  18 #include <asm/page.h>
  19
  20 #ifndef MAX_HWIFS
  21 # ifdef CONFIG_BLK_DEV_IDEPCI
  22 #define MAX_HWIFS       10
  23 # else
  24 #define MAX_HWIFS       2
  25 # endif
  26 #endif
  27
  28 #define IDE_ARCH_OBSOLETE_INIT
  29 #define ide_default_io_ctl(base)        ((base) + 0x206) /* obsolete */
  30
  31 #define __ide_insl(data_reg, buffer, wcount) \
  32         __ide_insw(data_reg, buffer, (wcount)<<1)
  33 #define __ide_outsl(data_reg, buffer, wcount) \
  34         __ide_outsw(data_reg, buffer, (wcount)<<1)
  35
  36 /* On sparc64, I/O ports and MMIO registers are accessed identically.  */
  37 #define __ide_mm_insw   __ide_insw
  38 #define __ide_mm_insl   __ide_insl
  39 #define __ide_mm_outsw  __ide_outsw
  40 #define __ide_mm_outsl  __ide_outsl
  41
  42 static inline unsigned int inw_be(void __iomem *addr)
  43 {
  44         unsigned int ret;
  45
  46         __asm__ __volatile__("lduha [%1] %2, %0"
  47                              : "=r" (ret)
  48                              : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
  49
  50         return ret;
  51 }
  52
  53 static inline void __ide_insw(void __iomem *port, void *dst, u32 count)
  54 {
  55 #ifdef DCACHE_ALIASING_POSSIBLE
  56         unsigned long end = (unsigned long)dst + (count << 1);
  57 #endif
  58         u16 *ps = dst;
  59         u32 *pi;
  60
  61         if(((u64)ps) & 0x2) {
  62                 *ps++ = inw_be(port);
  63                 count--;
  64         }
  65         pi = (u32 *)ps;
  66         while(count >= 2) {
  67                 u32 w;
  68
  69                 w  = inw_be(port) << 16;
  70                 w |= inw_be(port);
  71                 *pi++ = w;
  72                 count -= 2;
  73         }
  74         ps = (u16 *)pi;
  75         if(count)
  76                 *ps++ = inw_be(port);
  77
  78 #ifdef DCACHE_ALIASING_POSSIBLE
  79         __flush_dcache_range((unsigned long)dst, end);
  80 #endif
  81 }
  82
  83 static inline void outw_be(unsigned short w, void __iomem *addr)
  84 {
  85         __asm__ __volatile__("stha %0, [%1] %2"
  86                              : /* no outputs */
  87                              : "r" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
  88 }
  89
  90 static inline void __ide_outsw(void __iomem *port, void *src, u32 count)
  91 {
  92 #ifdef DCACHE_ALIASING_POSSIBLE
  93         unsigned long end = (unsigned long)src + (count << 1);
  94 #endif
  95         const u16 *ps = src;
  96         const u32 *pi;
  97
  98         if(((u64)src) & 0x2) {
  99                 outw_be(*ps++, port);
 100                 count--;
 101         }
 102         pi = (const u32 *)ps;
 103         while(count >= 2) {
 104                 u32 w;
 105
 106                 w = *pi++;
 107                 outw_be((w >> 16), port);
 108                 outw_be(w, port);
 109                 count -= 2;
 110         }
 111         ps = (const u16 *)pi;
 112         if(count)
 113                 outw_be(*ps, port);
 114
 115 #ifdef DCACHE_ALIASING_POSSIBLE
 116         __flush_dcache_range((unsigned long)src, end);
 117 #endif
 118 }
 119
 120 #endif /* __KERNEL__ */
 121
 122 #endif /* _SPARC64_IDE_H */