drivers/gpu/drm/i915/intel_crt.c

   1 /*
   2  * Copyright © 2006-2007 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *      Eric Anholt <eric@anholt.net>
  25  */
  26
  27 #include <linux/i2c.h>
  28 #include "drmP.h"
  29 #include "drm.h"
  30 #include "drm_crtc.h"
  31 #include "drm_crtc_helper.h"
  32 #include "intel_drv.h"
  33 #include "i915_drm.h"
  34 #include "i915_drv.h"
  35
  36 static void intel_crt_dpms(struct drm_encoder *encoder, int mode)
  37 {
  38         struct drm_device *dev = encoder->dev;
  39         struct drm_i915_private *dev_priv = dev->dev_private;
  40         u32 temp, reg;
  41
  42         if (HAS_PCH_SPLIT(dev))
  43                 reg = PCH_ADPA;
  44         else
  45                 reg = ADPA;
  46
  47         temp = I915_READ(reg);
  48         temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
  49         temp &= ~ADPA_DAC_ENABLE;
  50
  51         switch(mode) {
  52         case DRM_MODE_DPMS_ON:
  53                 temp |= ADPA_DAC_ENABLE;
  54                 break;
  55         case DRM_MODE_DPMS_STANDBY:
  56                 temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
  57                 break;
  58         case DRM_MODE_DPMS_SUSPEND:
  59                 temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
  60                 break;
  61         case DRM_MODE_DPMS_OFF:
  62                 temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
  63                 break;
  64         }
  65
  66         I915_WRITE(reg, temp);
  67 }
  68
  69 static int intel_crt_mode_valid(struct drm_connector *connector,
  70                                 struct drm_display_mode *mode)
  71 {
  72         struct drm_device *dev = connector->dev;
  73
  74         int max_clock = 0;
  75         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
  76                 return MODE_NO_DBLESCAN;
  77
  78         if (mode->clock < 25000)
  79                 return MODE_CLOCK_LOW;
  80
  81         if (!IS_I9XX(dev))
  82                 max_clock = 350000;
  83         else
  84                 max_clock = 400000;
  85         if (mode->clock > max_clock)
  86                 return MODE_CLOCK_HIGH;
  87
  88         return MODE_OK;
  89 }
  90
  91 static bool intel_crt_mode_fixup(struct drm_encoder *encoder,
  92                                  struct drm_display_mode *mode,
  93                                  struct drm_display_mode *adjusted_mode)
  94 {
  95         return true;
  96 }
  97
  98 static void intel_crt_mode_set(struct drm_encoder *encoder,
  99                                struct drm_display_mode *mode,
 100                                struct drm_display_mode *adjusted_mode)
 101 {
 102
 103         struct drm_device *dev = encoder->dev;
 104         struct drm_crtc *crtc = encoder->crtc;
 105         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 106         struct drm_i915_private *dev_priv = dev->dev_private;
 107         int dpll_md_reg;
 108         u32 adpa, dpll_md;
 109         u32 adpa_reg;
 110
 111         if (intel_crtc->pipe == 0)
 112                 dpll_md_reg = DPLL_A_MD;
 113         else
 114                 dpll_md_reg = DPLL_B_MD;
 115
 116         if (HAS_PCH_SPLIT(dev))
 117                 adpa_reg = PCH_ADPA;
 118         else
 119                 adpa_reg = ADPA;
 120
 121         /*
 122          * Disable separate mode multiplier used when cloning SDVO to CRT
 123          * XXX this needs to be adjusted when we really are cloning
 124          */
 125         if (IS_I965G(dev) && !HAS_PCH_SPLIT(dev)) {
 126                 dpll_md = I915_READ(dpll_md_reg);
 127                 I915_WRITE(dpll_md_reg,
 128                            dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK);
 129         }
 130
 131         adpa = 0;
 132         if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
 133                 adpa |= ADPA_HSYNC_ACTIVE_HIGH;
 134         if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
 135                 adpa |= ADPA_VSYNC_ACTIVE_HIGH;
 136
 137         if (intel_crtc->pipe == 0) {
 138                 adpa |= ADPA_PIPE_A_SELECT;
 139                 if (!HAS_PCH_SPLIT(dev))
 140                         I915_WRITE(BCLRPAT_A, 0);
 141         } else {
 142                 adpa |= ADPA_PIPE_B_SELECT;
 143                 if (!HAS_PCH_SPLIT(dev))
 144                         I915_WRITE(BCLRPAT_B, 0);
 145         }
 146
 147         I915_WRITE(adpa_reg, adpa);
 148 }
 149
 150 static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
 151 {
 152         struct drm_device *dev = connector->dev;
 153         struct drm_i915_private *dev_priv = dev->dev_private;
 154         u32 adpa;
 155         bool ret;
 156
 157         adpa = I915_READ(PCH_ADPA);
 158
 159         adpa &= ~ADPA_CRT_HOTPLUG_MASK;
 160         /* disable HPD first */
 161         I915_WRITE(PCH_ADPA, adpa);
 162         (void)I915_READ(PCH_ADPA);
 163
 164         adpa |= (ADPA_CRT_HOTPLUG_PERIOD_128 |
 165                         ADPA_CRT_HOTPLUG_WARMUP_10MS |
 166                         ADPA_CRT_HOTPLUG_SAMPLE_4S |
 167                         ADPA_CRT_HOTPLUG_VOLTAGE_50 | /* default */
 168                         ADPA_CRT_HOTPLUG_VOLREF_325MV |
 169                         ADPA_CRT_HOTPLUG_ENABLE |
 170                         ADPA_CRT_HOTPLUG_FORCE_TRIGGER);
 171
 172         DRM_DEBUG_KMS("pch crt adpa 0x%x", adpa);
 173         I915_WRITE(PCH_ADPA, adpa);
 174
 175         while ((I915_READ(PCH_ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) != 0)
 176                 ;
 177
 178         /* Check the status to see if both blue and green are on now */
 179         adpa = I915_READ(PCH_ADPA);
 180         adpa &= ADPA_CRT_HOTPLUG_MONITOR_MASK;
 181         if ((adpa == ADPA_CRT_HOTPLUG_MONITOR_COLOR) ||
 182                 (adpa == ADPA_CRT_HOTPLUG_MONITOR_MONO))
 183                 ret = true;
 184         else
 185                 ret = false;
 186
 187         return ret;
 188 }
 189
 190 /**
 191  * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
 192  *
 193  * Not for i915G/i915GM
 194  *
 195  * \return true if CRT is connected.
 196  * \return false if CRT is disconnected.
 197  */
 198 static bool intel_crt_detect_hotplug(struct drm_connector *connector)
 199 {
 200         struct drm_device *dev = connector->dev;
 201         struct drm_i915_private *dev_priv = dev->dev_private;
 202         u32 hotplug_en;
 203         int i, tries = 0;
 204
 205         if (HAS_PCH_SPLIT(dev))
 206                 return intel_ironlake_crt_detect_hotplug(connector);
 207
 208         /*
 209          * On 4 series desktop, CRT detect sequence need to be done twice
 210          * to get a reliable result.
 211          */
 212
 213         if (IS_G4X(dev) && !IS_GM45(dev))
 214                 tries = 2;
 215         else
 216                 tries = 1;
 217         hotplug_en = I915_READ(PORT_HOTPLUG_EN);
 218         hotplug_en &= CRT_FORCE_HOTPLUG_MASK;
 219         hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
 220
 221         if (IS_G4X(dev))
 222                 hotplug_en |= CRT_HOTPLUG_ACTIVATION_PERIOD_64;
 223
 224         hotplug_en |= CRT_HOTPLUG_VOLTAGE_COMPARE_50;
 225
 226         for (i = 0; i < tries ; i++) {
 227                 unsigned long timeout;
 228                 /* turn on the FORCE_DETECT */
 229                 I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
 230                 timeout = jiffies + msecs_to_jiffies(1000);
 231                 /* wait for FORCE_DETECT to go off */
 232                 do {
 233                         if (!(I915_READ(PORT_HOTPLUG_EN) &
 234                                         CRT_HOTPLUG_FORCE_DETECT))
 235                                 break;
 236                         msleep(1);
 237                 } while (time_after(timeout, jiffies));
 238         }
 239
 240         if ((I915_READ(PORT_HOTPLUG_STAT) & CRT_HOTPLUG_MONITOR_MASK) !=
 241             CRT_HOTPLUG_MONITOR_NONE)
 242                 return true;
 243
 244         return false;
 245 }
 246
 247 static bool intel_crt_detect_ddc(struct drm_connector *connector)
 248 {
 249         struct intel_output *intel_output = to_intel_output(connector);
 250
 251         /* CRT should always be at 0, but check anyway */
 252         if (intel_output->type != INTEL_OUTPUT_ANALOG)
 253                 return false;
 254
 255         return intel_ddc_probe(intel_output);
 256 }
 257
 258 static enum drm_connector_status
 259 intel_crt_load_detect(struct drm_crtc *crtc, struct intel_output *intel_output)
 260 {
 261         struct drm_encoder *encoder = &intel_output->enc;
 262         struct drm_device *dev = encoder->dev;
 263         struct drm_i915_private *dev_priv = dev->dev_private;
 264         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 265         uint32_t pipe = intel_crtc->pipe;
 266         uint32_t save_bclrpat;
 267         uint32_t save_vtotal;
 268         uint32_t vtotal, vactive;
 269         uint32_t vsample;
 270         uint32_t vblank, vblank_start, vblank_end;
 271         uint32_t dsl;
 272         uint32_t bclrpat_reg;
 273         uint32_t vtotal_reg;
 274         uint32_t vblank_reg;
 275         uint32_t vsync_reg;
 276         uint32_t pipeconf_reg;
 277         uint32_t pipe_dsl_reg;
 278         uint8_t st00;
 279         enum drm_connector_status status;
 280
 281         if (pipe == 0) {
 282                 bclrpat_reg = BCLRPAT_A;
 283                 vtotal_reg = VTOTAL_A;
 284                 vblank_reg = VBLANK_A;
 285                 vsync_reg = VSYNC_A;
 286                 pipeconf_reg = PIPEACONF;
 287                 pipe_dsl_reg = PIPEADSL;
 288         } else {
 289                 bclrpat_reg = BCLRPAT_B;
 290                 vtotal_reg = VTOTAL_B;
 291                 vblank_reg = VBLANK_B;
 292                 vsync_reg = VSYNC_B;
 293                 pipeconf_reg = PIPEBCONF;
 294                 pipe_dsl_reg = PIPEBDSL;
 295         }
 296
 297         save_bclrpat = I915_READ(bclrpat_reg);
 298         save_vtotal = I915_READ(vtotal_reg);
 299         vblank = I915_READ(vblank_reg);
 300
 301         vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
 302         vactive = (save_vtotal & 0x7ff) + 1;
 303
 304         vblank_start = (vblank & 0xfff) + 1;
 305         vblank_end = ((vblank >> 16) & 0xfff) + 1;
 306
 307         /* Set the border color to purple. */
 308         I915_WRITE(bclrpat_reg, 0x500050);
 309
 310         if (IS_I9XX(dev)) {
 311                 uint32_t pipeconf = I915_READ(pipeconf_reg);
 312                 I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
 313                 /* Wait for next Vblank to substitue
 314                  * border color for Color info */
 315                 intel_wait_for_vblank(dev);
 316                 st00 = I915_READ8(VGA_MSR_WRITE);
 317                 status = ((st00 & (1 << 4)) != 0) ?
 318                         connector_status_connected :
 319                         connector_status_disconnected;
 320
 321                 I915_WRITE(pipeconf_reg, pipeconf);
 322         } else {
 323                 bool restore_vblank = false;
 324                 int count, detect;
 325
 326                 /*
 327                 * If there isn't any border, add some.
 328                 * Yes, this will flicker
 329                 */
 330                 if (vblank_start <= vactive && vblank_end >= vtotal) {
 331                         uint32_t vsync = I915_READ(vsync_reg);
 332                         uint32_t vsync_start = (vsync & 0xffff) + 1;
 333
 334                         vblank_start = vsync_start;
 335                         I915_WRITE(vblank_reg,
 336                                    (vblank_start - 1) |
 337                                    ((vblank_end - 1) << 16));
 338                         restore_vblank = true;
 339                 }
 340                 /* sample in the vertical border, selecting the larger one */
 341                 if (vblank_start - vactive >= vtotal - vblank_end)
 342                         vsample = (vblank_start + vactive) >> 1;
 343                 else
 344                         vsample = (vtotal + vblank_end) >> 1;
 345
 346                 /*
 347                  * Wait for the border to be displayed
 348                  */
 349                 while (I915_READ(pipe_dsl_reg) >= vactive)
 350                         ;
 351                 while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
 352                         ;
 353                 /*
 354                  * Watch ST00 for an entire scanline
 355                  */
 356                 detect = 0;
 357                 count = 0;
 358                 do {
 359                         count++;
 360                         /* Read the ST00 VGA status register */
 361                         st00 = I915_READ8(VGA_MSR_WRITE);
 362                         if (st00 & (1 << 4))
 363                                 detect++;
 364                 } while ((I915_READ(pipe_dsl_reg) == dsl));
 365
 366                 /* restore vblank if necessary */
 367                 if (restore_vblank)
 368                         I915_WRITE(vblank_reg, vblank);
 369                 /*
 370                  * If more than 3/4 of the scanline detected a monitor,
 371                  * then it is assumed to be present. This works even on i830,
 372                  * where there isn't any way to force the border color across
 373                  * the screen
 374                  */
 375                 status = detect * 4 > count * 3 ?
 376                          connector_status_connected :
 377                          connector_status_disconnected;
 378         }
 379
 380         /* Restore previous settings */
 381         I915_WRITE(bclrpat_reg, save_bclrpat);
 382
 383         return status;
 384 }
 385
 386 static enum drm_connector_status intel_crt_detect(struct drm_connector *connector)
 387 {
 388         struct drm_device *dev = connector->dev;
 389         struct intel_output *intel_output = to_intel_output(connector);
 390         struct drm_encoder *encoder = &intel_output->enc;
 391         struct drm_crtc *crtc;
 392         int dpms_mode;
 393         enum drm_connector_status status;
 394
 395         if (IS_I9XX(dev) && !IS_I915G(dev) && !IS_I915GM(dev)) {
 396                 if (intel_crt_detect_hotplug(connector))
 397                         return connector_status_connected;
 398                 else
 399                         return connector_status_disconnected;
 400         }
 401
 402         if (intel_crt_detect_ddc(connector))
 403                 return connector_status_connected;
 404
 405         /* for pre-945g platforms use load detect */
 406         if (encoder->crtc && encoder->crtc->enabled) {
 407                 status = intel_crt_load_detect(encoder->crtc, intel_output);
 408         } else {
 409                 crtc = intel_get_load_detect_pipe(intel_output,
 410                                                   NULL, &dpms_mode);
 411                 if (crtc) {
 412                         status = intel_crt_load_detect(crtc, intel_output);
 413                         intel_release_load_detect_pipe(intel_output, dpms_mode);
 414                 } else
 415                         status = connector_status_unknown;
 416         }
 417
 418         return status;
 419 }
 420
 421 static void intel_crt_destroy(struct drm_connector *connector)
 422 {
 423         struct intel_output *intel_output = to_intel_output(connector);
 424
 425         intel_i2c_destroy(intel_output->ddc_bus);
 426         drm_sysfs_connector_remove(connector);
 427         drm_connector_cleanup(connector);
 428         kfree(connector);
 429 }
 430
 431 static int intel_crt_get_modes(struct drm_connector *connector)
 432 {
 433         int ret;
 434         struct intel_output *intel_output = to_intel_output(connector);
 435         struct i2c_adapter *ddcbus;
 436         struct drm_device *dev = connector->dev;
 437
 438
 439         ret = intel_ddc_get_modes(intel_output);
 440         if (ret || !IS_G4X(dev))
 441                 goto end;
 442
 443         ddcbus = intel_output->ddc_bus;
 444         /* Try to probe digital port for output in DVI-I -> VGA mode. */
 445         intel_output->ddc_bus =
 446                 intel_i2c_create(connector->dev, GPIOD, "CRTDDC_D");
 447
 448         if (!intel_output->ddc_bus) {
 449                 intel_output->ddc_bus = ddcbus;
 450                 dev_printk(KERN_ERR, &connector->dev->pdev->dev,
 451                            "DDC bus registration failed for CRTDDC_D.\n");
 452                 goto end;
 453         }
 454         /* Try to get modes by GPIOD port */
 455         ret = intel_ddc_get_modes(intel_output);
 456         intel_i2c_destroy(ddcbus);
 457
 458 end:
 459         return ret;
 460
 461 }
 462
 463 static int intel_crt_set_property(struct drm_connector *connector,
 464                                   struct drm_property *property,
 465                                   uint64_t value)
 466 {
 467         return 0;
 468 }
 469
 470 /*
 471  * Routines for controlling stuff on the analog port
 472  */
 473
 474 static const struct drm_encoder_helper_funcs intel_crt_helper_funcs = {
 475         .dpms = intel_crt_dpms,
 476         .mode_fixup = intel_crt_mode_fixup,
 477         .prepare = intel_encoder_prepare,
 478         .commit = intel_encoder_commit,
 479         .mode_set = intel_crt_mode_set,
 480 };
 481
 482 static const struct drm_connector_funcs intel_crt_connector_funcs = {
 483         .dpms = drm_helper_connector_dpms,
 484         .detect = intel_crt_detect,
 485         .fill_modes = drm_helper_probe_single_connector_modes,
 486         .destroy = intel_crt_destroy,
 487         .set_property = intel_crt_set_property,
 488 };
 489
 490 static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
 491         .mode_valid = intel_crt_mode_valid,
 492         .get_modes = intel_crt_get_modes,
 493         .best_encoder = intel_best_encoder,
 494 };
 495
 496 static void intel_crt_enc_destroy(struct drm_encoder *encoder)
 497 {
 498         drm_encoder_cleanup(encoder);
 499 }
 500
 501 static const struct drm_encoder_funcs intel_crt_enc_funcs = {
 502         .destroy = intel_crt_enc_destroy,
 503 };
 504
 505 void intel_crt_init(struct drm_device *dev)
 506 {
 507         struct drm_connector *connector;
 508         struct intel_output *intel_output;
 509         struct drm_i915_private *dev_priv = dev->dev_private;
 510         u32 i2c_reg;
 511
 512         intel_output = kzalloc(sizeof(struct intel_output), GFP_KERNEL);
 513         if (!intel_output)
 514                 return;
 515
 516         connector = &intel_output->base;
 517         drm_connector_init(dev, &intel_output->base,
 518                            &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
 519
 520         drm_encoder_init(dev, &intel_output->enc, &intel_crt_enc_funcs,
 521                          DRM_MODE_ENCODER_DAC);
 522
 523         drm_mode_connector_attach_encoder(&intel_output->base,
 524                                           &intel_output->enc);
 525
 526         /* Set up the DDC bus. */
 527         if (HAS_PCH_SPLIT(dev))
 528                 i2c_reg = PCH_GPIOA;
 529         else {
 530                 i2c_reg = GPIOA;
 531                 /* Use VBT information for CRT DDC if available */
 532                 if (dev_priv->crt_ddc_bus != 0)
 533                         i2c_reg = dev_priv->crt_ddc_bus;
 534         }
 535         intel_output->ddc_bus = intel_i2c_create(dev, i2c_reg, "CRTDDC_A");
 536         if (!intel_output->ddc_bus) {
 537                 dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration "
 538                            "failed.\n");
 539                 return;
 540         }
 541
 542         intel_output->type = INTEL_OUTPUT_ANALOG;
 543         intel_output->clone_mask = (1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
 544                                    (1 << INTEL_ANALOG_CLONE_BIT) |
 545                                    (1 << INTEL_SDVO_LVDS_CLONE_BIT);
 546         intel_output->crtc_mask = (1 << 0) | (1 << 1);
 547         connector->interlace_allowed = 0;
 548         connector->doublescan_allowed = 0;
 549
 550         drm_encoder_helper_add(&intel_output->enc, &intel_crt_helper_funcs);
 551         drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
 552
 553         drm_sysfs_connector_add(connector);
 554
 555         dev_priv->hotplug_supported_mask |= CRT_HOTPLUG_INT_STATUS;
 556 }