mmc: sdhci-pxav3: fix setting of pdata->clk_delay_cycles
[linux/fpc-iii.git] / arch / tile / include / uapi / asm / ptrace.h
blobd03b829857e894703200e5da9b55ea5cecca2ea1
1 /*
2 * Copyright 2010 Tilera Corporation. All Rights Reserved.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation, version 2.
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
11 * NON INFRINGEMENT. See the GNU General Public License for
12 * more details.
15 #ifndef _UAPI_ASM_TILE_PTRACE_H
16 #define _UAPI_ASM_TILE_PTRACE_H
18 #include <arch/chip.h>
19 #include <arch/abi.h>
21 /* These must match struct pt_regs, below. */
22 #if CHIP_WORD_SIZE() == 32
23 #define PTREGS_OFFSET_REG(n) ((n)*4)
24 #else
25 #define PTREGS_OFFSET_REG(n) ((n)*8)
26 #endif
27 #define PTREGS_OFFSET_BASE 0
28 #define PTREGS_OFFSET_TP PTREGS_OFFSET_REG(53)
29 #define PTREGS_OFFSET_SP PTREGS_OFFSET_REG(54)
30 #define PTREGS_OFFSET_LR PTREGS_OFFSET_REG(55)
31 #define PTREGS_NR_GPRS 56
32 #define PTREGS_OFFSET_PC PTREGS_OFFSET_REG(56)
33 #define PTREGS_OFFSET_EX1 PTREGS_OFFSET_REG(57)
34 #define PTREGS_OFFSET_FAULTNUM PTREGS_OFFSET_REG(58)
35 #define PTREGS_OFFSET_ORIG_R0 PTREGS_OFFSET_REG(59)
36 #define PTREGS_OFFSET_FLAGS PTREGS_OFFSET_REG(60)
37 #if CHIP_HAS_CMPEXCH()
38 #define PTREGS_OFFSET_CMPEXCH PTREGS_OFFSET_REG(61)
39 #endif
40 #define PTREGS_SIZE PTREGS_OFFSET_REG(64)
43 #ifndef __ASSEMBLY__
45 #ifndef __KERNEL__
46 /* Provide appropriate length type to userspace regardless of -m32/-m64. */
47 typedef uint_reg_t pt_reg_t;
48 #endif
51 * This struct defines the way the registers are stored on the stack during a
52 * system call or exception. "struct sigcontext" has the same shape.
54 struct pt_regs {
55 union {
56 /* Saved main processor registers; 56..63 are special. */
57 pt_reg_t regs[56];
58 struct {
59 pt_reg_t __regs[53];
60 pt_reg_t tp; /* aliases regs[TREG_TP] */
61 pt_reg_t sp; /* aliases regs[TREG_SP] */
62 pt_reg_t lr; /* aliases regs[TREG_LR] */
66 /* Saved special registers. */
67 pt_reg_t pc; /* stored in EX_CONTEXT_K_0 */
68 pt_reg_t ex1; /* stored in EX_CONTEXT_K_1 (PL and ICS bit) */
69 pt_reg_t faultnum; /* fault number (INT_SWINT_1 for syscall) */
70 pt_reg_t orig_r0; /* r0 at syscall entry, else zero */
71 pt_reg_t flags; /* flags (see below) */
72 #if !CHIP_HAS_CMPEXCH()
73 pt_reg_t pad[3];
74 #else
75 pt_reg_t cmpexch; /* value of CMPEXCH_VALUE SPR at interrupt */
76 pt_reg_t pad[2];
77 #endif
80 #endif /* __ASSEMBLY__ */
82 #define PTRACE_GETREGS 12
83 #define PTRACE_SETREGS 13
84 #define PTRACE_GETFPREGS 14
85 #define PTRACE_SETFPREGS 15
87 /* Support TILE-specific ptrace options, with events starting at 16. */
88 #define PTRACE_EVENT_MIGRATE 16
89 #define PTRACE_O_TRACEMIGRATE (1 << PTRACE_EVENT_MIGRATE)
92 * Flag bits in pt_regs.flags that are part of the ptrace API.
93 * We start our numbering higher up to avoid confusion with the
94 * non-ABI kernel-internal values that use the low 16 bits.
96 #define PT_FLAGS_COMPAT 0x10000 /* process is an -m32 compat process */
98 #endif /* _UAPI_ASM_TILE_PTRACE_H */