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Merge branch 'core-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
[linux/fpc-iii.git] / drivers / block / nvme-scsi.c
blob4a0ceb64e26924b0b777d19d1580850b1e12901d
1 /*
2 * NVM Express device driver
3 * Copyright (c) 2011, Intel Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
17 */
18
19 /*
20 * Refer to the SCSI-NVMe Translation spec for details on how
21 * each command is translated.
22 */
23
24 #include <linux/nvme.h>
25 #include <linux/bio.h>
26 #include <linux/bitops.h>
27 #include <linux/blkdev.h>
28 #include <linux/compat.h>
29 #include <linux/delay.h>
30 #include <linux/errno.h>
31 #include <linux/fs.h>
32 #include <linux/genhd.h>
33 #include <linux/idr.h>
34 #include <linux/init.h>
35 #include <linux/interrupt.h>
36 #include <linux/io.h>
37 #include <linux/kdev_t.h>
38 #include <linux/kthread.h>
39 #include <linux/kernel.h>
40 #include <linux/mm.h>
41 #include <linux/module.h>
42 #include <linux/moduleparam.h>
43 #include <linux/pci.h>
44 #include <linux/poison.h>
45 #include <linux/sched.h>
46 #include <linux/slab.h>
47 #include <linux/types.h>
48 #include <scsi/sg.h>
49 #include <scsi/scsi.h>
50
51
52 static int sg_version_num = 30534; /* 2 digits for each component */
53
54 #define SNTI_TRANSLATION_SUCCESS 0
55 #define SNTI_INTERNAL_ERROR 1
56
57 /* VPD Page Codes */
58 #define VPD_SUPPORTED_PAGES 0x00
59 #define VPD_SERIAL_NUMBER 0x80
60 #define VPD_DEVICE_IDENTIFIERS 0x83
61 #define VPD_EXTENDED_INQUIRY 0x86
62 #define VPD_BLOCK_DEV_CHARACTERISTICS 0xB1
63
64 /* CDB offsets */
65 #define REPORT_LUNS_CDB_ALLOC_LENGTH_OFFSET 6
66 #define REPORT_LUNS_SR_OFFSET 2
67 #define READ_CAP_16_CDB_ALLOC_LENGTH_OFFSET 10
68 #define REQUEST_SENSE_CDB_ALLOC_LENGTH_OFFSET 4
69 #define REQUEST_SENSE_DESC_OFFSET 1
70 #define REQUEST_SENSE_DESC_MASK 0x01
71 #define DESCRIPTOR_FORMAT_SENSE_DATA_TYPE 1
72 #define INQUIRY_EVPD_BYTE_OFFSET 1
73 #define INQUIRY_PAGE_CODE_BYTE_OFFSET 2
74 #define INQUIRY_EVPD_BIT_MASK 1
75 #define INQUIRY_CDB_ALLOCATION_LENGTH_OFFSET 3
76 #define START_STOP_UNIT_CDB_IMMED_OFFSET 1
77 #define START_STOP_UNIT_CDB_IMMED_MASK 0x1
78 #define START_STOP_UNIT_CDB_POWER_COND_MOD_OFFSET 3
79 #define START_STOP_UNIT_CDB_POWER_COND_MOD_MASK 0xF
80 #define START_STOP_UNIT_CDB_POWER_COND_OFFSET 4
81 #define START_STOP_UNIT_CDB_POWER_COND_MASK 0xF0
82 #define START_STOP_UNIT_CDB_NO_FLUSH_OFFSET 4
83 #define START_STOP_UNIT_CDB_NO_FLUSH_MASK 0x4
84 #define START_STOP_UNIT_CDB_START_OFFSET 4
85 #define START_STOP_UNIT_CDB_START_MASK 0x1
86 #define WRITE_BUFFER_CDB_MODE_OFFSET 1
87 #define WRITE_BUFFER_CDB_MODE_MASK 0x1F
88 #define WRITE_BUFFER_CDB_BUFFER_ID_OFFSET 2
89 #define WRITE_BUFFER_CDB_BUFFER_OFFSET_OFFSET 3
90 #define WRITE_BUFFER_CDB_PARM_LIST_LENGTH_OFFSET 6
91 #define FORMAT_UNIT_CDB_FORMAT_PROT_INFO_OFFSET 1
92 #define FORMAT_UNIT_CDB_FORMAT_PROT_INFO_MASK 0xC0
93 #define FORMAT_UNIT_CDB_FORMAT_PROT_INFO_SHIFT 6
94 #define FORMAT_UNIT_CDB_LONG_LIST_OFFSET 1
95 #define FORMAT_UNIT_CDB_LONG_LIST_MASK 0x20
96 #define FORMAT_UNIT_CDB_FORMAT_DATA_OFFSET 1
97 #define FORMAT_UNIT_CDB_FORMAT_DATA_MASK 0x10
98 #define FORMAT_UNIT_SHORT_PARM_LIST_LEN 4
99 #define FORMAT_UNIT_LONG_PARM_LIST_LEN 8
100 #define FORMAT_UNIT_PROT_INT_OFFSET 3
101 #define FORMAT_UNIT_PROT_FIELD_USAGE_OFFSET 0
102 #define FORMAT_UNIT_PROT_FIELD_USAGE_MASK 0x07
103 #define UNMAP_CDB_PARAM_LIST_LENGTH_OFFSET 7
104
105 /* Misc. defines */
106 #define NIBBLE_SHIFT 4
107 #define FIXED_SENSE_DATA 0x70
108 #define DESC_FORMAT_SENSE_DATA 0x72
109 #define FIXED_SENSE_DATA_ADD_LENGTH 10
110 #define LUN_ENTRY_SIZE 8
111 #define LUN_DATA_HEADER_SIZE 8
112 #define ALL_LUNS_RETURNED 0x02
113 #define ALL_WELL_KNOWN_LUNS_RETURNED 0x01
114 #define RESTRICTED_LUNS_RETURNED 0x00
115 #define NVME_POWER_STATE_START_VALID 0x00
116 #define NVME_POWER_STATE_ACTIVE 0x01
117 #define NVME_POWER_STATE_IDLE 0x02
118 #define NVME_POWER_STATE_STANDBY 0x03
119 #define NVME_POWER_STATE_LU_CONTROL 0x07
120 #define POWER_STATE_0 0
121 #define POWER_STATE_1 1
122 #define POWER_STATE_2 2
123 #define POWER_STATE_3 3
124 #define DOWNLOAD_SAVE_ACTIVATE 0x05
125 #define DOWNLOAD_SAVE_DEFER_ACTIVATE 0x0E
126 #define ACTIVATE_DEFERRED_MICROCODE 0x0F
127 #define FORMAT_UNIT_IMMED_MASK 0x2
128 #define FORMAT_UNIT_IMMED_OFFSET 1
129 #define KELVIN_TEMP_FACTOR 273
130 #define FIXED_FMT_SENSE_DATA_SIZE 18
131 #define DESC_FMT_SENSE_DATA_SIZE 8
132
133 /* SCSI/NVMe defines and bit masks */
134 #define INQ_STANDARD_INQUIRY_PAGE 0x00
135 #define INQ_SUPPORTED_VPD_PAGES_PAGE 0x00
136 #define INQ_UNIT_SERIAL_NUMBER_PAGE 0x80
137 #define INQ_DEVICE_IDENTIFICATION_PAGE 0x83
138 #define INQ_EXTENDED_INQUIRY_DATA_PAGE 0x86
139 #define INQ_BDEV_CHARACTERISTICS_PAGE 0xB1
140 #define INQ_SERIAL_NUMBER_LENGTH 0x14
141 #define INQ_NUM_SUPPORTED_VPD_PAGES 5
142 #define VERSION_SPC_4 0x06
143 #define ACA_UNSUPPORTED 0
144 #define STANDARD_INQUIRY_LENGTH 36
145 #define ADDITIONAL_STD_INQ_LENGTH 31
146 #define EXTENDED_INQUIRY_DATA_PAGE_LENGTH 0x3C
147 #define RESERVED_FIELD 0
148
149 /* SCSI READ/WRITE Defines */
150 #define IO_CDB_WP_MASK 0xE0
151 #define IO_CDB_WP_SHIFT 5
152 #define IO_CDB_FUA_MASK 0x8
153 #define IO_6_CDB_LBA_OFFSET 0
154 #define IO_6_CDB_LBA_MASK 0x001FFFFF
155 #define IO_6_CDB_TX_LEN_OFFSET 4
156 #define IO_6_DEFAULT_TX_LEN 256
157 #define IO_10_CDB_LBA_OFFSET 2
158 #define IO_10_CDB_TX_LEN_OFFSET 7
159 #define IO_10_CDB_WP_OFFSET 1
160 #define IO_10_CDB_FUA_OFFSET 1
161 #define IO_12_CDB_LBA_OFFSET 2
162 #define IO_12_CDB_TX_LEN_OFFSET 6
163 #define IO_12_CDB_WP_OFFSET 1
164 #define IO_12_CDB_FUA_OFFSET 1
165 #define IO_16_CDB_FUA_OFFSET 1
166 #define IO_16_CDB_WP_OFFSET 1
167 #define IO_16_CDB_LBA_OFFSET 2
168 #define IO_16_CDB_TX_LEN_OFFSET 10
169
170 /* Mode Sense/Select defines */
171 #define MODE_PAGE_INFO_EXCEP 0x1C
172 #define MODE_PAGE_CACHING 0x08
173 #define MODE_PAGE_CONTROL 0x0A
174 #define MODE_PAGE_POWER_CONDITION 0x1A
175 #define MODE_PAGE_RETURN_ALL 0x3F
176 #define MODE_PAGE_BLK_DES_LEN 0x08
177 #define MODE_PAGE_LLBAA_BLK_DES_LEN 0x10
178 #define MODE_PAGE_CACHING_LEN 0x14
179 #define MODE_PAGE_CONTROL_LEN 0x0C
180 #define MODE_PAGE_POW_CND_LEN 0x28
181 #define MODE_PAGE_INF_EXC_LEN 0x0C
182 #define MODE_PAGE_ALL_LEN 0x54
183 #define MODE_SENSE6_MPH_SIZE 4
184 #define MODE_SENSE6_ALLOC_LEN_OFFSET 4
185 #define MODE_SENSE_PAGE_CONTROL_OFFSET 2
186 #define MODE_SENSE_PAGE_CONTROL_MASK 0xC0
187 #define MODE_SENSE_PAGE_CODE_OFFSET 2
188 #define MODE_SENSE_PAGE_CODE_MASK 0x3F
189 #define MODE_SENSE_LLBAA_OFFSET 1
190 #define MODE_SENSE_LLBAA_MASK 0x10
191 #define MODE_SENSE_LLBAA_SHIFT 4
192 #define MODE_SENSE_DBD_OFFSET 1
193 #define MODE_SENSE_DBD_MASK 8
194 #define MODE_SENSE_DBD_SHIFT 3
195 #define MODE_SENSE10_MPH_SIZE 8
196 #define MODE_SENSE10_ALLOC_LEN_OFFSET 7
197 #define MODE_SELECT_CDB_PAGE_FORMAT_OFFSET 1
198 #define MODE_SELECT_CDB_SAVE_PAGES_OFFSET 1
199 #define MODE_SELECT_6_CDB_PARAM_LIST_LENGTH_OFFSET 4
200 #define MODE_SELECT_10_CDB_PARAM_LIST_LENGTH_OFFSET 7
201 #define MODE_SELECT_CDB_PAGE_FORMAT_MASK 0x10
202 #define MODE_SELECT_CDB_SAVE_PAGES_MASK 0x1
203 #define MODE_SELECT_6_BD_OFFSET 3
204 #define MODE_SELECT_10_BD_OFFSET 6
205 #define MODE_SELECT_10_LLBAA_OFFSET 4
206 #define MODE_SELECT_10_LLBAA_MASK 1
207 #define MODE_SELECT_6_MPH_SIZE 4
208 #define MODE_SELECT_10_MPH_SIZE 8
209 #define CACHING_MODE_PAGE_WCE_MASK 0x04
210 #define MODE_SENSE_BLK_DESC_ENABLED 0
211 #define MODE_SENSE_BLK_DESC_COUNT 1
212 #define MODE_SELECT_PAGE_CODE_MASK 0x3F
213 #define SHORT_DESC_BLOCK 8
214 #define LONG_DESC_BLOCK 16
215 #define MODE_PAGE_POW_CND_LEN_FIELD 0x26
216 #define MODE_PAGE_INF_EXC_LEN_FIELD 0x0A
217 #define MODE_PAGE_CACHING_LEN_FIELD 0x12
218 #define MODE_PAGE_CONTROL_LEN_FIELD 0x0A
219 #define MODE_SENSE_PC_CURRENT_VALUES 0
220
221 /* Log Sense defines */
222 #define LOG_PAGE_SUPPORTED_LOG_PAGES_PAGE 0x00
223 #define LOG_PAGE_SUPPORTED_LOG_PAGES_LENGTH 0x07
224 #define LOG_PAGE_INFORMATIONAL_EXCEPTIONS_PAGE 0x2F
225 #define LOG_PAGE_TEMPERATURE_PAGE 0x0D
226 #define LOG_SENSE_CDB_SP_OFFSET 1
227 #define LOG_SENSE_CDB_SP_NOT_ENABLED 0
228 #define LOG_SENSE_CDB_PC_OFFSET 2
229 #define LOG_SENSE_CDB_PC_MASK 0xC0
230 #define LOG_SENSE_CDB_PC_SHIFT 6
231 #define LOG_SENSE_CDB_PC_CUMULATIVE_VALUES 1
232 #define LOG_SENSE_CDB_PAGE_CODE_MASK 0x3F
233 #define LOG_SENSE_CDB_ALLOC_LENGTH_OFFSET 7
234 #define REMAINING_INFO_EXCP_PAGE_LENGTH 0x8
235 #define LOG_INFO_EXCP_PAGE_LENGTH 0xC
236 #define REMAINING_TEMP_PAGE_LENGTH 0xC
237 #define LOG_TEMP_PAGE_LENGTH 0x10
238 #define LOG_TEMP_UNKNOWN 0xFF
239 #define SUPPORTED_LOG_PAGES_PAGE_LENGTH 0x3
240
241 /* Read Capacity defines */
242 #define READ_CAP_10_RESP_SIZE 8
243 #define READ_CAP_16_RESP_SIZE 32
244
245 /* NVMe Namespace and Command Defines */
246 #define NVME_GET_SMART_LOG_PAGE 0x02
247 #define NVME_GET_FEAT_TEMP_THRESH 0x04
248 #define BYTES_TO_DWORDS 4
249 #define NVME_MAX_FIRMWARE_SLOT 7
250
251 /* Report LUNs defines */
252 #define REPORT_LUNS_FIRST_LUN_OFFSET 8
253
254 /* SCSI ADDITIONAL SENSE Codes */
255
256 #define SCSI_ASC_NO_SENSE 0x00
257 #define SCSI_ASC_PERIPHERAL_DEV_WRITE_FAULT 0x03
258 #define SCSI_ASC_LUN_NOT_READY 0x04
259 #define SCSI_ASC_WARNING 0x0B
260 #define SCSI_ASC_LOG_BLOCK_GUARD_CHECK_FAILED 0x10
261 #define SCSI_ASC_LOG_BLOCK_APPTAG_CHECK_FAILED 0x10
262 #define SCSI_ASC_LOG_BLOCK_REFTAG_CHECK_FAILED 0x10
263 #define SCSI_ASC_UNRECOVERED_READ_ERROR 0x11
264 #define SCSI_ASC_MISCOMPARE_DURING_VERIFY 0x1D
265 #define SCSI_ASC_ACCESS_DENIED_INVALID_LUN_ID 0x20
266 #define SCSI_ASC_ILLEGAL_COMMAND 0x20
267 #define SCSI_ASC_ILLEGAL_BLOCK 0x21
268 #define SCSI_ASC_INVALID_CDB 0x24
269 #define SCSI_ASC_INVALID_LUN 0x25
270 #define SCSI_ASC_INVALID_PARAMETER 0x26
271 #define SCSI_ASC_FORMAT_COMMAND_FAILED 0x31
272 #define SCSI_ASC_INTERNAL_TARGET_FAILURE 0x44
273
274 /* SCSI ADDITIONAL SENSE Code Qualifiers */
275
276 #define SCSI_ASCQ_CAUSE_NOT_REPORTABLE 0x00
277 #define SCSI_ASCQ_FORMAT_COMMAND_FAILED 0x01
278 #define SCSI_ASCQ_LOG_BLOCK_GUARD_CHECK_FAILED 0x01
279 #define SCSI_ASCQ_LOG_BLOCK_APPTAG_CHECK_FAILED 0x02
280 #define SCSI_ASCQ_LOG_BLOCK_REFTAG_CHECK_FAILED 0x03
281 #define SCSI_ASCQ_FORMAT_IN_PROGRESS 0x04
282 #define SCSI_ASCQ_POWER_LOSS_EXPECTED 0x08
283 #define SCSI_ASCQ_INVALID_LUN_ID 0x09
284
285 /**
286 * DEVICE_SPECIFIC_PARAMETER in mode parameter header (see sbc2r16) to
287 * enable DPOFUA support type 0x10 value.
288 */
289 #define DEVICE_SPECIFIC_PARAMETER 0
290 #define VPD_ID_DESCRIPTOR_LENGTH sizeof(VPD_IDENTIFICATION_DESCRIPTOR)
291
292 /* MACROs to extract information from CDBs */
293
294 #define GET_OPCODE(cdb) cdb[0]
295
296 #define GET_U8_FROM_CDB(cdb, index) (cdb[index] << 0)
297
298 #define GET_U16_FROM_CDB(cdb, index) ((cdb[index] << 8) | (cdb[index + 1] << 0))
299
300 #define GET_U24_FROM_CDB(cdb, index) ((cdb[index] << 16) | \
301 (cdb[index + 1] << 8) | \
302 (cdb[index + 2] << 0))
303
304 #define GET_U32_FROM_CDB(cdb, index) ((cdb[index] << 24) | \
305 (cdb[index + 1] << 16) | \
306 (cdb[index + 2] << 8) | \
307 (cdb[index + 3] << 0))
308
309 #define GET_U64_FROM_CDB(cdb, index) ((((u64)cdb[index]) << 56) | \
310 (((u64)cdb[index + 1]) << 48) | \
311 (((u64)cdb[index + 2]) << 40) | \
312 (((u64)cdb[index + 3]) << 32) | \
313 (((u64)cdb[index + 4]) << 24) | \
314 (((u64)cdb[index + 5]) << 16) | \
315 (((u64)cdb[index + 6]) << 8) | \
316 (((u64)cdb[index + 7]) << 0))
317
318 /* Inquiry Helper Macros */
319 #define GET_INQ_EVPD_BIT(cdb) \
320 ((GET_U8_FROM_CDB(cdb, INQUIRY_EVPD_BYTE_OFFSET) & \
321 INQUIRY_EVPD_BIT_MASK) ? 1 : 0)
322
323 #define GET_INQ_PAGE_CODE(cdb) \
324 (GET_U8_FROM_CDB(cdb, INQUIRY_PAGE_CODE_BYTE_OFFSET))
325
326 #define GET_INQ_ALLOC_LENGTH(cdb) \
327 (GET_U16_FROM_CDB(cdb, INQUIRY_CDB_ALLOCATION_LENGTH_OFFSET))
328
329 /* Report LUNs Helper Macros */
330 #define GET_REPORT_LUNS_ALLOC_LENGTH(cdb) \
331 (GET_U32_FROM_CDB(cdb, REPORT_LUNS_CDB_ALLOC_LENGTH_OFFSET))
332
333 /* Read Capacity Helper Macros */
334 #define GET_READ_CAP_16_ALLOC_LENGTH(cdb) \
335 (GET_U32_FROM_CDB(cdb, READ_CAP_16_CDB_ALLOC_LENGTH_OFFSET))
336
337 #define IS_READ_CAP_16(cdb) \
338 ((cdb[0] == SERVICE_ACTION_IN && cdb[1] == SAI_READ_CAPACITY_16) ? 1 : 0)
339
340 /* Request Sense Helper Macros */
341 #define GET_REQUEST_SENSE_ALLOC_LENGTH(cdb) \
342 (GET_U8_FROM_CDB(cdb, REQUEST_SENSE_CDB_ALLOC_LENGTH_OFFSET))
343
344 /* Mode Sense Helper Macros */
345 #define GET_MODE_SENSE_DBD(cdb) \
346 ((GET_U8_FROM_CDB(cdb, MODE_SENSE_DBD_OFFSET) & MODE_SENSE_DBD_MASK) >> \
347 MODE_SENSE_DBD_SHIFT)
348
349 #define GET_MODE_SENSE_LLBAA(cdb) \
350 ((GET_U8_FROM_CDB(cdb, MODE_SENSE_LLBAA_OFFSET) & \
351 MODE_SENSE_LLBAA_MASK) >> MODE_SENSE_LLBAA_SHIFT)
352
353 #define GET_MODE_SENSE_MPH_SIZE(cdb10) \
354 (cdb10 ? MODE_SENSE10_MPH_SIZE : MODE_SENSE6_MPH_SIZE)
355
356
357 /* Struct to gather data that needs to be extracted from a SCSI CDB.
358 Not conforming to any particular CDB variant, but compatible with all. */
359
360 struct nvme_trans_io_cdb {
361 u8 fua;
362 u8 prot_info;
363 u64 lba;
364 u32 xfer_len;
365 };
366
367
368 /* Internal Helper Functions */
369
370
371 /* Copy data to userspace memory */
372
373 static int nvme_trans_copy_to_user(struct sg_io_hdr *hdr, void *from,
374 unsigned long n)
375 {
376 int res = SNTI_TRANSLATION_SUCCESS;
377 unsigned long not_copied;
378 int i;
379 void *index = from;
380 size_t remaining = n;
381 size_t xfer_len;
382
383 if (hdr->iovec_count > 0) {
384 struct sg_iovec sgl;
385
386 for (i = 0; i < hdr->iovec_count; i++) {
387 not_copied = copy_from_user(&sgl, hdr->dxferp +
388 i * sizeof(struct sg_iovec),
389 sizeof(struct sg_iovec));
390 if (not_copied)
391 return -EFAULT;
392 xfer_len = min(remaining, sgl.iov_len);
393 not_copied = copy_to_user(sgl.iov_base, index,
394 xfer_len);
395 if (not_copied) {
396 res = -EFAULT;
397 break;
398 }
399 index += xfer_len;
400 remaining -= xfer_len;
401 if (remaining == 0)
402 break;
403 }
404 return res;
405 }
406 not_copied = copy_to_user(hdr->dxferp, from, n);
407 if (not_copied)
408 res = -EFAULT;
409 return res;
410 }
411
412 /* Copy data from userspace memory */
413
414 static int nvme_trans_copy_from_user(struct sg_io_hdr *hdr, void *to,
415 unsigned long n)
416 {
417 int res = SNTI_TRANSLATION_SUCCESS;
418 unsigned long not_copied;
419 int i;
420 void *index = to;
421 size_t remaining = n;
422 size_t xfer_len;
423
424 if (hdr->iovec_count > 0) {
425 struct sg_iovec sgl;
426
427 for (i = 0; i < hdr->iovec_count; i++) {
428 not_copied = copy_from_user(&sgl, hdr->dxferp +
429 i * sizeof(struct sg_iovec),
430 sizeof(struct sg_iovec));
431 if (not_copied)
432 return -EFAULT;
433 xfer_len = min(remaining, sgl.iov_len);
434 not_copied = copy_from_user(index, sgl.iov_base,
435 xfer_len);
436 if (not_copied) {
437 res = -EFAULT;
438 break;
439 }
440 index += xfer_len;
441 remaining -= xfer_len;
442 if (remaining == 0)
443 break;
444 }
445 return res;
446 }
447
448 not_copied = copy_from_user(to, hdr->dxferp, n);
449 if (not_copied)
450 res = -EFAULT;
451 return res;
452 }
453
454 /* Status/Sense Buffer Writeback */
455
456 static int nvme_trans_completion(struct sg_io_hdr *hdr, u8 status, u8 sense_key,
457 u8 asc, u8 ascq)
458 {
459 int res = SNTI_TRANSLATION_SUCCESS;
460 u8 xfer_len;
461 u8 resp[DESC_FMT_SENSE_DATA_SIZE];
462
463 if (scsi_status_is_good(status)) {
464 hdr->status = SAM_STAT_GOOD;
465 hdr->masked_status = GOOD;
466 hdr->host_status = DID_OK;
467 hdr->driver_status = DRIVER_OK;
468 hdr->sb_len_wr = 0;
469 } else {
470 hdr->status = status;
471 hdr->masked_status = status >> 1;
472 hdr->host_status = DID_OK;
473 hdr->driver_status = DRIVER_OK;
474
475 memset(resp, 0, DESC_FMT_SENSE_DATA_SIZE);
476 resp[0] = DESC_FORMAT_SENSE_DATA;
477 resp[1] = sense_key;
478 resp[2] = asc;
479 resp[3] = ascq;
480
481 xfer_len = min_t(u8, hdr->mx_sb_len, DESC_FMT_SENSE_DATA_SIZE);
482 hdr->sb_len_wr = xfer_len;
483 if (copy_to_user(hdr->sbp, resp, xfer_len) > 0)
484 res = -EFAULT;
485 }
486
487 return res;
488 }
489
490 static int nvme_trans_status_code(struct sg_io_hdr *hdr, int nvme_sc)
491 {
492 u8 status, sense_key, asc, ascq;
493 int res = SNTI_TRANSLATION_SUCCESS;
494
495 /* For non-nvme (Linux) errors, simply return the error code */
496 if (nvme_sc < 0)
497 return nvme_sc;
498
499 /* Mask DNR, More, and reserved fields */
500 nvme_sc &= 0x7FF;
501
502 switch (nvme_sc) {
503 /* Generic Command Status */
504 case NVME_SC_SUCCESS:
505 status = SAM_STAT_GOOD;
506 sense_key = NO_SENSE;
507 asc = SCSI_ASC_NO_SENSE;
508 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
509 break;
510 case NVME_SC_INVALID_OPCODE:
511 status = SAM_STAT_CHECK_CONDITION;
512 sense_key = ILLEGAL_REQUEST;
513 asc = SCSI_ASC_ILLEGAL_COMMAND;
514 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
515 break;
516 case NVME_SC_INVALID_FIELD:
517 status = SAM_STAT_CHECK_CONDITION;
518 sense_key = ILLEGAL_REQUEST;
519 asc = SCSI_ASC_INVALID_CDB;
520 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
521 break;
522 case NVME_SC_DATA_XFER_ERROR:
523 status = SAM_STAT_CHECK_CONDITION;
524 sense_key = MEDIUM_ERROR;
525 asc = SCSI_ASC_NO_SENSE;
526 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
527 break;
528 case NVME_SC_POWER_LOSS:
529 status = SAM_STAT_TASK_ABORTED;
530 sense_key = ABORTED_COMMAND;
531 asc = SCSI_ASC_WARNING;
532 ascq = SCSI_ASCQ_POWER_LOSS_EXPECTED;
533 break;
534 case NVME_SC_INTERNAL:
535 status = SAM_STAT_CHECK_CONDITION;
536 sense_key = HARDWARE_ERROR;
537 asc = SCSI_ASC_INTERNAL_TARGET_FAILURE;
538 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
539 break;
540 case NVME_SC_ABORT_REQ:
541 status = SAM_STAT_TASK_ABORTED;
542 sense_key = ABORTED_COMMAND;
543 asc = SCSI_ASC_NO_SENSE;
544 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
545 break;
546 case NVME_SC_ABORT_QUEUE:
547 status = SAM_STAT_TASK_ABORTED;
548 sense_key = ABORTED_COMMAND;
549 asc = SCSI_ASC_NO_SENSE;
550 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
551 break;
552 case NVME_SC_FUSED_FAIL:
553 status = SAM_STAT_TASK_ABORTED;
554 sense_key = ABORTED_COMMAND;
555 asc = SCSI_ASC_NO_SENSE;
556 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
557 break;
558 case NVME_SC_FUSED_MISSING:
559 status = SAM_STAT_TASK_ABORTED;
560 sense_key = ABORTED_COMMAND;
561 asc = SCSI_ASC_NO_SENSE;
562 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
563 break;
564 case NVME_SC_INVALID_NS:
565 status = SAM_STAT_CHECK_CONDITION;
566 sense_key = ILLEGAL_REQUEST;
567 asc = SCSI_ASC_ACCESS_DENIED_INVALID_LUN_ID;
568 ascq = SCSI_ASCQ_INVALID_LUN_ID;
569 break;
570 case NVME_SC_LBA_RANGE:
571 status = SAM_STAT_CHECK_CONDITION;
572 sense_key = ILLEGAL_REQUEST;
573 asc = SCSI_ASC_ILLEGAL_BLOCK;
574 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
575 break;
576 case NVME_SC_CAP_EXCEEDED:
577 status = SAM_STAT_CHECK_CONDITION;
578 sense_key = MEDIUM_ERROR;
579 asc = SCSI_ASC_NO_SENSE;
580 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
581 break;
582 case NVME_SC_NS_NOT_READY:
583 status = SAM_STAT_CHECK_CONDITION;
584 sense_key = NOT_READY;
585 asc = SCSI_ASC_LUN_NOT_READY;
586 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
587 break;
588
589 /* Command Specific Status */
590 case NVME_SC_INVALID_FORMAT:
591 status = SAM_STAT_CHECK_CONDITION;
592 sense_key = ILLEGAL_REQUEST;
593 asc = SCSI_ASC_FORMAT_COMMAND_FAILED;
594 ascq = SCSI_ASCQ_FORMAT_COMMAND_FAILED;
595 break;
596 case NVME_SC_BAD_ATTRIBUTES:
597 status = SAM_STAT_CHECK_CONDITION;
598 sense_key = ILLEGAL_REQUEST;
599 asc = SCSI_ASC_INVALID_CDB;
600 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
601 break;
602
603 /* Media Errors */
604 case NVME_SC_WRITE_FAULT:
605 status = SAM_STAT_CHECK_CONDITION;
606 sense_key = MEDIUM_ERROR;
607 asc = SCSI_ASC_PERIPHERAL_DEV_WRITE_FAULT;
608 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
609 break;
610 case NVME_SC_READ_ERROR:
611 status = SAM_STAT_CHECK_CONDITION;
612 sense_key = MEDIUM_ERROR;
613 asc = SCSI_ASC_UNRECOVERED_READ_ERROR;
614 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
615 break;
616 case NVME_SC_GUARD_CHECK:
617 status = SAM_STAT_CHECK_CONDITION;
618 sense_key = MEDIUM_ERROR;
619 asc = SCSI_ASC_LOG_BLOCK_GUARD_CHECK_FAILED;
620 ascq = SCSI_ASCQ_LOG_BLOCK_GUARD_CHECK_FAILED;
621 break;
622 case NVME_SC_APPTAG_CHECK:
623 status = SAM_STAT_CHECK_CONDITION;
624 sense_key = MEDIUM_ERROR;
625 asc = SCSI_ASC_LOG_BLOCK_APPTAG_CHECK_FAILED;
626 ascq = SCSI_ASCQ_LOG_BLOCK_APPTAG_CHECK_FAILED;
627 break;
628 case NVME_SC_REFTAG_CHECK:
629 status = SAM_STAT_CHECK_CONDITION;
630 sense_key = MEDIUM_ERROR;
631 asc = SCSI_ASC_LOG_BLOCK_REFTAG_CHECK_FAILED;
632 ascq = SCSI_ASCQ_LOG_BLOCK_REFTAG_CHECK_FAILED;
633 break;
634 case NVME_SC_COMPARE_FAILED:
635 status = SAM_STAT_CHECK_CONDITION;
636 sense_key = MISCOMPARE;
637 asc = SCSI_ASC_MISCOMPARE_DURING_VERIFY;
638 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
639 break;
640 case NVME_SC_ACCESS_DENIED:
641 status = SAM_STAT_CHECK_CONDITION;
642 sense_key = ILLEGAL_REQUEST;
643 asc = SCSI_ASC_ACCESS_DENIED_INVALID_LUN_ID;
644 ascq = SCSI_ASCQ_INVALID_LUN_ID;
645 break;
646
647 /* Unspecified/Default */
648 case NVME_SC_CMDID_CONFLICT:
649 case NVME_SC_CMD_SEQ_ERROR:
650 case NVME_SC_CQ_INVALID:
651 case NVME_SC_QID_INVALID:
652 case NVME_SC_QUEUE_SIZE:
653 case NVME_SC_ABORT_LIMIT:
654 case NVME_SC_ABORT_MISSING:
655 case NVME_SC_ASYNC_LIMIT:
656 case NVME_SC_FIRMWARE_SLOT:
657 case NVME_SC_FIRMWARE_IMAGE:
658 case NVME_SC_INVALID_VECTOR:
659 case NVME_SC_INVALID_LOG_PAGE:
660 default:
661 status = SAM_STAT_CHECK_CONDITION;
662 sense_key = ILLEGAL_REQUEST;
663 asc = SCSI_ASC_NO_SENSE;
664 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
665 break;
666 }
667
668 res = nvme_trans_completion(hdr, status, sense_key, asc, ascq);
669
670 return res;
671 }
672
673 /* INQUIRY Helper Functions */
674
675 static int nvme_trans_standard_inquiry_page(struct nvme_ns *ns,
676 struct sg_io_hdr *hdr, u8 *inq_response,
677 int alloc_len)
678 {
679 struct nvme_dev *dev = ns->dev;
680 dma_addr_t dma_addr;
681 void *mem;
682 struct nvme_id_ns *id_ns;
683 int res = SNTI_TRANSLATION_SUCCESS;
684 int nvme_sc;
685 int xfer_len;
686 u8 resp_data_format = 0x02;
687 u8 protect;
688 u8 cmdque = 0x01 << 1;
689
690 mem = dma_alloc_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns),
691 &dma_addr, GFP_KERNEL);
692 if (mem == NULL) {
693 res = -ENOMEM;
694 goto out_dma;
695 }
696
697 /* nvme ns identify - use DPS value for PROTECT field */
698 nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
699 res = nvme_trans_status_code(hdr, nvme_sc);
700 /*
701 * If nvme_sc was -ve, res will be -ve here.
702 * If nvme_sc was +ve, the status would bace been translated, and res
703 * can only be 0 or -ve.
704 * - If 0 && nvme_sc > 0, then go into next if where res gets nvme_sc
705 * - If -ve, return because its a Linux error.
706 */
707 if (res)
708 goto out_free;
709 if (nvme_sc) {
710 res = nvme_sc;
711 goto out_free;
712 }
713 id_ns = mem;
714 (id_ns->dps) ? (protect = 0x01) : (protect = 0);
715
716 memset(inq_response, 0, STANDARD_INQUIRY_LENGTH);
717 inq_response[2] = VERSION_SPC_4;
718 inq_response[3] = resp_data_format; /*normaca=0 | hisup=0 */
719 inq_response[4] = ADDITIONAL_STD_INQ_LENGTH;
720 inq_response[5] = protect; /* sccs=0 | acc=0 | tpgs=0 | pc3=0 */
721 inq_response[7] = cmdque; /* wbus16=0 | sync=0 | vs=0 */
722 strncpy(&inq_response[8], "NVMe ", 8);
723 strncpy(&inq_response[16], dev->model, 16);
724 strncpy(&inq_response[32], dev->firmware_rev, 4);
725
726 xfer_len = min(alloc_len, STANDARD_INQUIRY_LENGTH);
727 res = nvme_trans_copy_to_user(hdr, inq_response, xfer_len);
728
729 out_free:
730 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns), mem,
731 dma_addr);
732 out_dma:
733 return res;
734 }
735
736 static int nvme_trans_supported_vpd_pages(struct nvme_ns *ns,
737 struct sg_io_hdr *hdr, u8 *inq_response,
738 int alloc_len)
739 {
740 int res = SNTI_TRANSLATION_SUCCESS;
741 int xfer_len;
742
743 memset(inq_response, 0, STANDARD_INQUIRY_LENGTH);
744 inq_response[1] = INQ_SUPPORTED_VPD_PAGES_PAGE; /* Page Code */
745 inq_response[3] = INQ_NUM_SUPPORTED_VPD_PAGES; /* Page Length */
746 inq_response[4] = INQ_SUPPORTED_VPD_PAGES_PAGE;
747 inq_response[5] = INQ_UNIT_SERIAL_NUMBER_PAGE;
748 inq_response[6] = INQ_DEVICE_IDENTIFICATION_PAGE;
749 inq_response[7] = INQ_EXTENDED_INQUIRY_DATA_PAGE;
750 inq_response[8] = INQ_BDEV_CHARACTERISTICS_PAGE;
751
752 xfer_len = min(alloc_len, STANDARD_INQUIRY_LENGTH);
753 res = nvme_trans_copy_to_user(hdr, inq_response, xfer_len);
754
755 return res;
756 }
757
758 static int nvme_trans_unit_serial_page(struct nvme_ns *ns,
759 struct sg_io_hdr *hdr, u8 *inq_response,
760 int alloc_len)
761 {
762 struct nvme_dev *dev = ns->dev;
763 int res = SNTI_TRANSLATION_SUCCESS;
764 int xfer_len;
765
766 memset(inq_response, 0, STANDARD_INQUIRY_LENGTH);
767 inq_response[1] = INQ_UNIT_SERIAL_NUMBER_PAGE; /* Page Code */
768 inq_response[3] = INQ_SERIAL_NUMBER_LENGTH; /* Page Length */
769 strncpy(&inq_response[4], dev->serial, INQ_SERIAL_NUMBER_LENGTH);
770
771 xfer_len = min(alloc_len, STANDARD_INQUIRY_LENGTH);
772 res = nvme_trans_copy_to_user(hdr, inq_response, xfer_len);
773
774 return res;
775 }
776
777 static int nvme_trans_device_id_page(struct nvme_ns *ns, struct sg_io_hdr *hdr,
778 u8 *inq_response, int alloc_len)
779 {
780 struct nvme_dev *dev = ns->dev;
781 dma_addr_t dma_addr;
782 void *mem;
783 struct nvme_id_ctrl *id_ctrl;
784 int res = SNTI_TRANSLATION_SUCCESS;
785 int nvme_sc;
786 u8 ieee[4];
787 int xfer_len;
788 __be32 tmp_id = cpu_to_be32(ns->ns_id);
789
790 mem = dma_alloc_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns),
791 &dma_addr, GFP_KERNEL);
792 if (mem == NULL) {
793 res = -ENOMEM;
794 goto out_dma;
795 }
796
797 /* nvme controller identify */
798 nvme_sc = nvme_identify(dev, 0, 1, dma_addr);
799 res = nvme_trans_status_code(hdr, nvme_sc);
800 if (res)
801 goto out_free;
802 if (nvme_sc) {
803 res = nvme_sc;
804 goto out_free;
805 }
806 id_ctrl = mem;
807
808 /* Since SCSI tried to save 4 bits... [SPC-4(r34) Table 591] */
809 ieee[0] = id_ctrl->ieee[0] << 4;
810 ieee[1] = id_ctrl->ieee[0] >> 4 | id_ctrl->ieee[1] << 4;
811 ieee[2] = id_ctrl->ieee[1] >> 4 | id_ctrl->ieee[2] << 4;
812 ieee[3] = id_ctrl->ieee[2] >> 4;
813
814 memset(inq_response, 0, STANDARD_INQUIRY_LENGTH);
815 inq_response[1] = INQ_DEVICE_IDENTIFICATION_PAGE; /* Page Code */
816 inq_response[3] = 20; /* Page Length */
817 /* Designation Descriptor start */
818 inq_response[4] = 0x01; /* Proto ID=0h | Code set=1h */
819 inq_response[5] = 0x03; /* PIV=0b | Asso=00b | Designator Type=3h */
820 inq_response[6] = 0x00; /* Rsvd */
821 inq_response[7] = 16; /* Designator Length */
822 /* Designator start */
823 inq_response[8] = 0x60 | ieee[3]; /* NAA=6h | IEEE ID MSB, High nibble*/
824 inq_response[9] = ieee[2]; /* IEEE ID */
825 inq_response[10] = ieee[1]; /* IEEE ID */
826 inq_response[11] = ieee[0]; /* IEEE ID| Vendor Specific ID... */
827 inq_response[12] = (dev->pci_dev->vendor & 0xFF00) >> 8;
828 inq_response[13] = (dev->pci_dev->vendor & 0x00FF);
829 inq_response[14] = dev->serial[0];
830 inq_response[15] = dev->serial[1];
831 inq_response[16] = dev->model[0];
832 inq_response[17] = dev->model[1];
833 memcpy(&inq_response[18], &tmp_id, sizeof(u32));
834 /* Last 2 bytes are zero */
835
836 xfer_len = min(alloc_len, STANDARD_INQUIRY_LENGTH);
837 res = nvme_trans_copy_to_user(hdr, inq_response, xfer_len);
838
839 out_free:
840 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns), mem,
841 dma_addr);
842 out_dma:
843 return res;
844 }
845
846 static int nvme_trans_ext_inq_page(struct nvme_ns *ns, struct sg_io_hdr *hdr,
847 int alloc_len)
848 {
849 u8 *inq_response;
850 int res = SNTI_TRANSLATION_SUCCESS;
851 int nvme_sc;
852 struct nvme_dev *dev = ns->dev;
853 dma_addr_t dma_addr;
854 void *mem;
855 struct nvme_id_ctrl *id_ctrl;
856 struct nvme_id_ns *id_ns;
857 int xfer_len;
858 u8 microcode = 0x80;
859 u8 spt;
860 u8 spt_lut[8] = {0, 0, 2, 1, 4, 6, 5, 7};
861 u8 grd_chk, app_chk, ref_chk, protect;
862 u8 uask_sup = 0x20;
863 u8 v_sup;
864 u8 luiclr = 0x01;
865
866 inq_response = kmalloc(EXTENDED_INQUIRY_DATA_PAGE_LENGTH, GFP_KERNEL);
867 if (inq_response == NULL) {
868 res = -ENOMEM;
869 goto out_mem;
870 }
871
872 mem = dma_alloc_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns),
873 &dma_addr, GFP_KERNEL);
874 if (mem == NULL) {
875 res = -ENOMEM;
876 goto out_dma;
877 }
878
879 /* nvme ns identify */
880 nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
881 res = nvme_trans_status_code(hdr, nvme_sc);
882 if (res)
883 goto out_free;
884 if (nvme_sc) {
885 res = nvme_sc;
886 goto out_free;
887 }
888 id_ns = mem;
889 spt = spt_lut[(id_ns->dpc) & 0x07] << 3;
890 (id_ns->dps) ? (protect = 0x01) : (protect = 0);
891 grd_chk = protect << 2;
892 app_chk = protect << 1;
893 ref_chk = protect;
894
895 /* nvme controller identify */
896 nvme_sc = nvme_identify(dev, 0, 1, dma_addr);
897 res = nvme_trans_status_code(hdr, nvme_sc);
898 if (res)
899 goto out_free;
900 if (nvme_sc) {
901 res = nvme_sc;
902 goto out_free;
903 }
904 id_ctrl = mem;
905 v_sup = id_ctrl->vwc;
906
907 memset(inq_response, 0, EXTENDED_INQUIRY_DATA_PAGE_LENGTH);
908 inq_response[1] = INQ_EXTENDED_INQUIRY_DATA_PAGE; /* Page Code */
909 inq_response[2] = 0x00; /* Page Length MSB */
910 inq_response[3] = 0x3C; /* Page Length LSB */
911 inq_response[4] = microcode | spt | grd_chk | app_chk | ref_chk;
912 inq_response[5] = uask_sup;
913 inq_response[6] = v_sup;
914 inq_response[7] = luiclr;
915 inq_response[8] = 0;
916 inq_response[9] = 0;
917
918 xfer_len = min(alloc_len, EXTENDED_INQUIRY_DATA_PAGE_LENGTH);
919 res = nvme_trans_copy_to_user(hdr, inq_response, xfer_len);
920
921 out_free:
922 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns), mem,
923 dma_addr);
924 out_dma:
925 kfree(inq_response);
926 out_mem:
927 return res;
928 }
929
930 static int nvme_trans_bdev_char_page(struct nvme_ns *ns, struct sg_io_hdr *hdr,
931 int alloc_len)
932 {
933 u8 *inq_response;
934 int res = SNTI_TRANSLATION_SUCCESS;
935 int xfer_len;
936
937 inq_response = kzalloc(EXTENDED_INQUIRY_DATA_PAGE_LENGTH, GFP_KERNEL);
938 if (inq_response == NULL) {
939 res = -ENOMEM;
940 goto out_mem;
941 }
942
943 inq_response[1] = INQ_BDEV_CHARACTERISTICS_PAGE; /* Page Code */
944 inq_response[2] = 0x00; /* Page Length MSB */
945 inq_response[3] = 0x3C; /* Page Length LSB */
946 inq_response[4] = 0x00; /* Medium Rotation Rate MSB */
947 inq_response[5] = 0x01; /* Medium Rotation Rate LSB */
948 inq_response[6] = 0x00; /* Form Factor */
949
950 xfer_len = min(alloc_len, EXTENDED_INQUIRY_DATA_PAGE_LENGTH);
951 res = nvme_trans_copy_to_user(hdr, inq_response, xfer_len);
952
953 kfree(inq_response);
954 out_mem:
955 return res;
956 }
957
958 /* LOG SENSE Helper Functions */
959
960 static int nvme_trans_log_supp_pages(struct nvme_ns *ns, struct sg_io_hdr *hdr,
961 int alloc_len)
962 {
963 int res = SNTI_TRANSLATION_SUCCESS;
964 int xfer_len;
965 u8 *log_response;
966
967 log_response = kzalloc(LOG_PAGE_SUPPORTED_LOG_PAGES_LENGTH, GFP_KERNEL);
968 if (log_response == NULL) {
969 res = -ENOMEM;
970 goto out_mem;
971 }
972
973 log_response[0] = LOG_PAGE_SUPPORTED_LOG_PAGES_PAGE;
974 /* Subpage=0x00, Page Length MSB=0 */
975 log_response[3] = SUPPORTED_LOG_PAGES_PAGE_LENGTH;
976 log_response[4] = LOG_PAGE_SUPPORTED_LOG_PAGES_PAGE;
977 log_response[5] = LOG_PAGE_INFORMATIONAL_EXCEPTIONS_PAGE;
978 log_response[6] = LOG_PAGE_TEMPERATURE_PAGE;
979
980 xfer_len = min(alloc_len, LOG_PAGE_SUPPORTED_LOG_PAGES_LENGTH);
981 res = nvme_trans_copy_to_user(hdr, log_response, xfer_len);
982
983 kfree(log_response);
984 out_mem:
985 return res;
986 }
987
988 static int nvme_trans_log_info_exceptions(struct nvme_ns *ns,
989 struct sg_io_hdr *hdr, int alloc_len)
990 {
991 int res = SNTI_TRANSLATION_SUCCESS;
992 int xfer_len;
993 u8 *log_response;
994 struct nvme_command c;
995 struct nvme_dev *dev = ns->dev;
996 struct nvme_smart_log *smart_log;
997 dma_addr_t dma_addr;
998 void *mem;
999 u8 temp_c;
1000 u16 temp_k;
1001
1002 log_response = kzalloc(LOG_INFO_EXCP_PAGE_LENGTH, GFP_KERNEL);
1003 if (log_response == NULL) {
1004 res = -ENOMEM;
1005 goto out_mem;
1006 }
1007
1008 mem = dma_alloc_coherent(&dev->pci_dev->dev,
1009 sizeof(struct nvme_smart_log),
1010 &dma_addr, GFP_KERNEL);
1011 if (mem == NULL) {
1012 res = -ENOMEM;
1013 goto out_dma;
1014 }
1015
1016 /* Get SMART Log Page */
1017 memset(&c, 0, sizeof(c));
1018 c.common.opcode = nvme_admin_get_log_page;
1019 c.common.nsid = cpu_to_le32(0xFFFFFFFF);
1020 c.common.prp1 = cpu_to_le64(dma_addr);
1021 c.common.cdw10[0] = cpu_to_le32(((sizeof(struct nvme_smart_log) /
1022 BYTES_TO_DWORDS) << 16) | NVME_GET_SMART_LOG_PAGE);
1023 res = nvme_submit_admin_cmd(dev, &c, NULL);
1024 if (res != NVME_SC_SUCCESS) {
1025 temp_c = LOG_TEMP_UNKNOWN;
1026 } else {
1027 smart_log = mem;
1028 temp_k = (smart_log->temperature[1] << 8) +
1029 (smart_log->temperature[0]);
1030 temp_c = temp_k - KELVIN_TEMP_FACTOR;
1031 }
1032
1033 log_response[0] = LOG_PAGE_INFORMATIONAL_EXCEPTIONS_PAGE;
1034 /* Subpage=0x00, Page Length MSB=0 */
1035 log_response[3] = REMAINING_INFO_EXCP_PAGE_LENGTH;
1036 /* Informational Exceptions Log Parameter 1 Start */
1037 /* Parameter Code=0x0000 bytes 4,5 */
1038 log_response[6] = 0x23; /* DU=0, TSD=1, ETC=0, TMC=0, FMT_AND_LNK=11b */
1039 log_response[7] = 0x04; /* PARAMETER LENGTH */
1040 /* Add sense Code and qualifier = 0x00 each */
1041 /* Use Temperature from NVMe Get Log Page, convert to C from K */
1042 log_response[10] = temp_c;
1043
1044 xfer_len = min(alloc_len, LOG_INFO_EXCP_PAGE_LENGTH);
1045 res = nvme_trans_copy_to_user(hdr, log_response, xfer_len);
1046
1047 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_smart_log),
1048 mem, dma_addr);
1049 out_dma:
1050 kfree(log_response);
1051 out_mem:
1052 return res;
1053 }
1054
1055 static int nvme_trans_log_temperature(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1056 int alloc_len)
1057 {
1058 int res = SNTI_TRANSLATION_SUCCESS;
1059 int xfer_len;
1060 u8 *log_response;
1061 struct nvme_command c;
1062 struct nvme_dev *dev = ns->dev;
1063 struct nvme_smart_log *smart_log;
1064 dma_addr_t dma_addr;
1065 void *mem;
1066 u32 feature_resp;
1067 u8 temp_c_cur, temp_c_thresh;
1068 u16 temp_k;
1069
1070 log_response = kzalloc(LOG_TEMP_PAGE_LENGTH, GFP_KERNEL);
1071 if (log_response == NULL) {
1072 res = -ENOMEM;
1073 goto out_mem;
1074 }
1075
1076 mem = dma_alloc_coherent(&dev->pci_dev->dev,
1077 sizeof(struct nvme_smart_log),
1078 &dma_addr, GFP_KERNEL);
1079 if (mem == NULL) {
1080 res = -ENOMEM;
1081 goto out_dma;
1082 }
1083
1084 /* Get SMART Log Page */
1085 memset(&c, 0, sizeof(c));
1086 c.common.opcode = nvme_admin_get_log_page;
1087 c.common.nsid = cpu_to_le32(0xFFFFFFFF);
1088 c.common.prp1 = cpu_to_le64(dma_addr);
1089 c.common.cdw10[0] = cpu_to_le32(((sizeof(struct nvme_smart_log) /
1090 BYTES_TO_DWORDS) << 16) | NVME_GET_SMART_LOG_PAGE);
1091 res = nvme_submit_admin_cmd(dev, &c, NULL);
1092 if (res != NVME_SC_SUCCESS) {
1093 temp_c_cur = LOG_TEMP_UNKNOWN;
1094 } else {
1095 smart_log = mem;
1096 temp_k = (smart_log->temperature[1] << 8) +
1097 (smart_log->temperature[0]);
1098 temp_c_cur = temp_k - KELVIN_TEMP_FACTOR;
1099 }
1100
1101 /* Get Features for Temp Threshold */
1102 res = nvme_get_features(dev, NVME_FEAT_TEMP_THRESH, 0, 0,
1103 &feature_resp);
1104 if (res != NVME_SC_SUCCESS)
1105 temp_c_thresh = LOG_TEMP_UNKNOWN;
1106 else
1107 temp_c_thresh = (feature_resp & 0xFFFF) - KELVIN_TEMP_FACTOR;
1108
1109 log_response[0] = LOG_PAGE_TEMPERATURE_PAGE;
1110 /* Subpage=0x00, Page Length MSB=0 */
1111 log_response[3] = REMAINING_TEMP_PAGE_LENGTH;
1112 /* Temperature Log Parameter 1 (Temperature) Start */
1113 /* Parameter Code = 0x0000 */
1114 log_response[6] = 0x01; /* Format and Linking = 01b */
1115 log_response[7] = 0x02; /* Parameter Length */
1116 /* Use Temperature from NVMe Get Log Page, convert to C from K */
1117 log_response[9] = temp_c_cur;
1118 /* Temperature Log Parameter 2 (Reference Temperature) Start */
1119 log_response[11] = 0x01; /* Parameter Code = 0x0001 */
1120 log_response[12] = 0x01; /* Format and Linking = 01b */
1121 log_response[13] = 0x02; /* Parameter Length */
1122 /* Use Temperature Thresh from NVMe Get Log Page, convert to C from K */
1123 log_response[15] = temp_c_thresh;
1124
1125 xfer_len = min(alloc_len, LOG_TEMP_PAGE_LENGTH);
1126 res = nvme_trans_copy_to_user(hdr, log_response, xfer_len);
1127
1128 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_smart_log),
1129 mem, dma_addr);
1130 out_dma:
1131 kfree(log_response);
1132 out_mem:
1133 return res;
1134 }
1135
1136 /* MODE SENSE Helper Functions */
1137
1138 static int nvme_trans_fill_mode_parm_hdr(u8 *resp, int len, u8 cdb10, u8 llbaa,
1139 u16 mode_data_length, u16 blk_desc_len)
1140 {
1141 /* Quick check to make sure I don't stomp on my own memory... */
1142 if ((cdb10 && len < 8) || (!cdb10 && len < 4))
1143 return SNTI_INTERNAL_ERROR;
1144
1145 if (cdb10) {
1146 resp[0] = (mode_data_length & 0xFF00) >> 8;
1147 resp[1] = (mode_data_length & 0x00FF);
1148 /* resp[2] and [3] are zero */
1149 resp[4] = llbaa;
1150 resp[5] = RESERVED_FIELD;
1151 resp[6] = (blk_desc_len & 0xFF00) >> 8;
1152 resp[7] = (blk_desc_len & 0x00FF);
1153 } else {
1154 resp[0] = (mode_data_length & 0x00FF);
1155 /* resp[1] and [2] are zero */
1156 resp[3] = (blk_desc_len & 0x00FF);
1157 }
1158
1159 return SNTI_TRANSLATION_SUCCESS;
1160 }
1161
1162 static int nvme_trans_fill_blk_desc(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1163 u8 *resp, int len, u8 llbaa)
1164 {
1165 int res = SNTI_TRANSLATION_SUCCESS;
1166 int nvme_sc;
1167 struct nvme_dev *dev = ns->dev;
1168 dma_addr_t dma_addr;
1169 void *mem;
1170 struct nvme_id_ns *id_ns;
1171 u8 flbas;
1172 u32 lba_length;
1173
1174 if (llbaa == 0 && len < MODE_PAGE_BLK_DES_LEN)
1175 return SNTI_INTERNAL_ERROR;
1176 else if (llbaa > 0 && len < MODE_PAGE_LLBAA_BLK_DES_LEN)
1177 return SNTI_INTERNAL_ERROR;
1178
1179 mem = dma_alloc_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns),
1180 &dma_addr, GFP_KERNEL);
1181 if (mem == NULL) {
1182 res = -ENOMEM;
1183 goto out;
1184 }
1185
1186 /* nvme ns identify */
1187 nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
1188 res = nvme_trans_status_code(hdr, nvme_sc);
1189 if (res)
1190 goto out_dma;
1191 if (nvme_sc) {
1192 res = nvme_sc;
1193 goto out_dma;
1194 }
1195 id_ns = mem;
1196 flbas = (id_ns->flbas) & 0x0F;
1197 lba_length = (1 << (id_ns->lbaf[flbas].ds));
1198
1199 if (llbaa == 0) {
1200 __be32 tmp_cap = cpu_to_be32(le64_to_cpu(id_ns->ncap));
1201 /* Byte 4 is reserved */
1202 __be32 tmp_len = cpu_to_be32(lba_length & 0x00FFFFFF);
1203
1204 memcpy(resp, &tmp_cap, sizeof(u32));
1205 memcpy(&resp[4], &tmp_len, sizeof(u32));
1206 } else {
1207 __be64 tmp_cap = cpu_to_be64(le64_to_cpu(id_ns->ncap));
1208 __be32 tmp_len = cpu_to_be32(lba_length);
1209
1210 memcpy(resp, &tmp_cap, sizeof(u64));
1211 /* Bytes 8, 9, 10, 11 are reserved */
1212 memcpy(&resp[12], &tmp_len, sizeof(u32));
1213 }
1214
1215 out_dma:
1216 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns), mem,
1217 dma_addr);
1218 out:
1219 return res;
1220 }
1221
1222 static int nvme_trans_fill_control_page(struct nvme_ns *ns,
1223 struct sg_io_hdr *hdr, u8 *resp,
1224 int len)
1225 {
1226 if (len < MODE_PAGE_CONTROL_LEN)
1227 return SNTI_INTERNAL_ERROR;
1228
1229 resp[0] = MODE_PAGE_CONTROL;
1230 resp[1] = MODE_PAGE_CONTROL_LEN_FIELD;
1231 resp[2] = 0x0E; /* TST=000b, TMF_ONLY=0, DPICZ=1,
1232 * D_SENSE=1, GLTSD=1, RLEC=0 */
1233 resp[3] = 0x12; /* Q_ALGO_MODIFIER=1h, NUAR=0, QERR=01b */
1234 /* Byte 4: VS=0, RAC=0, UA_INT=0, SWP=0 */
1235 resp[5] = 0x40; /* ATO=0, TAS=1, ATMPE=0, RWWP=0, AUTOLOAD=0 */
1236 /* resp[6] and [7] are obsolete, thus zero */
1237 resp[8] = 0xFF; /* Busy timeout period = 0xffff */
1238 resp[9] = 0xFF;
1239 /* Bytes 10,11: Extended selftest completion time = 0x0000 */
1240
1241 return SNTI_TRANSLATION_SUCCESS;
1242 }
1243
1244 static int nvme_trans_fill_caching_page(struct nvme_ns *ns,
1245 struct sg_io_hdr *hdr,
1246 u8 *resp, int len)
1247 {
1248 int res = SNTI_TRANSLATION_SUCCESS;
1249 int nvme_sc;
1250 struct nvme_dev *dev = ns->dev;
1251 u32 feature_resp;
1252 u8 vwc;
1253
1254 if (len < MODE_PAGE_CACHING_LEN)
1255 return SNTI_INTERNAL_ERROR;
1256
1257 nvme_sc = nvme_get_features(dev, NVME_FEAT_VOLATILE_WC, 0, 0,
1258 &feature_resp);
1259 res = nvme_trans_status_code(hdr, nvme_sc);
1260 if (res)
1261 goto out;
1262 if (nvme_sc) {
1263 res = nvme_sc;
1264 goto out;
1265 }
1266 vwc = feature_resp & 0x00000001;
1267
1268 resp[0] = MODE_PAGE_CACHING;
1269 resp[1] = MODE_PAGE_CACHING_LEN_FIELD;
1270 resp[2] = vwc << 2;
1271
1272 out:
1273 return res;
1274 }
1275
1276 static int nvme_trans_fill_pow_cnd_page(struct nvme_ns *ns,
1277 struct sg_io_hdr *hdr, u8 *resp,
1278 int len)
1279 {
1280 int res = SNTI_TRANSLATION_SUCCESS;
1281
1282 if (len < MODE_PAGE_POW_CND_LEN)
1283 return SNTI_INTERNAL_ERROR;
1284
1285 resp[0] = MODE_PAGE_POWER_CONDITION;
1286 resp[1] = MODE_PAGE_POW_CND_LEN_FIELD;
1287 /* All other bytes are zero */
1288
1289 return res;
1290 }
1291
1292 static int nvme_trans_fill_inf_exc_page(struct nvme_ns *ns,
1293 struct sg_io_hdr *hdr, u8 *resp,
1294 int len)
1295 {
1296 int res = SNTI_TRANSLATION_SUCCESS;
1297
1298 if (len < MODE_PAGE_INF_EXC_LEN)
1299 return SNTI_INTERNAL_ERROR;
1300
1301 resp[0] = MODE_PAGE_INFO_EXCEP;
1302 resp[1] = MODE_PAGE_INF_EXC_LEN_FIELD;
1303 resp[2] = 0x88;
1304 /* All other bytes are zero */
1305
1306 return res;
1307 }
1308
1309 static int nvme_trans_fill_all_pages(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1310 u8 *resp, int len)
1311 {
1312 int res = SNTI_TRANSLATION_SUCCESS;
1313 u16 mode_pages_offset_1 = 0;
1314 u16 mode_pages_offset_2, mode_pages_offset_3, mode_pages_offset_4;
1315
1316 mode_pages_offset_2 = mode_pages_offset_1 + MODE_PAGE_CACHING_LEN;
1317 mode_pages_offset_3 = mode_pages_offset_2 + MODE_PAGE_CONTROL_LEN;
1318 mode_pages_offset_4 = mode_pages_offset_3 + MODE_PAGE_POW_CND_LEN;
1319
1320 res = nvme_trans_fill_caching_page(ns, hdr, &resp[mode_pages_offset_1],
1321 MODE_PAGE_CACHING_LEN);
1322 if (res != SNTI_TRANSLATION_SUCCESS)
1323 goto out;
1324 res = nvme_trans_fill_control_page(ns, hdr, &resp[mode_pages_offset_2],
1325 MODE_PAGE_CONTROL_LEN);
1326 if (res != SNTI_TRANSLATION_SUCCESS)
1327 goto out;
1328 res = nvme_trans_fill_pow_cnd_page(ns, hdr, &resp[mode_pages_offset_3],
1329 MODE_PAGE_POW_CND_LEN);
1330 if (res != SNTI_TRANSLATION_SUCCESS)
1331 goto out;
1332 res = nvme_trans_fill_inf_exc_page(ns, hdr, &resp[mode_pages_offset_4],
1333 MODE_PAGE_INF_EXC_LEN);
1334 if (res != SNTI_TRANSLATION_SUCCESS)
1335 goto out;
1336
1337 out:
1338 return res;
1339 }
1340
1341 static inline int nvme_trans_get_blk_desc_len(u8 dbd, u8 llbaa)
1342 {
1343 if (dbd == MODE_SENSE_BLK_DESC_ENABLED) {
1344 /* SPC-4: len = 8 x Num_of_descriptors if llbaa = 0, 16x if 1 */
1345 return 8 * (llbaa + 1) * MODE_SENSE_BLK_DESC_COUNT;
1346 } else {
1347 return 0;
1348 }
1349 }
1350
1351 static int nvme_trans_mode_page_create(struct nvme_ns *ns,
1352 struct sg_io_hdr *hdr, u8 *cmd,
1353 u16 alloc_len, u8 cdb10,
1354 int (*mode_page_fill_func)
1355 (struct nvme_ns *,
1356 struct sg_io_hdr *hdr, u8 *, int),
1357 u16 mode_pages_tot_len)
1358 {
1359 int res = SNTI_TRANSLATION_SUCCESS;
1360 int xfer_len;
1361 u8 *response;
1362 u8 dbd, llbaa;
1363 u16 resp_size;
1364 int mph_size;
1365 u16 mode_pages_offset_1;
1366 u16 blk_desc_len, blk_desc_offset, mode_data_length;
1367
1368 dbd = GET_MODE_SENSE_DBD(cmd);
1369 llbaa = GET_MODE_SENSE_LLBAA(cmd);
1370 mph_size = GET_MODE_SENSE_MPH_SIZE(cdb10);
1371 blk_desc_len = nvme_trans_get_blk_desc_len(dbd, llbaa);
1372
1373 resp_size = mph_size + blk_desc_len + mode_pages_tot_len;
1374 /* Refer spc4r34 Table 440 for calculation of Mode data Length field */
1375 mode_data_length = 3 + (3 * cdb10) + blk_desc_len + mode_pages_tot_len;
1376
1377 blk_desc_offset = mph_size;
1378 mode_pages_offset_1 = blk_desc_offset + blk_desc_len;
1379
1380 response = kzalloc(resp_size, GFP_KERNEL);
1381 if (response == NULL) {
1382 res = -ENOMEM;
1383 goto out_mem;
1384 }
1385
1386 res = nvme_trans_fill_mode_parm_hdr(&response[0], mph_size, cdb10,
1387 llbaa, mode_data_length, blk_desc_len);
1388 if (res != SNTI_TRANSLATION_SUCCESS)
1389 goto out_free;
1390 if (blk_desc_len > 0) {
1391 res = nvme_trans_fill_blk_desc(ns, hdr,
1392 &response[blk_desc_offset],
1393 blk_desc_len, llbaa);
1394 if (res != SNTI_TRANSLATION_SUCCESS)
1395 goto out_free;
1396 }
1397 res = mode_page_fill_func(ns, hdr, &response[mode_pages_offset_1],
1398 mode_pages_tot_len);
1399 if (res != SNTI_TRANSLATION_SUCCESS)
1400 goto out_free;
1401
1402 xfer_len = min(alloc_len, resp_size);
1403 res = nvme_trans_copy_to_user(hdr, response, xfer_len);
1404
1405 out_free:
1406 kfree(response);
1407 out_mem:
1408 return res;
1409 }
1410
1411 /* Read Capacity Helper Functions */
1412
1413 static void nvme_trans_fill_read_cap(u8 *response, struct nvme_id_ns *id_ns,
1414 u8 cdb16)
1415 {
1416 u8 flbas;
1417 u32 lba_length;
1418 u64 rlba;
1419 u8 prot_en;
1420 u8 p_type_lut[4] = {0, 0, 1, 2};
1421 __be64 tmp_rlba;
1422 __be32 tmp_rlba_32;
1423 __be32 tmp_len;
1424
1425 flbas = (id_ns->flbas) & 0x0F;
1426 lba_length = (1 << (id_ns->lbaf[flbas].ds));
1427 rlba = le64_to_cpup(&id_ns->nsze) - 1;
1428 (id_ns->dps) ? (prot_en = 0x01) : (prot_en = 0);
1429
1430 if (!cdb16) {
1431 if (rlba > 0xFFFFFFFF)
1432 rlba = 0xFFFFFFFF;
1433 tmp_rlba_32 = cpu_to_be32(rlba);
1434 tmp_len = cpu_to_be32(lba_length);
1435 memcpy(response, &tmp_rlba_32, sizeof(u32));
1436 memcpy(&response[4], &tmp_len, sizeof(u32));
1437 } else {
1438 tmp_rlba = cpu_to_be64(rlba);
1439 tmp_len = cpu_to_be32(lba_length);
1440 memcpy(response, &tmp_rlba, sizeof(u64));
1441 memcpy(&response[8], &tmp_len, sizeof(u32));
1442 response[12] = (p_type_lut[id_ns->dps & 0x3] << 1) | prot_en;
1443 /* P_I_Exponent = 0x0 | LBPPBE = 0x0 */
1444 /* LBPME = 0 | LBPRZ = 0 | LALBA = 0x00 */
1445 /* Bytes 16-31 - Reserved */
1446 }
1447 }
1448
1449 /* Start Stop Unit Helper Functions */
1450
1451 static int nvme_trans_power_state(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1452 u8 pc, u8 pcmod, u8 start)
1453 {
1454 int res = SNTI_TRANSLATION_SUCCESS;
1455 int nvme_sc;
1456 struct nvme_dev *dev = ns->dev;
1457 dma_addr_t dma_addr;
1458 void *mem;
1459 struct nvme_id_ctrl *id_ctrl;
1460 int lowest_pow_st; /* max npss = lowest power consumption */
1461 unsigned ps_desired = 0;
1462
1463 /* NVMe Controller Identify */
1464 mem = dma_alloc_coherent(&dev->pci_dev->dev,
1465 sizeof(struct nvme_id_ctrl),
1466 &dma_addr, GFP_KERNEL);
1467 if (mem == NULL) {
1468 res = -ENOMEM;
1469 goto out;
1470 }
1471 nvme_sc = nvme_identify(dev, 0, 1, dma_addr);
1472 res = nvme_trans_status_code(hdr, nvme_sc);
1473 if (res)
1474 goto out_dma;
1475 if (nvme_sc) {
1476 res = nvme_sc;
1477 goto out_dma;
1478 }
1479 id_ctrl = mem;
1480 lowest_pow_st = id_ctrl->npss - 1;
1481
1482 switch (pc) {
1483 case NVME_POWER_STATE_START_VALID:
1484 /* Action unspecified if POWER CONDITION MODIFIER != 0 */
1485 if (pcmod == 0 && start == 0x1)
1486 ps_desired = POWER_STATE_0;
1487 if (pcmod == 0 && start == 0x0)
1488 ps_desired = lowest_pow_st;
1489 break;
1490 case NVME_POWER_STATE_ACTIVE:
1491 /* Action unspecified if POWER CONDITION MODIFIER != 0 */
1492 if (pcmod == 0)
1493 ps_desired = POWER_STATE_0;
1494 break;
1495 case NVME_POWER_STATE_IDLE:
1496 /* Action unspecified if POWER CONDITION MODIFIER != [0,1,2] */
1497 /* min of desired state and (lps-1) because lps is STOP */
1498 if (pcmod == 0x0)
1499 ps_desired = min(POWER_STATE_1, (lowest_pow_st - 1));
1500 else if (pcmod == 0x1)
1501 ps_desired = min(POWER_STATE_2, (lowest_pow_st - 1));
1502 else if (pcmod == 0x2)
1503 ps_desired = min(POWER_STATE_3, (lowest_pow_st - 1));
1504 break;
1505 case NVME_POWER_STATE_STANDBY:
1506 /* Action unspecified if POWER CONDITION MODIFIER != [0,1] */
1507 if (pcmod == 0x0)
1508 ps_desired = max(0, (lowest_pow_st - 2));
1509 else if (pcmod == 0x1)
1510 ps_desired = max(0, (lowest_pow_st - 1));
1511 break;
1512 case NVME_POWER_STATE_LU_CONTROL:
1513 default:
1514 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1515 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
1516 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1517 break;
1518 }
1519 nvme_sc = nvme_set_features(dev, NVME_FEAT_POWER_MGMT, ps_desired, 0,
1520 NULL);
1521 res = nvme_trans_status_code(hdr, nvme_sc);
1522 if (res)
1523 goto out_dma;
1524 if (nvme_sc)
1525 res = nvme_sc;
1526 out_dma:
1527 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ctrl), mem,
1528 dma_addr);
1529 out:
1530 return res;
1531 }
1532
1533 /* Write Buffer Helper Functions */
1534 /* Also using this for Format Unit with hdr passed as NULL, and buffer_id, 0 */
1535
1536 static int nvme_trans_send_fw_cmd(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1537 u8 opcode, u32 tot_len, u32 offset,
1538 u8 buffer_id)
1539 {
1540 int res = SNTI_TRANSLATION_SUCCESS;
1541 int nvme_sc;
1542 struct nvme_dev *dev = ns->dev;
1543 struct nvme_command c;
1544 struct nvme_iod *iod = NULL;
1545 unsigned length;
1546
1547 memset(&c, 0, sizeof(c));
1548 c.common.opcode = opcode;
1549 if (opcode == nvme_admin_download_fw) {
1550 if (hdr->iovec_count > 0) {
1551 /* Assuming SGL is not allowed for this command */
1552 res = nvme_trans_completion(hdr,
1553 SAM_STAT_CHECK_CONDITION,
1554 ILLEGAL_REQUEST,
1555 SCSI_ASC_INVALID_CDB,
1556 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1557 goto out;
1558 }
1559 iod = nvme_map_user_pages(dev, DMA_TO_DEVICE,
1560 (unsigned long)hdr->dxferp, tot_len);
1561 if (IS_ERR(iod)) {
1562 res = PTR_ERR(iod);
1563 goto out;
1564 }
1565 length = nvme_setup_prps(dev, &c.common, iod, tot_len,
1566 GFP_KERNEL);
1567 if (length != tot_len) {
1568 res = -ENOMEM;
1569 goto out_unmap;
1570 }
1571
1572 c.dlfw.numd = cpu_to_le32((tot_len/BYTES_TO_DWORDS) - 1);
1573 c.dlfw.offset = cpu_to_le32(offset/BYTES_TO_DWORDS);
1574 } else if (opcode == nvme_admin_activate_fw) {
1575 u32 cdw10 = buffer_id | NVME_FWACT_REPL_ACTV;
1576 c.common.cdw10[0] = cpu_to_le32(cdw10);
1577 }
1578
1579 nvme_sc = nvme_submit_admin_cmd(dev, &c, NULL);
1580 res = nvme_trans_status_code(hdr, nvme_sc);
1581 if (res)
1582 goto out_unmap;
1583 if (nvme_sc)
1584 res = nvme_sc;
1585
1586 out_unmap:
1587 if (opcode == nvme_admin_download_fw) {
1588 nvme_unmap_user_pages(dev, DMA_TO_DEVICE, iod);
1589 nvme_free_iod(dev, iod);
1590 }
1591 out:
1592 return res;
1593 }
1594
1595 /* Mode Select Helper Functions */
1596
1597 static inline void nvme_trans_modesel_get_bd_len(u8 *parm_list, u8 cdb10,
1598 u16 *bd_len, u8 *llbaa)
1599 {
1600 if (cdb10) {
1601 /* 10 Byte CDB */
1602 *bd_len = (parm_list[MODE_SELECT_10_BD_OFFSET] << 8) +
1603 parm_list[MODE_SELECT_10_BD_OFFSET + 1];
1604 *llbaa = parm_list[MODE_SELECT_10_LLBAA_OFFSET] &&
1605 MODE_SELECT_10_LLBAA_MASK;
1606 } else {
1607 /* 6 Byte CDB */
1608 *bd_len = parm_list[MODE_SELECT_6_BD_OFFSET];
1609 }
1610 }
1611
1612 static void nvme_trans_modesel_save_bd(struct nvme_ns *ns, u8 *parm_list,
1613 u16 idx, u16 bd_len, u8 llbaa)
1614 {
1615 u16 bd_num;
1616
1617 bd_num = bd_len / ((llbaa == 0) ?
1618 SHORT_DESC_BLOCK : LONG_DESC_BLOCK);
1619 /* Store block descriptor info if a FORMAT UNIT comes later */
1620 /* TODO Saving 1st BD info; what to do if multiple BD received? */
1621 if (llbaa == 0) {
1622 /* Standard Block Descriptor - spc4r34 7.5.5.1 */
1623 ns->mode_select_num_blocks =
1624 (parm_list[idx + 1] << 16) +
1625 (parm_list[idx + 2] << 8) +
1626 (parm_list[idx + 3]);
1627
1628 ns->mode_select_block_len =
1629 (parm_list[idx + 5] << 16) +
1630 (parm_list[idx + 6] << 8) +
1631 (parm_list[idx + 7]);
1632 } else {
1633 /* Long LBA Block Descriptor - sbc3r27 6.4.2.3 */
1634 ns->mode_select_num_blocks =
1635 (((u64)parm_list[idx + 0]) << 56) +
1636 (((u64)parm_list[idx + 1]) << 48) +
1637 (((u64)parm_list[idx + 2]) << 40) +
1638 (((u64)parm_list[idx + 3]) << 32) +
1639 (((u64)parm_list[idx + 4]) << 24) +
1640 (((u64)parm_list[idx + 5]) << 16) +
1641 (((u64)parm_list[idx + 6]) << 8) +
1642 ((u64)parm_list[idx + 7]);
1643
1644 ns->mode_select_block_len =
1645 (parm_list[idx + 12] << 24) +
1646 (parm_list[idx + 13] << 16) +
1647 (parm_list[idx + 14] << 8) +
1648 (parm_list[idx + 15]);
1649 }
1650 }
1651
1652 static int nvme_trans_modesel_get_mp(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1653 u8 *mode_page, u8 page_code)
1654 {
1655 int res = SNTI_TRANSLATION_SUCCESS;
1656 int nvme_sc;
1657 struct nvme_dev *dev = ns->dev;
1658 unsigned dword11;
1659
1660 switch (page_code) {
1661 case MODE_PAGE_CACHING:
1662 dword11 = ((mode_page[2] & CACHING_MODE_PAGE_WCE_MASK) ? 1 : 0);
1663 nvme_sc = nvme_set_features(dev, NVME_FEAT_VOLATILE_WC, dword11,
1664 0, NULL);
1665 res = nvme_trans_status_code(hdr, nvme_sc);
1666 if (res)
1667 break;
1668 if (nvme_sc) {
1669 res = nvme_sc;
1670 break;
1671 }
1672 break;
1673 case MODE_PAGE_CONTROL:
1674 break;
1675 case MODE_PAGE_POWER_CONDITION:
1676 /* Verify the OS is not trying to set timers */
1677 if ((mode_page[2] & 0x01) != 0 || (mode_page[3] & 0x0F) != 0) {
1678 res = nvme_trans_completion(hdr,
1679 SAM_STAT_CHECK_CONDITION,
1680 ILLEGAL_REQUEST,
1681 SCSI_ASC_INVALID_PARAMETER,
1682 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1683 if (!res)
1684 res = SNTI_INTERNAL_ERROR;
1685 break;
1686 }
1687 break;
1688 default:
1689 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1690 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
1691 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1692 if (!res)
1693 res = SNTI_INTERNAL_ERROR;
1694 break;
1695 }
1696
1697 return res;
1698 }
1699
1700 static int nvme_trans_modesel_data(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1701 u8 *cmd, u16 parm_list_len, u8 pf,
1702 u8 sp, u8 cdb10)
1703 {
1704 int res = SNTI_TRANSLATION_SUCCESS;
1705 u8 *parm_list;
1706 u16 bd_len;
1707 u8 llbaa = 0;
1708 u16 index, saved_index;
1709 u8 page_code;
1710 u16 mp_size;
1711
1712 /* Get parm list from data-in/out buffer */
1713 parm_list = kmalloc(parm_list_len, GFP_KERNEL);
1714 if (parm_list == NULL) {
1715 res = -ENOMEM;
1716 goto out;
1717 }
1718
1719 res = nvme_trans_copy_from_user(hdr, parm_list, parm_list_len);
1720 if (res != SNTI_TRANSLATION_SUCCESS)
1721 goto out_mem;
1722
1723 nvme_trans_modesel_get_bd_len(parm_list, cdb10, &bd_len, &llbaa);
1724 index = (cdb10) ? (MODE_SELECT_10_MPH_SIZE) : (MODE_SELECT_6_MPH_SIZE);
1725
1726 if (bd_len != 0) {
1727 /* Block Descriptors present, parse */
1728 nvme_trans_modesel_save_bd(ns, parm_list, index, bd_len, llbaa);
1729 index += bd_len;
1730 }
1731 saved_index = index;
1732
1733 /* Multiple mode pages may be present; iterate through all */
1734 /* In 1st Iteration, don't do NVME Command, only check for CDB errors */
1735 do {
1736 page_code = parm_list[index] & MODE_SELECT_PAGE_CODE_MASK;
1737 mp_size = parm_list[index + 1] + 2;
1738 if ((page_code != MODE_PAGE_CACHING) &&
1739 (page_code != MODE_PAGE_CONTROL) &&
1740 (page_code != MODE_PAGE_POWER_CONDITION)) {
1741 res = nvme_trans_completion(hdr,
1742 SAM_STAT_CHECK_CONDITION,
1743 ILLEGAL_REQUEST,
1744 SCSI_ASC_INVALID_CDB,
1745 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1746 goto out_mem;
1747 }
1748 index += mp_size;
1749 } while (index < parm_list_len);
1750
1751 /* In 2nd Iteration, do the NVME Commands */
1752 index = saved_index;
1753 do {
1754 page_code = parm_list[index] & MODE_SELECT_PAGE_CODE_MASK;
1755 mp_size = parm_list[index + 1] + 2;
1756 res = nvme_trans_modesel_get_mp(ns, hdr, &parm_list[index],
1757 page_code);
1758 if (res != SNTI_TRANSLATION_SUCCESS)
1759 break;
1760 index += mp_size;
1761 } while (index < parm_list_len);
1762
1763 out_mem:
1764 kfree(parm_list);
1765 out:
1766 return res;
1767 }
1768
1769 /* Format Unit Helper Functions */
1770
1771 static int nvme_trans_fmt_set_blk_size_count(struct nvme_ns *ns,
1772 struct sg_io_hdr *hdr)
1773 {
1774 int res = SNTI_TRANSLATION_SUCCESS;
1775 int nvme_sc;
1776 struct nvme_dev *dev = ns->dev;
1777 dma_addr_t dma_addr;
1778 void *mem;
1779 struct nvme_id_ns *id_ns;
1780 u8 flbas;
1781
1782 /*
1783 * SCSI Expects a MODE SELECT would have been issued prior to
1784 * a FORMAT UNIT, and the block size and number would be used
1785 * from the block descriptor in it. If a MODE SELECT had not
1786 * been issued, FORMAT shall use the current values for both.
1787 */
1788
1789 if (ns->mode_select_num_blocks == 0 || ns->mode_select_block_len == 0) {
1790 mem = dma_alloc_coherent(&dev->pci_dev->dev,
1791 sizeof(struct nvme_id_ns), &dma_addr, GFP_KERNEL);
1792 if (mem == NULL) {
1793 res = -ENOMEM;
1794 goto out;
1795 }
1796 /* nvme ns identify */
1797 nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
1798 res = nvme_trans_status_code(hdr, nvme_sc);
1799 if (res)
1800 goto out_dma;
1801 if (nvme_sc) {
1802 res = nvme_sc;
1803 goto out_dma;
1804 }
1805 id_ns = mem;
1806
1807 if (ns->mode_select_num_blocks == 0)
1808 ns->mode_select_num_blocks = le64_to_cpu(id_ns->ncap);
1809 if (ns->mode_select_block_len == 0) {
1810 flbas = (id_ns->flbas) & 0x0F;
1811 ns->mode_select_block_len =
1812 (1 << (id_ns->lbaf[flbas].ds));
1813 }
1814 out_dma:
1815 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns),
1816 mem, dma_addr);
1817 }
1818 out:
1819 return res;
1820 }
1821
1822 static int nvme_trans_fmt_get_parm_header(struct sg_io_hdr *hdr, u8 len,
1823 u8 format_prot_info, u8 *nvme_pf_code)
1824 {
1825 int res = SNTI_TRANSLATION_SUCCESS;
1826 u8 *parm_list;
1827 u8 pf_usage, pf_code;
1828
1829 parm_list = kmalloc(len, GFP_KERNEL);
1830 if (parm_list == NULL) {
1831 res = -ENOMEM;
1832 goto out;
1833 }
1834 res = nvme_trans_copy_from_user(hdr, parm_list, len);
1835 if (res != SNTI_TRANSLATION_SUCCESS)
1836 goto out_mem;
1837
1838 if ((parm_list[FORMAT_UNIT_IMMED_OFFSET] &
1839 FORMAT_UNIT_IMMED_MASK) != 0) {
1840 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1841 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
1842 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1843 goto out_mem;
1844 }
1845
1846 if (len == FORMAT_UNIT_LONG_PARM_LIST_LEN &&
1847 (parm_list[FORMAT_UNIT_PROT_INT_OFFSET] & 0x0F) != 0) {
1848 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1849 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
1850 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1851 goto out_mem;
1852 }
1853 pf_usage = parm_list[FORMAT_UNIT_PROT_FIELD_USAGE_OFFSET] &
1854 FORMAT_UNIT_PROT_FIELD_USAGE_MASK;
1855 pf_code = (pf_usage << 2) | format_prot_info;
1856 switch (pf_code) {
1857 case 0:
1858 *nvme_pf_code = 0;
1859 break;
1860 case 2:
1861 *nvme_pf_code = 1;
1862 break;
1863 case 3:
1864 *nvme_pf_code = 2;
1865 break;
1866 case 7:
1867 *nvme_pf_code = 3;
1868 break;
1869 default:
1870 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1871 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
1872 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1873 break;
1874 }
1875
1876 out_mem:
1877 kfree(parm_list);
1878 out:
1879 return res;
1880 }
1881
1882 static int nvme_trans_fmt_send_cmd(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1883 u8 prot_info)
1884 {
1885 int res = SNTI_TRANSLATION_SUCCESS;
1886 int nvme_sc;
1887 struct nvme_dev *dev = ns->dev;
1888 dma_addr_t dma_addr;
1889 void *mem;
1890 struct nvme_id_ns *id_ns;
1891 u8 i;
1892 u8 flbas, nlbaf;
1893 u8 selected_lbaf = 0xFF;
1894 u32 cdw10 = 0;
1895 struct nvme_command c;
1896
1897 /* Loop thru LBAF's in id_ns to match reqd lbaf, put in cdw10 */
1898 mem = dma_alloc_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns),
1899 &dma_addr, GFP_KERNEL);
1900 if (mem == NULL) {
1901 res = -ENOMEM;
1902 goto out;
1903 }
1904 /* nvme ns identify */
1905 nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
1906 res = nvme_trans_status_code(hdr, nvme_sc);
1907 if (res)
1908 goto out_dma;
1909 if (nvme_sc) {
1910 res = nvme_sc;
1911 goto out_dma;
1912 }
1913 id_ns = mem;
1914 flbas = (id_ns->flbas) & 0x0F;
1915 nlbaf = id_ns->nlbaf;
1916
1917 for (i = 0; i < nlbaf; i++) {
1918 if (ns->mode_select_block_len == (1 << (id_ns->lbaf[i].ds))) {
1919 selected_lbaf = i;
1920 break;
1921 }
1922 }
1923 if (selected_lbaf > 0x0F) {
1924 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1925 ILLEGAL_REQUEST, SCSI_ASC_INVALID_PARAMETER,
1926 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1927 }
1928 if (ns->mode_select_num_blocks != le64_to_cpu(id_ns->ncap)) {
1929 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1930 ILLEGAL_REQUEST, SCSI_ASC_INVALID_PARAMETER,
1931 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1932 }
1933
1934 cdw10 |= prot_info << 5;
1935 cdw10 |= selected_lbaf & 0x0F;
1936 memset(&c, 0, sizeof(c));
1937 c.format.opcode = nvme_admin_format_nvm;
1938 c.format.nsid = cpu_to_le32(ns->ns_id);
1939 c.format.cdw10 = cpu_to_le32(cdw10);
1940
1941 nvme_sc = nvme_submit_admin_cmd(dev, &c, NULL);
1942 res = nvme_trans_status_code(hdr, nvme_sc);
1943 if (res)
1944 goto out_dma;
1945 if (nvme_sc)
1946 res = nvme_sc;
1947
1948 out_dma:
1949 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns), mem,
1950 dma_addr);
1951 out:
1952 return res;
1953 }
1954
1955 /* Read/Write Helper Functions */
1956
1957 static inline void nvme_trans_get_io_cdb6(u8 *cmd,
1958 struct nvme_trans_io_cdb *cdb_info)
1959 {
1960 cdb_info->fua = 0;
1961 cdb_info->prot_info = 0;
1962 cdb_info->lba = GET_U32_FROM_CDB(cmd, IO_6_CDB_LBA_OFFSET) &
1963 IO_6_CDB_LBA_MASK;
1964 cdb_info->xfer_len = GET_U8_FROM_CDB(cmd, IO_6_CDB_TX_LEN_OFFSET);
1965
1966 /* sbc3r27 sec 5.32 - TRANSFER LEN of 0 implies a 256 Block transfer */
1967 if (cdb_info->xfer_len == 0)
1968 cdb_info->xfer_len = IO_6_DEFAULT_TX_LEN;
1969 }
1970
1971 static inline void nvme_trans_get_io_cdb10(u8 *cmd,
1972 struct nvme_trans_io_cdb *cdb_info)
1973 {
1974 cdb_info->fua = GET_U8_FROM_CDB(cmd, IO_10_CDB_FUA_OFFSET) &
1975 IO_CDB_FUA_MASK;
1976 cdb_info->prot_info = GET_U8_FROM_CDB(cmd, IO_10_CDB_WP_OFFSET) &
1977 IO_CDB_WP_MASK >> IO_CDB_WP_SHIFT;
1978 cdb_info->lba = GET_U32_FROM_CDB(cmd, IO_10_CDB_LBA_OFFSET);
1979 cdb_info->xfer_len = GET_U16_FROM_CDB(cmd, IO_10_CDB_TX_LEN_OFFSET);
1980 }
1981
1982 static inline void nvme_trans_get_io_cdb12(u8 *cmd,
1983 struct nvme_trans_io_cdb *cdb_info)
1984 {
1985 cdb_info->fua = GET_U8_FROM_CDB(cmd, IO_12_CDB_FUA_OFFSET) &
1986 IO_CDB_FUA_MASK;
1987 cdb_info->prot_info = GET_U8_FROM_CDB(cmd, IO_12_CDB_WP_OFFSET) &
1988 IO_CDB_WP_MASK >> IO_CDB_WP_SHIFT;
1989 cdb_info->lba = GET_U32_FROM_CDB(cmd, IO_12_CDB_LBA_OFFSET);
1990 cdb_info->xfer_len = GET_U32_FROM_CDB(cmd, IO_12_CDB_TX_LEN_OFFSET);
1991 }
1992
1993 static inline void nvme_trans_get_io_cdb16(u8 *cmd,
1994 struct nvme_trans_io_cdb *cdb_info)
1995 {
1996 cdb_info->fua = GET_U8_FROM_CDB(cmd, IO_16_CDB_FUA_OFFSET) &
1997 IO_CDB_FUA_MASK;
1998 cdb_info->prot_info = GET_U8_FROM_CDB(cmd, IO_16_CDB_WP_OFFSET) &
1999 IO_CDB_WP_MASK >> IO_CDB_WP_SHIFT;
2000 cdb_info->lba = GET_U64_FROM_CDB(cmd, IO_16_CDB_LBA_OFFSET);
2001 cdb_info->xfer_len = GET_U32_FROM_CDB(cmd, IO_16_CDB_TX_LEN_OFFSET);
2002 }
2003
2004 static inline u32 nvme_trans_io_get_num_cmds(struct sg_io_hdr *hdr,
2005 struct nvme_trans_io_cdb *cdb_info,
2006 u32 max_blocks)
2007 {
2008 /* If using iovecs, send one nvme command per vector */
2009 if (hdr->iovec_count > 0)
2010 return hdr->iovec_count;
2011 else if (cdb_info->xfer_len > max_blocks)
2012 return ((cdb_info->xfer_len - 1) / max_blocks) + 1;
2013 else
2014 return 1;
2015 }
2016
2017 static u16 nvme_trans_io_get_control(struct nvme_ns *ns,
2018 struct nvme_trans_io_cdb *cdb_info)
2019 {
2020 u16 control = 0;
2021
2022 /* When Protection information support is added, implement here */
2023
2024 if (cdb_info->fua > 0)
2025 control |= NVME_RW_FUA;
2026
2027 return control;
2028 }
2029
2030 static int nvme_trans_do_nvme_io(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2031 struct nvme_trans_io_cdb *cdb_info, u8 is_write)
2032 {
2033 int res = SNTI_TRANSLATION_SUCCESS;
2034 int nvme_sc;
2035 struct nvme_dev *dev = ns->dev;
2036 struct nvme_queue *nvmeq;
2037 u32 num_cmds;
2038 struct nvme_iod *iod;
2039 u64 unit_len;
2040 u64 unit_num_blocks; /* Number of blocks to xfer in each nvme cmd */
2041 u32 retcode;
2042 u32 i = 0;
2043 u64 nvme_offset = 0;
2044 void __user *next_mapping_addr;
2045 struct nvme_command c;
2046 u8 opcode = (is_write ? nvme_cmd_write : nvme_cmd_read);
2047 u16 control;
2048 u32 max_blocks = nvme_block_nr(ns, dev->max_hw_sectors);
2049
2050 num_cmds = nvme_trans_io_get_num_cmds(hdr, cdb_info, max_blocks);
2051
2052 /*
2053 * This loop handles two cases.
2054 * First, when an SGL is used in the form of an iovec list:
2055 * - Use iov_base as the next mapping address for the nvme command_id
2056 * - Use iov_len as the data transfer length for the command.
2057 * Second, when we have a single buffer
2058 * - If larger than max_blocks, split into chunks, offset
2059 * each nvme command accordingly.
2060 */
2061 for (i = 0; i < num_cmds; i++) {
2062 memset(&c, 0, sizeof(c));
2063 if (hdr->iovec_count > 0) {
2064 struct sg_iovec sgl;
2065
2066 retcode = copy_from_user(&sgl, hdr->dxferp +
2067 i * sizeof(struct sg_iovec),
2068 sizeof(struct sg_iovec));
2069 if (retcode)
2070 return -EFAULT;
2071 unit_len = sgl.iov_len;
2072 unit_num_blocks = unit_len >> ns->lba_shift;
2073 next_mapping_addr = sgl.iov_base;
2074 } else {
2075 unit_num_blocks = min((u64)max_blocks,
2076 (cdb_info->xfer_len - nvme_offset));
2077 unit_len = unit_num_blocks << ns->lba_shift;
2078 next_mapping_addr = hdr->dxferp +
2079 ((1 << ns->lba_shift) * nvme_offset);
2080 }
2081
2082 c.rw.opcode = opcode;
2083 c.rw.nsid = cpu_to_le32(ns->ns_id);
2084 c.rw.slba = cpu_to_le64(cdb_info->lba + nvme_offset);
2085 c.rw.length = cpu_to_le16(unit_num_blocks - 1);
2086 control = nvme_trans_io_get_control(ns, cdb_info);
2087 c.rw.control = cpu_to_le16(control);
2088
2089 iod = nvme_map_user_pages(dev,
2090 (is_write) ? DMA_TO_DEVICE : DMA_FROM_DEVICE,
2091 (unsigned long)next_mapping_addr, unit_len);
2092 if (IS_ERR(iod)) {
2093 res = PTR_ERR(iod);
2094 goto out;
2095 }
2096 retcode = nvme_setup_prps(dev, &c.common, iod, unit_len,
2097 GFP_KERNEL);
2098 if (retcode != unit_len) {
2099 nvme_unmap_user_pages(dev,
2100 (is_write) ? DMA_TO_DEVICE : DMA_FROM_DEVICE,
2101 iod);
2102 nvme_free_iod(dev, iod);
2103 res = -ENOMEM;
2104 goto out;
2105 }
2106
2107 nvme_offset += unit_num_blocks;
2108
2109 nvmeq = get_nvmeq(dev);
2110 /*
2111 * Since nvme_submit_sync_cmd sleeps, we can't keep
2112 * preemption disabled. We may be preempted at any
2113 * point, and be rescheduled to a different CPU. That
2114 * will cause cacheline bouncing, but no additional
2115 * races since q_lock already protects against other
2116 * CPUs.
2117 */
2118 put_nvmeq(nvmeq);
2119 nvme_sc = nvme_submit_sync_cmd(nvmeq, &c, NULL,
2120 NVME_IO_TIMEOUT);
2121 if (nvme_sc != NVME_SC_SUCCESS) {
2122 nvme_unmap_user_pages(dev,
2123 (is_write) ? DMA_TO_DEVICE : DMA_FROM_DEVICE,
2124 iod);
2125 nvme_free_iod(dev, iod);
2126 res = nvme_trans_status_code(hdr, nvme_sc);
2127 goto out;
2128 }
2129 nvme_unmap_user_pages(dev,
2130 (is_write) ? DMA_TO_DEVICE : DMA_FROM_DEVICE,
2131 iod);
2132 nvme_free_iod(dev, iod);
2133 }
2134 res = nvme_trans_status_code(hdr, NVME_SC_SUCCESS);
2135
2136 out:
2137 return res;
2138 }
2139
2140
2141 /* SCSI Command Translation Functions */
2142
2143 static int nvme_trans_io(struct nvme_ns *ns, struct sg_io_hdr *hdr, u8 is_write,
2144 u8 *cmd)
2145 {
2146 int res = SNTI_TRANSLATION_SUCCESS;
2147 struct nvme_trans_io_cdb cdb_info;
2148 u8 opcode = cmd[0];
2149 u64 xfer_bytes;
2150 u64 sum_iov_len = 0;
2151 struct sg_iovec sgl;
2152 int i;
2153 size_t not_copied;
2154
2155 /* Extract Fields from CDB */
2156 switch (opcode) {
2157 case WRITE_6:
2158 case READ_6:
2159 nvme_trans_get_io_cdb6(cmd, &cdb_info);
2160 break;
2161 case WRITE_10:
2162 case READ_10:
2163 nvme_trans_get_io_cdb10(cmd, &cdb_info);
2164 break;
2165 case WRITE_12:
2166 case READ_12:
2167 nvme_trans_get_io_cdb12(cmd, &cdb_info);
2168 break;
2169 case WRITE_16:
2170 case READ_16:
2171 nvme_trans_get_io_cdb16(cmd, &cdb_info);
2172 break;
2173 default:
2174 /* Will never really reach here */
2175 res = SNTI_INTERNAL_ERROR;
2176 goto out;
2177 }
2178
2179 /* Calculate total length of transfer (in bytes) */
2180 if (hdr->iovec_count > 0) {
2181 for (i = 0; i < hdr->iovec_count; i++) {
2182 not_copied = copy_from_user(&sgl, hdr->dxferp +
2183 i * sizeof(struct sg_iovec),
2184 sizeof(struct sg_iovec));
2185 if (not_copied)
2186 return -EFAULT;
2187 sum_iov_len += sgl.iov_len;
2188 /* IO vector sizes should be multiples of block size */
2189 if (sgl.iov_len % (1 << ns->lba_shift) != 0) {
2190 res = nvme_trans_completion(hdr,
2191 SAM_STAT_CHECK_CONDITION,
2192 ILLEGAL_REQUEST,
2193 SCSI_ASC_INVALID_PARAMETER,
2194 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2195 goto out;
2196 }
2197 }
2198 } else {
2199 sum_iov_len = hdr->dxfer_len;
2200 }
2201
2202 /* As Per sg ioctl howto, if the lengths differ, use the lower one */
2203 xfer_bytes = min(((u64)hdr->dxfer_len), sum_iov_len);
2204
2205 /* If block count and actual data buffer size dont match, error out */
2206 if (xfer_bytes != (cdb_info.xfer_len << ns->lba_shift)) {
2207 res = -EINVAL;
2208 goto out;
2209 }
2210
2211 /* Check for 0 length transfer - it is not illegal */
2212 if (cdb_info.xfer_len == 0)
2213 goto out;
2214
2215 /* Send NVMe IO Command(s) */
2216 res = nvme_trans_do_nvme_io(ns, hdr, &cdb_info, is_write);
2217 if (res != SNTI_TRANSLATION_SUCCESS)
2218 goto out;
2219
2220 out:
2221 return res;
2222 }
2223
2224 static int nvme_trans_inquiry(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2225 u8 *cmd)
2226 {
2227 int res = SNTI_TRANSLATION_SUCCESS;
2228 u8 evpd;
2229 u8 page_code;
2230 int alloc_len;
2231 u8 *inq_response;
2232
2233 evpd = GET_INQ_EVPD_BIT(cmd);
2234 page_code = GET_INQ_PAGE_CODE(cmd);
2235 alloc_len = GET_INQ_ALLOC_LENGTH(cmd);
2236
2237 inq_response = kmalloc(STANDARD_INQUIRY_LENGTH, GFP_KERNEL);
2238 if (inq_response == NULL) {
2239 res = -ENOMEM;
2240 goto out_mem;
2241 }
2242
2243 if (evpd == 0) {
2244 if (page_code == INQ_STANDARD_INQUIRY_PAGE) {
2245 res = nvme_trans_standard_inquiry_page(ns, hdr,
2246 inq_response, alloc_len);
2247 } else {
2248 res = nvme_trans_completion(hdr,
2249 SAM_STAT_CHECK_CONDITION,
2250 ILLEGAL_REQUEST,
2251 SCSI_ASC_INVALID_CDB,
2252 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2253 }
2254 } else {
2255 switch (page_code) {
2256 case VPD_SUPPORTED_PAGES:
2257 res = nvme_trans_supported_vpd_pages(ns, hdr,
2258 inq_response, alloc_len);
2259 break;
2260 case VPD_SERIAL_NUMBER:
2261 res = nvme_trans_unit_serial_page(ns, hdr, inq_response,
2262 alloc_len);
2263 break;
2264 case VPD_DEVICE_IDENTIFIERS:
2265 res = nvme_trans_device_id_page(ns, hdr, inq_response,
2266 alloc_len);
2267 break;
2268 case VPD_EXTENDED_INQUIRY:
2269 res = nvme_trans_ext_inq_page(ns, hdr, alloc_len);
2270 break;
2271 case VPD_BLOCK_DEV_CHARACTERISTICS:
2272 res = nvme_trans_bdev_char_page(ns, hdr, alloc_len);
2273 break;
2274 default:
2275 res = nvme_trans_completion(hdr,
2276 SAM_STAT_CHECK_CONDITION,
2277 ILLEGAL_REQUEST,
2278 SCSI_ASC_INVALID_CDB,
2279 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2280 break;
2281 }
2282 }
2283 kfree(inq_response);
2284 out_mem:
2285 return res;
2286 }
2287
2288 static int nvme_trans_log_sense(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2289 u8 *cmd)
2290 {
2291 int res = SNTI_TRANSLATION_SUCCESS;
2292 u16 alloc_len;
2293 u8 sp;
2294 u8 pc;
2295 u8 page_code;
2296
2297 sp = GET_U8_FROM_CDB(cmd, LOG_SENSE_CDB_SP_OFFSET);
2298 if (sp != LOG_SENSE_CDB_SP_NOT_ENABLED) {
2299 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2300 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2301 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2302 goto out;
2303 }
2304 pc = GET_U8_FROM_CDB(cmd, LOG_SENSE_CDB_PC_OFFSET);
2305 page_code = pc & LOG_SENSE_CDB_PAGE_CODE_MASK;
2306 pc = (pc & LOG_SENSE_CDB_PC_MASK) >> LOG_SENSE_CDB_PC_SHIFT;
2307 if (pc != LOG_SENSE_CDB_PC_CUMULATIVE_VALUES) {
2308 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2309 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2310 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2311 goto out;
2312 }
2313 alloc_len = GET_U16_FROM_CDB(cmd, LOG_SENSE_CDB_ALLOC_LENGTH_OFFSET);
2314 switch (page_code) {
2315 case LOG_PAGE_SUPPORTED_LOG_PAGES_PAGE:
2316 res = nvme_trans_log_supp_pages(ns, hdr, alloc_len);
2317 break;
2318 case LOG_PAGE_INFORMATIONAL_EXCEPTIONS_PAGE:
2319 res = nvme_trans_log_info_exceptions(ns, hdr, alloc_len);
2320 break;
2321 case LOG_PAGE_TEMPERATURE_PAGE:
2322 res = nvme_trans_log_temperature(ns, hdr, alloc_len);
2323 break;
2324 default:
2325 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2326 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2327 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2328 break;
2329 }
2330
2331 out:
2332 return res;
2333 }
2334
2335 static int nvme_trans_mode_select(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2336 u8 *cmd)
2337 {
2338 int res = SNTI_TRANSLATION_SUCCESS;
2339 u8 cdb10 = 0;
2340 u16 parm_list_len;
2341 u8 page_format;
2342 u8 save_pages;
2343
2344 page_format = GET_U8_FROM_CDB(cmd, MODE_SELECT_CDB_PAGE_FORMAT_OFFSET);
2345 page_format &= MODE_SELECT_CDB_PAGE_FORMAT_MASK;
2346
2347 save_pages = GET_U8_FROM_CDB(cmd, MODE_SELECT_CDB_SAVE_PAGES_OFFSET);
2348 save_pages &= MODE_SELECT_CDB_SAVE_PAGES_MASK;
2349
2350 if (GET_OPCODE(cmd) == MODE_SELECT) {
2351 parm_list_len = GET_U8_FROM_CDB(cmd,
2352 MODE_SELECT_6_CDB_PARAM_LIST_LENGTH_OFFSET);
2353 } else {
2354 parm_list_len = GET_U16_FROM_CDB(cmd,
2355 MODE_SELECT_10_CDB_PARAM_LIST_LENGTH_OFFSET);
2356 cdb10 = 1;
2357 }
2358
2359 if (parm_list_len != 0) {
2360 /*
2361 * According to SPC-4 r24, a paramter list length field of 0
2362 * shall not be considered an error
2363 */
2364 res = nvme_trans_modesel_data(ns, hdr, cmd, parm_list_len,
2365 page_format, save_pages, cdb10);
2366 }
2367
2368 return res;
2369 }
2370
2371 static int nvme_trans_mode_sense(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2372 u8 *cmd)
2373 {
2374 int res = SNTI_TRANSLATION_SUCCESS;
2375 u16 alloc_len;
2376 u8 cdb10 = 0;
2377 u8 page_code;
2378 u8 pc;
2379
2380 if (GET_OPCODE(cmd) == MODE_SENSE) {
2381 alloc_len = GET_U8_FROM_CDB(cmd, MODE_SENSE6_ALLOC_LEN_OFFSET);
2382 } else {
2383 alloc_len = GET_U16_FROM_CDB(cmd,
2384 MODE_SENSE10_ALLOC_LEN_OFFSET);
2385 cdb10 = 1;
2386 }
2387
2388 pc = GET_U8_FROM_CDB(cmd, MODE_SENSE_PAGE_CONTROL_OFFSET) &
2389 MODE_SENSE_PAGE_CONTROL_MASK;
2390 if (pc != MODE_SENSE_PC_CURRENT_VALUES) {
2391 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2392 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2393 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2394 goto out;
2395 }
2396
2397 page_code = GET_U8_FROM_CDB(cmd, MODE_SENSE_PAGE_CODE_OFFSET) &
2398 MODE_SENSE_PAGE_CODE_MASK;
2399 switch (page_code) {
2400 case MODE_PAGE_CACHING:
2401 res = nvme_trans_mode_page_create(ns, hdr, cmd, alloc_len,
2402 cdb10,
2403 &nvme_trans_fill_caching_page,
2404 MODE_PAGE_CACHING_LEN);
2405 break;
2406 case MODE_PAGE_CONTROL:
2407 res = nvme_trans_mode_page_create(ns, hdr, cmd, alloc_len,
2408 cdb10,
2409 &nvme_trans_fill_control_page,
2410 MODE_PAGE_CONTROL_LEN);
2411 break;
2412 case MODE_PAGE_POWER_CONDITION:
2413 res = nvme_trans_mode_page_create(ns, hdr, cmd, alloc_len,
2414 cdb10,
2415 &nvme_trans_fill_pow_cnd_page,
2416 MODE_PAGE_POW_CND_LEN);
2417 break;
2418 case MODE_PAGE_INFO_EXCEP:
2419 res = nvme_trans_mode_page_create(ns, hdr, cmd, alloc_len,
2420 cdb10,
2421 &nvme_trans_fill_inf_exc_page,
2422 MODE_PAGE_INF_EXC_LEN);
2423 break;
2424 case MODE_PAGE_RETURN_ALL:
2425 res = nvme_trans_mode_page_create(ns, hdr, cmd, alloc_len,
2426 cdb10,
2427 &nvme_trans_fill_all_pages,
2428 MODE_PAGE_ALL_LEN);
2429 break;
2430 default:
2431 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2432 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2433 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2434 break;
2435 }
2436
2437 out:
2438 return res;
2439 }
2440
2441 static int nvme_trans_read_capacity(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2442 u8 *cmd)
2443 {
2444 int res = SNTI_TRANSLATION_SUCCESS;
2445 int nvme_sc;
2446 u32 alloc_len = READ_CAP_10_RESP_SIZE;
2447 u32 resp_size = READ_CAP_10_RESP_SIZE;
2448 u32 xfer_len;
2449 u8 cdb16;
2450 struct nvme_dev *dev = ns->dev;
2451 dma_addr_t dma_addr;
2452 void *mem;
2453 struct nvme_id_ns *id_ns;
2454 u8 *response;
2455
2456 cdb16 = IS_READ_CAP_16(cmd);
2457 if (cdb16) {
2458 alloc_len = GET_READ_CAP_16_ALLOC_LENGTH(cmd);
2459 resp_size = READ_CAP_16_RESP_SIZE;
2460 }
2461
2462 mem = dma_alloc_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns),
2463 &dma_addr, GFP_KERNEL);
2464 if (mem == NULL) {
2465 res = -ENOMEM;
2466 goto out;
2467 }
2468 /* nvme ns identify */
2469 nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
2470 res = nvme_trans_status_code(hdr, nvme_sc);
2471 if (res)
2472 goto out_dma;
2473 if (nvme_sc) {
2474 res = nvme_sc;
2475 goto out_dma;
2476 }
2477 id_ns = mem;
2478
2479 response = kzalloc(resp_size, GFP_KERNEL);
2480 if (response == NULL) {
2481 res = -ENOMEM;
2482 goto out_dma;
2483 }
2484 nvme_trans_fill_read_cap(response, id_ns, cdb16);
2485
2486 xfer_len = min(alloc_len, resp_size);
2487 res = nvme_trans_copy_to_user(hdr, response, xfer_len);
2488
2489 kfree(response);
2490 out_dma:
2491 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns), mem,
2492 dma_addr);
2493 out:
2494 return res;
2495 }
2496
2497 static int nvme_trans_report_luns(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2498 u8 *cmd)
2499 {
2500 int res = SNTI_TRANSLATION_SUCCESS;
2501 int nvme_sc;
2502 u32 alloc_len, xfer_len, resp_size;
2503 u8 select_report;
2504 u8 *response;
2505 struct nvme_dev *dev = ns->dev;
2506 dma_addr_t dma_addr;
2507 void *mem;
2508 struct nvme_id_ctrl *id_ctrl;
2509 u32 ll_length, lun_id;
2510 u8 lun_id_offset = REPORT_LUNS_FIRST_LUN_OFFSET;
2511 __be32 tmp_len;
2512
2513 alloc_len = GET_REPORT_LUNS_ALLOC_LENGTH(cmd);
2514 select_report = GET_U8_FROM_CDB(cmd, REPORT_LUNS_SR_OFFSET);
2515
2516 if ((select_report != ALL_LUNS_RETURNED) &&
2517 (select_report != ALL_WELL_KNOWN_LUNS_RETURNED) &&
2518 (select_report != RESTRICTED_LUNS_RETURNED)) {
2519 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2520 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2521 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2522 goto out;
2523 } else {
2524 /* NVMe Controller Identify */
2525 mem = dma_alloc_coherent(&dev->pci_dev->dev,
2526 sizeof(struct nvme_id_ctrl),
2527 &dma_addr, GFP_KERNEL);
2528 if (mem == NULL) {
2529 res = -ENOMEM;
2530 goto out;
2531 }
2532 nvme_sc = nvme_identify(dev, 0, 1, dma_addr);
2533 res = nvme_trans_status_code(hdr, nvme_sc);
2534 if (res)
2535 goto out_dma;
2536 if (nvme_sc) {
2537 res = nvme_sc;
2538 goto out_dma;
2539 }
2540 id_ctrl = mem;
2541 ll_length = le32_to_cpu(id_ctrl->nn) * LUN_ENTRY_SIZE;
2542 resp_size = ll_length + LUN_DATA_HEADER_SIZE;
2543
2544 if (alloc_len < resp_size) {
2545 res = nvme_trans_completion(hdr,
2546 SAM_STAT_CHECK_CONDITION,
2547 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2548 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2549 goto out_dma;
2550 }
2551
2552 response = kzalloc(resp_size, GFP_KERNEL);
2553 if (response == NULL) {
2554 res = -ENOMEM;
2555 goto out_dma;
2556 }
2557
2558 /* The first LUN ID will always be 0 per the SAM spec */
2559 for (lun_id = 0; lun_id < le32_to_cpu(id_ctrl->nn); lun_id++) {
2560 /*
2561 * Set the LUN Id and then increment to the next LUN
2562 * location in the parameter data.
2563 */
2564 __be64 tmp_id = cpu_to_be64(lun_id);
2565 memcpy(&response[lun_id_offset], &tmp_id, sizeof(u64));
2566 lun_id_offset += LUN_ENTRY_SIZE;
2567 }
2568 tmp_len = cpu_to_be32(ll_length);
2569 memcpy(response, &tmp_len, sizeof(u32));
2570 }
2571
2572 xfer_len = min(alloc_len, resp_size);
2573 res = nvme_trans_copy_to_user(hdr, response, xfer_len);
2574
2575 kfree(response);
2576 out_dma:
2577 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ctrl), mem,
2578 dma_addr);
2579 out:
2580 return res;
2581 }
2582
2583 static int nvme_trans_request_sense(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2584 u8 *cmd)
2585 {
2586 int res = SNTI_TRANSLATION_SUCCESS;
2587 u8 alloc_len, xfer_len, resp_size;
2588 u8 desc_format;
2589 u8 *response;
2590
2591 alloc_len = GET_REQUEST_SENSE_ALLOC_LENGTH(cmd);
2592 desc_format = GET_U8_FROM_CDB(cmd, REQUEST_SENSE_DESC_OFFSET);
2593 desc_format &= REQUEST_SENSE_DESC_MASK;
2594
2595 resp_size = ((desc_format) ? (DESC_FMT_SENSE_DATA_SIZE) :
2596 (FIXED_FMT_SENSE_DATA_SIZE));
2597 response = kzalloc(resp_size, GFP_KERNEL);
2598 if (response == NULL) {
2599 res = -ENOMEM;
2600 goto out;
2601 }
2602
2603 if (desc_format == DESCRIPTOR_FORMAT_SENSE_DATA_TYPE) {
2604 /* Descriptor Format Sense Data */
2605 response[0] = DESC_FORMAT_SENSE_DATA;
2606 response[1] = NO_SENSE;
2607 /* TODO How is LOW POWER CONDITION ON handled? (byte 2) */
2608 response[2] = SCSI_ASC_NO_SENSE;
2609 response[3] = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
2610 /* SDAT_OVFL = 0 | Additional Sense Length = 0 */
2611 } else {
2612 /* Fixed Format Sense Data */
2613 response[0] = FIXED_SENSE_DATA;
2614 /* Byte 1 = Obsolete */
2615 response[2] = NO_SENSE; /* FM, EOM, ILI, SDAT_OVFL = 0 */
2616 /* Bytes 3-6 - Information - set to zero */
2617 response[7] = FIXED_SENSE_DATA_ADD_LENGTH;
2618 /* Bytes 8-11 - Cmd Specific Information - set to zero */
2619 response[12] = SCSI_ASC_NO_SENSE;
2620 response[13] = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
2621 /* Byte 14 = Field Replaceable Unit Code = 0 */
2622 /* Bytes 15-17 - SKSV=0; Sense Key Specific = 0 */
2623 }
2624
2625 xfer_len = min(alloc_len, resp_size);
2626 res = nvme_trans_copy_to_user(hdr, response, xfer_len);
2627
2628 kfree(response);
2629 out:
2630 return res;
2631 }
2632
2633 static int nvme_trans_security_protocol(struct nvme_ns *ns,
2634 struct sg_io_hdr *hdr,
2635 u8 *cmd)
2636 {
2637 return nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2638 ILLEGAL_REQUEST, SCSI_ASC_ILLEGAL_COMMAND,
2639 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2640 }
2641
2642 static int nvme_trans_start_stop(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2643 u8 *cmd)
2644 {
2645 int res = SNTI_TRANSLATION_SUCCESS;
2646 int nvme_sc;
2647 struct nvme_queue *nvmeq;
2648 struct nvme_command c;
2649 u8 immed, pcmod, pc, no_flush, start;
2650
2651 immed = GET_U8_FROM_CDB(cmd, START_STOP_UNIT_CDB_IMMED_OFFSET);
2652 pcmod = GET_U8_FROM_CDB(cmd, START_STOP_UNIT_CDB_POWER_COND_MOD_OFFSET);
2653 pc = GET_U8_FROM_CDB(cmd, START_STOP_UNIT_CDB_POWER_COND_OFFSET);
2654 no_flush = GET_U8_FROM_CDB(cmd, START_STOP_UNIT_CDB_NO_FLUSH_OFFSET);
2655 start = GET_U8_FROM_CDB(cmd, START_STOP_UNIT_CDB_START_OFFSET);
2656
2657 immed &= START_STOP_UNIT_CDB_IMMED_MASK;
2658 pcmod &= START_STOP_UNIT_CDB_POWER_COND_MOD_MASK;
2659 pc = (pc & START_STOP_UNIT_CDB_POWER_COND_MASK) >> NIBBLE_SHIFT;
2660 no_flush &= START_STOP_UNIT_CDB_NO_FLUSH_MASK;
2661 start &= START_STOP_UNIT_CDB_START_MASK;
2662
2663 if (immed != 0) {
2664 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2665 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2666 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2667 } else {
2668 if (no_flush == 0) {
2669 /* Issue NVME FLUSH command prior to START STOP UNIT */
2670 memset(&c, 0, sizeof(c));
2671 c.common.opcode = nvme_cmd_flush;
2672 c.common.nsid = cpu_to_le32(ns->ns_id);
2673
2674 nvmeq = get_nvmeq(ns->dev);
2675 put_nvmeq(nvmeq);
2676 nvme_sc = nvme_submit_sync_cmd(nvmeq, &c, NULL, NVME_IO_TIMEOUT);
2677
2678 res = nvme_trans_status_code(hdr, nvme_sc);
2679 if (res)
2680 goto out;
2681 if (nvme_sc) {
2682 res = nvme_sc;
2683 goto out;
2684 }
2685 }
2686 /* Setup the expected power state transition */
2687 res = nvme_trans_power_state(ns, hdr, pc, pcmod, start);
2688 }
2689
2690 out:
2691 return res;
2692 }
2693
2694 static int nvme_trans_synchronize_cache(struct nvme_ns *ns,
2695 struct sg_io_hdr *hdr, u8 *cmd)
2696 {
2697 int res = SNTI_TRANSLATION_SUCCESS;
2698 int nvme_sc;
2699 struct nvme_command c;
2700 struct nvme_queue *nvmeq;
2701
2702 memset(&c, 0, sizeof(c));
2703 c.common.opcode = nvme_cmd_flush;
2704 c.common.nsid = cpu_to_le32(ns->ns_id);
2705
2706 nvmeq = get_nvmeq(ns->dev);
2707 put_nvmeq(nvmeq);
2708 nvme_sc = nvme_submit_sync_cmd(nvmeq, &c, NULL, NVME_IO_TIMEOUT);
2709
2710 res = nvme_trans_status_code(hdr, nvme_sc);
2711 if (res)
2712 goto out;
2713 if (nvme_sc)
2714 res = nvme_sc;
2715
2716 out:
2717 return res;
2718 }
2719
2720 static int nvme_trans_format_unit(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2721 u8 *cmd)
2722 {
2723 int res = SNTI_TRANSLATION_SUCCESS;
2724 u8 parm_hdr_len = 0;
2725 u8 nvme_pf_code = 0;
2726 u8 format_prot_info, long_list, format_data;
2727
2728 format_prot_info = GET_U8_FROM_CDB(cmd,
2729 FORMAT_UNIT_CDB_FORMAT_PROT_INFO_OFFSET);
2730 long_list = GET_U8_FROM_CDB(cmd, FORMAT_UNIT_CDB_LONG_LIST_OFFSET);
2731 format_data = GET_U8_FROM_CDB(cmd, FORMAT_UNIT_CDB_FORMAT_DATA_OFFSET);
2732
2733 format_prot_info = (format_prot_info &
2734 FORMAT_UNIT_CDB_FORMAT_PROT_INFO_MASK) >>
2735 FORMAT_UNIT_CDB_FORMAT_PROT_INFO_SHIFT;
2736 long_list &= FORMAT_UNIT_CDB_LONG_LIST_MASK;
2737 format_data &= FORMAT_UNIT_CDB_FORMAT_DATA_MASK;
2738
2739 if (format_data != 0) {
2740 if (format_prot_info != 0) {
2741 if (long_list == 0)
2742 parm_hdr_len = FORMAT_UNIT_SHORT_PARM_LIST_LEN;
2743 else
2744 parm_hdr_len = FORMAT_UNIT_LONG_PARM_LIST_LEN;
2745 }
2746 } else if (format_data == 0 && format_prot_info != 0) {
2747 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2748 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2749 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2750 goto out;
2751 }
2752
2753 /* Get parm header from data-in/out buffer */
2754 /*
2755 * According to the translation spec, the only fields in the parameter
2756 * list we are concerned with are in the header. So allocate only that.
2757 */
2758 if (parm_hdr_len > 0) {
2759 res = nvme_trans_fmt_get_parm_header(hdr, parm_hdr_len,
2760 format_prot_info, &nvme_pf_code);
2761 if (res != SNTI_TRANSLATION_SUCCESS)
2762 goto out;
2763 }
2764
2765 /* Attempt to activate any previously downloaded firmware image */
2766 res = nvme_trans_send_fw_cmd(ns, hdr, nvme_admin_activate_fw, 0, 0, 0);
2767
2768 /* Determine Block size and count and send format command */
2769 res = nvme_trans_fmt_set_blk_size_count(ns, hdr);
2770 if (res != SNTI_TRANSLATION_SUCCESS)
2771 goto out;
2772
2773 res = nvme_trans_fmt_send_cmd(ns, hdr, nvme_pf_code);
2774
2775 out:
2776 return res;
2777 }
2778
2779 static int nvme_trans_test_unit_ready(struct nvme_ns *ns,
2780 struct sg_io_hdr *hdr,
2781 u8 *cmd)
2782 {
2783 int res = SNTI_TRANSLATION_SUCCESS;
2784 struct nvme_dev *dev = ns->dev;
2785
2786 if (!(readl(&dev->bar->csts) & NVME_CSTS_RDY))
2787 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2788 NOT_READY, SCSI_ASC_LUN_NOT_READY,
2789 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2790 else
2791 res = nvme_trans_completion(hdr, SAM_STAT_GOOD, NO_SENSE, 0, 0);
2792
2793 return res;
2794 }
2795
2796 static int nvme_trans_write_buffer(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2797 u8 *cmd)
2798 {
2799 int res = SNTI_TRANSLATION_SUCCESS;
2800 u32 buffer_offset, parm_list_length;
2801 u8 buffer_id, mode;
2802
2803 parm_list_length =
2804 GET_U24_FROM_CDB(cmd, WRITE_BUFFER_CDB_PARM_LIST_LENGTH_OFFSET);
2805 if (parm_list_length % BYTES_TO_DWORDS != 0) {
2806 /* NVMe expects Firmware file to be a whole number of DWORDS */
2807 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2808 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2809 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2810 goto out;
2811 }
2812 buffer_id = GET_U8_FROM_CDB(cmd, WRITE_BUFFER_CDB_BUFFER_ID_OFFSET);
2813 if (buffer_id > NVME_MAX_FIRMWARE_SLOT) {
2814 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2815 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2816 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2817 goto out;
2818 }
2819 mode = GET_U8_FROM_CDB(cmd, WRITE_BUFFER_CDB_MODE_OFFSET) &
2820 WRITE_BUFFER_CDB_MODE_MASK;
2821 buffer_offset =
2822 GET_U24_FROM_CDB(cmd, WRITE_BUFFER_CDB_BUFFER_OFFSET_OFFSET);
2823
2824 switch (mode) {
2825 case DOWNLOAD_SAVE_ACTIVATE:
2826 res = nvme_trans_send_fw_cmd(ns, hdr, nvme_admin_download_fw,
2827 parm_list_length, buffer_offset,
2828 buffer_id);
2829 if (res != SNTI_TRANSLATION_SUCCESS)
2830 goto out;
2831 res = nvme_trans_send_fw_cmd(ns, hdr, nvme_admin_activate_fw,
2832 parm_list_length, buffer_offset,
2833 buffer_id);
2834 break;
2835 case DOWNLOAD_SAVE_DEFER_ACTIVATE:
2836 res = nvme_trans_send_fw_cmd(ns, hdr, nvme_admin_download_fw,
2837 parm_list_length, buffer_offset,
2838 buffer_id);
2839 break;
2840 case ACTIVATE_DEFERRED_MICROCODE:
2841 res = nvme_trans_send_fw_cmd(ns, hdr, nvme_admin_activate_fw,
2842 parm_list_length, buffer_offset,
2843 buffer_id);
2844 break;
2845 default:
2846 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2847 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2848 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2849 break;
2850 }
2851
2852 out:
2853 return res;
2854 }
2855
2856 struct scsi_unmap_blk_desc {
2857 __be64 slba;
2858 __be32 nlb;
2859 u32 resv;
2860 };
2861
2862 struct scsi_unmap_parm_list {
2863 __be16 unmap_data_len;
2864 __be16 unmap_blk_desc_data_len;
2865 u32 resv;
2866 struct scsi_unmap_blk_desc desc[0];
2867 };
2868
2869 static int nvme_trans_unmap(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2870 u8 *cmd)
2871 {
2872 struct nvme_dev *dev = ns->dev;
2873 struct scsi_unmap_parm_list *plist;
2874 struct nvme_dsm_range *range;
2875 struct nvme_queue *nvmeq;
2876 struct nvme_command c;
2877 int i, nvme_sc, res = -ENOMEM;
2878 u16 ndesc, list_len;
2879 dma_addr_t dma_addr;
2880
2881 list_len = GET_U16_FROM_CDB(cmd, UNMAP_CDB_PARAM_LIST_LENGTH_OFFSET);
2882 if (!list_len)
2883 return -EINVAL;
2884
2885 plist = kmalloc(list_len, GFP_KERNEL);
2886 if (!plist)
2887 return -ENOMEM;
2888
2889 res = nvme_trans_copy_from_user(hdr, plist, list_len);
2890 if (res != SNTI_TRANSLATION_SUCCESS)
2891 goto out;
2892
2893 ndesc = be16_to_cpu(plist->unmap_blk_desc_data_len) >> 4;
2894 if (!ndesc || ndesc > 256) {
2895 res = -EINVAL;
2896 goto out;
2897 }
2898
2899 range = dma_alloc_coherent(&dev->pci_dev->dev, ndesc * sizeof(*range),
2900 &dma_addr, GFP_KERNEL);
2901 if (!range)
2902 goto out;
2903
2904 for (i = 0; i < ndesc; i++) {
2905 range[i].nlb = cpu_to_le32(be32_to_cpu(plist->desc[i].nlb));
2906 range[i].slba = cpu_to_le64(be64_to_cpu(plist->desc[i].slba));
2907 range[i].cattr = 0;
2908 }
2909
2910 memset(&c, 0, sizeof(c));
2911 c.dsm.opcode = nvme_cmd_dsm;
2912 c.dsm.nsid = cpu_to_le32(ns->ns_id);
2913 c.dsm.prp1 = cpu_to_le64(dma_addr);
2914 c.dsm.nr = cpu_to_le32(ndesc - 1);
2915 c.dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
2916
2917 nvmeq = get_nvmeq(dev);
2918 put_nvmeq(nvmeq);
2919
2920 nvme_sc = nvme_submit_sync_cmd(nvmeq, &c, NULL, NVME_IO_TIMEOUT);
2921 res = nvme_trans_status_code(hdr, nvme_sc);
2922
2923 dma_free_coherent(&dev->pci_dev->dev, ndesc * sizeof(*range),
2924 range, dma_addr);
2925 out:
2926 kfree(plist);
2927 return res;
2928 }
2929
2930 static int nvme_scsi_translate(struct nvme_ns *ns, struct sg_io_hdr *hdr)
2931 {
2932 u8 cmd[BLK_MAX_CDB];
2933 int retcode;
2934 unsigned int opcode;
2935
2936 if (hdr->cmdp == NULL)
2937 return -EMSGSIZE;
2938 if (copy_from_user(cmd, hdr->cmdp, hdr->cmd_len))
2939 return -EFAULT;
2940
2941 opcode = cmd[0];
2942
2943 switch (opcode) {
2944 case READ_6:
2945 case READ_10:
2946 case READ_12:
2947 case READ_16:
2948 retcode = nvme_trans_io(ns, hdr, 0, cmd);
2949 break;
2950 case WRITE_6:
2951 case WRITE_10:
2952 case WRITE_12:
2953 case WRITE_16:
2954 retcode = nvme_trans_io(ns, hdr, 1, cmd);
2955 break;
2956 case INQUIRY:
2957 retcode = nvme_trans_inquiry(ns, hdr, cmd);
2958 break;
2959 case LOG_SENSE:
2960 retcode = nvme_trans_log_sense(ns, hdr, cmd);
2961 break;
2962 case MODE_SELECT:
2963 case MODE_SELECT_10:
2964 retcode = nvme_trans_mode_select(ns, hdr, cmd);
2965 break;
2966 case MODE_SENSE:
2967 case MODE_SENSE_10:
2968 retcode = nvme_trans_mode_sense(ns, hdr, cmd);
2969 break;
2970 case READ_CAPACITY:
2971 retcode = nvme_trans_read_capacity(ns, hdr, cmd);
2972 break;
2973 case SERVICE_ACTION_IN:
2974 if (IS_READ_CAP_16(cmd))
2975 retcode = nvme_trans_read_capacity(ns, hdr, cmd);
2976 else
2977 goto out;
2978 break;
2979 case REPORT_LUNS:
2980 retcode = nvme_trans_report_luns(ns, hdr, cmd);
2981 break;
2982 case REQUEST_SENSE:
2983 retcode = nvme_trans_request_sense(ns, hdr, cmd);
2984 break;
2985 case SECURITY_PROTOCOL_IN:
2986 case SECURITY_PROTOCOL_OUT:
2987 retcode = nvme_trans_security_protocol(ns, hdr, cmd);
2988 break;
2989 case START_STOP:
2990 retcode = nvme_trans_start_stop(ns, hdr, cmd);
2991 break;
2992 case SYNCHRONIZE_CACHE:
2993 retcode = nvme_trans_synchronize_cache(ns, hdr, cmd);
2994 break;
2995 case FORMAT_UNIT:
2996 retcode = nvme_trans_format_unit(ns, hdr, cmd);
2997 break;
2998 case TEST_UNIT_READY:
2999 retcode = nvme_trans_test_unit_ready(ns, hdr, cmd);
3000 break;
3001 case WRITE_BUFFER:
3002 retcode = nvme_trans_write_buffer(ns, hdr, cmd);
3003 break;
3004 case UNMAP:
3005 retcode = nvme_trans_unmap(ns, hdr, cmd);
3006 break;
3007 default:
3008 out:
3009 retcode = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
3010 ILLEGAL_REQUEST, SCSI_ASC_ILLEGAL_COMMAND,
3011 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
3012 break;
3013 }
3014 return retcode;
3015 }
3016
3017 int nvme_sg_io(struct nvme_ns *ns, struct sg_io_hdr __user *u_hdr)
3018 {
3019 struct sg_io_hdr hdr;
3020 int retcode;
3021
3022 if (!capable(CAP_SYS_ADMIN))
3023 return -EACCES;
3024 if (copy_from_user(&hdr, u_hdr, sizeof(hdr)))
3025 return -EFAULT;
3026 if (hdr.interface_id != 'S')
3027 return -EINVAL;
3028 if (hdr.cmd_len > BLK_MAX_CDB)
3029 return -EINVAL;
3030
3031 retcode = nvme_scsi_translate(ns, &hdr);
3032 if (retcode < 0)
3033 return retcode;
3034 if (retcode > 0)
3035 retcode = SNTI_TRANSLATION_SUCCESS;
3036 if (copy_to_user(u_hdr, &hdr, sizeof(sg_io_hdr_t)) > 0)
3037 return -EFAULT;
3038
3039 return retcode;
3040 }
3041
3042 #ifdef CONFIG_COMPAT
3043 typedef struct sg_io_hdr32 {
3044 compat_int_t interface_id; /* [i] 'S' for SCSI generic (required) */
3045 compat_int_t dxfer_direction; /* [i] data transfer direction */
3046 unsigned char cmd_len; /* [i] SCSI command length ( <= 16 bytes) */
3047 unsigned char mx_sb_len; /* [i] max length to write to sbp */
3048 unsigned short iovec_count; /* [i] 0 implies no scatter gather */
3049 compat_uint_t dxfer_len; /* [i] byte count of data transfer */
3050 compat_uint_t dxferp; /* [i], [*io] points to data transfer memory
3051 or scatter gather list */
3052 compat_uptr_t cmdp; /* [i], [*i] points to command to perform */
3053 compat_uptr_t sbp; /* [i], [*o] points to sense_buffer memory */
3054 compat_uint_t timeout; /* [i] MAX_UINT->no timeout (unit: millisec) */
3055 compat_uint_t flags; /* [i] 0 -> default, see SG_FLAG... */
3056 compat_int_t pack_id; /* [i->o] unused internally (normally) */
3057 compat_uptr_t usr_ptr; /* [i->o] unused internally */
3058 unsigned char status; /* [o] scsi status */
3059 unsigned char masked_status; /* [o] shifted, masked scsi status */
3060 unsigned char msg_status; /* [o] messaging level data (optional) */
3061 unsigned char sb_len_wr; /* [o] byte count actually written to sbp */
3062 unsigned short host_status; /* [o] errors from host adapter */
3063 unsigned short driver_status; /* [o] errors from software driver */
3064 compat_int_t resid; /* [o] dxfer_len - actual_transferred */
3065 compat_uint_t duration; /* [o] time taken by cmd (unit: millisec) */
3066 compat_uint_t info; /* [o] auxiliary information */
3067 } sg_io_hdr32_t; /* 64 bytes long (on sparc32) */
3068
3069 typedef struct sg_iovec32 {
3070 compat_uint_t iov_base;
3071 compat_uint_t iov_len;
3072 } sg_iovec32_t;
3073
3074 static int sg_build_iovec(sg_io_hdr_t __user *sgio, void __user *dxferp, u16 iovec_count)
3075 {
3076 sg_iovec_t __user *iov = (sg_iovec_t __user *) (sgio + 1);
3077 sg_iovec32_t __user *iov32 = dxferp;
3078 int i;
3079
3080 for (i = 0; i < iovec_count; i++) {
3081 u32 base, len;
3082
3083 if (get_user(base, &iov32[i].iov_base) ||
3084 get_user(len, &iov32[i].iov_len) ||
3085 put_user(compat_ptr(base), &iov[i].iov_base) ||
3086 put_user(len, &iov[i].iov_len))
3087 return -EFAULT;
3088 }
3089
3090 if (put_user(iov, &sgio->dxferp))
3091 return -EFAULT;
3092 return 0;
3093 }
3094
3095 int nvme_sg_io32(struct nvme_ns *ns, unsigned long arg)
3096 {
3097 sg_io_hdr32_t __user *sgio32 = (sg_io_hdr32_t __user *)arg;
3098 sg_io_hdr_t __user *sgio;
3099 u16 iovec_count;
3100 u32 data;
3101 void __user *dxferp;
3102 int err;
3103 int interface_id;
3104
3105 if (get_user(interface_id, &sgio32->interface_id))
3106 return -EFAULT;
3107 if (interface_id != 'S')
3108 return -EINVAL;
3109
3110 if (get_user(iovec_count, &sgio32->iovec_count))
3111 return -EFAULT;
3112
3113 {
3114 void __user *top = compat_alloc_user_space(0);
3115 void __user *new = compat_alloc_user_space(sizeof(sg_io_hdr_t) +
3116 (iovec_count * sizeof(sg_iovec_t)));
3117 if (new > top)
3118 return -EINVAL;
3119
3120 sgio = new;
3121 }
3122
3123 /* Ok, now construct. */
3124 if (copy_in_user(&sgio->interface_id, &sgio32->interface_id,
3125 (2 * sizeof(int)) +
3126 (2 * sizeof(unsigned char)) +
3127 (1 * sizeof(unsigned short)) +
3128 (1 * sizeof(unsigned int))))
3129 return -EFAULT;
3130
3131 if (get_user(data, &sgio32->dxferp))
3132 return -EFAULT;
3133 dxferp = compat_ptr(data);
3134 if (iovec_count) {
3135 if (sg_build_iovec(sgio, dxferp, iovec_count))
3136 return -EFAULT;
3137 } else {
3138 if (put_user(dxferp, &sgio->dxferp))
3139 return -EFAULT;
3140 }
3141
3142 {
3143 unsigned char __user *cmdp;
3144 unsigned char __user *sbp;
3145
3146 if (get_user(data, &sgio32->cmdp))
3147 return -EFAULT;
3148 cmdp = compat_ptr(data);
3149
3150 if (get_user(data, &sgio32->sbp))
3151 return -EFAULT;
3152 sbp = compat_ptr(data);
3153
3154 if (put_user(cmdp, &sgio->cmdp) ||
3155 put_user(sbp, &sgio->sbp))
3156 return -EFAULT;
3157 }
3158
3159 if (copy_in_user(&sgio->timeout, &sgio32->timeout,
3160 3 * sizeof(int)))
3161 return -EFAULT;
3162
3163 if (get_user(data, &sgio32->usr_ptr))
3164 return -EFAULT;
3165 if (put_user(compat_ptr(data), &sgio->usr_ptr))
3166 return -EFAULT;
3167
3168 err = nvme_sg_io(ns, sgio);
3169 if (err >= 0) {
3170 void __user *datap;
3171
3172 if (copy_in_user(&sgio32->pack_id, &sgio->pack_id,
3173 sizeof(int)) ||
3174 get_user(datap, &sgio->usr_ptr) ||
3175 put_user((u32)(unsigned long)datap,
3176 &sgio32->usr_ptr) ||
3177 copy_in_user(&sgio32->status, &sgio->status,
3178 (4 * sizeof(unsigned char)) +
3179 (2 * sizeof(unsigned short)) +
3180 (3 * sizeof(int))))
3181 err = -EFAULT;
3182 }
3183
3184 return err;
3185 }
3186 #endif
3187
3188 int nvme_sg_get_version_num(int __user *ip)
3189 {
3190 return put_user(sg_version_num, ip);
3191 }
Linux with added FPC-III support