Merge branch 'core-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
[linux/fpc-iii.git] / drivers / power / avs / smartreflex.c
blobdb9973bb53f19efbf691bd12c87042b2246a374f
1 /*
2 * OMAP SmartReflex Voltage Control
4 * Author: Thara Gopinath <thara@ti.com>
6 * Copyright (C) 2012 Texas Instruments, Inc.
7 * Thara Gopinath <thara@ti.com>
9 * Copyright (C) 2008 Nokia Corporation
10 * Kalle Jokiniemi
12 * Copyright (C) 2007 Texas Instruments, Inc.
13 * Lesly A M <x0080970@ti.com>
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License version 2 as
17 * published by the Free Software Foundation.
20 #include <linux/module.h>
21 #include <linux/interrupt.h>
22 #include <linux/clk.h>
23 #include <linux/io.h>
24 #include <linux/debugfs.h>
25 #include <linux/delay.h>
26 #include <linux/slab.h>
27 #include <linux/pm_runtime.h>
28 #include <linux/power/smartreflex.h>
30 #define DRIVER_NAME "smartreflex"
31 #define SMARTREFLEX_NAME_LEN 32
32 #define NVALUE_NAME_LEN 40
33 #define SR_DISABLE_TIMEOUT 200
35 /* sr_list contains all the instances of smartreflex module */
36 static LIST_HEAD(sr_list);
38 static struct omap_sr_class_data *sr_class;
39 static struct omap_sr_pmic_data *sr_pmic_data;
40 static struct dentry *sr_dbg_dir;
42 static inline void sr_write_reg(struct omap_sr *sr, unsigned offset, u32 value)
44 __raw_writel(value, (sr->base + offset));
47 static inline void sr_modify_reg(struct omap_sr *sr, unsigned offset, u32 mask,
48 u32 value)
50 u32 reg_val;
53 * Smartreflex error config register is special as it contains
54 * certain status bits which if written a 1 into means a clear
55 * of those bits. So in order to make sure no accidental write of
56 * 1 happens to those status bits, do a clear of them in the read
57 * value. This mean this API doesn't rewrite values in these bits
58 * if they are currently set, but does allow the caller to write
59 * those bits.
61 if (sr->ip_type == SR_TYPE_V1 && offset == ERRCONFIG_V1)
62 mask |= ERRCONFIG_STATUS_V1_MASK;
63 else if (sr->ip_type == SR_TYPE_V2 && offset == ERRCONFIG_V2)
64 mask |= ERRCONFIG_VPBOUNDINTST_V2;
66 reg_val = __raw_readl(sr->base + offset);
67 reg_val &= ~mask;
69 value &= mask;
71 reg_val |= value;
73 __raw_writel(reg_val, (sr->base + offset));
76 static inline u32 sr_read_reg(struct omap_sr *sr, unsigned offset)
78 return __raw_readl(sr->base + offset);
81 static struct omap_sr *_sr_lookup(struct voltagedomain *voltdm)
83 struct omap_sr *sr_info;
85 if (!voltdm) {
86 pr_err("%s: Null voltage domain passed!\n", __func__);
87 return ERR_PTR(-EINVAL);
90 list_for_each_entry(sr_info, &sr_list, node) {
91 if (voltdm == sr_info->voltdm)
92 return sr_info;
95 return ERR_PTR(-ENODATA);
98 static irqreturn_t sr_interrupt(int irq, void *data)
100 struct omap_sr *sr_info = data;
101 u32 status = 0;
103 switch (sr_info->ip_type) {
104 case SR_TYPE_V1:
105 /* Read the status bits */
106 status = sr_read_reg(sr_info, ERRCONFIG_V1);
108 /* Clear them by writing back */
109 sr_write_reg(sr_info, ERRCONFIG_V1, status);
110 break;
111 case SR_TYPE_V2:
112 /* Read the status bits */
113 status = sr_read_reg(sr_info, IRQSTATUS);
115 /* Clear them by writing back */
116 sr_write_reg(sr_info, IRQSTATUS, status);
117 break;
118 default:
119 dev_err(&sr_info->pdev->dev, "UNKNOWN IP type %d\n",
120 sr_info->ip_type);
121 return IRQ_NONE;
124 if (sr_class->notify)
125 sr_class->notify(sr_info, status);
127 return IRQ_HANDLED;
130 static void sr_set_clk_length(struct omap_sr *sr)
132 struct clk *fck;
133 u32 fclk_speed;
135 fck = clk_get(&sr->pdev->dev, "fck");
137 if (IS_ERR(fck)) {
138 dev_err(&sr->pdev->dev, "%s: unable to get fck for device %s\n",
139 __func__, dev_name(&sr->pdev->dev));
140 return;
143 fclk_speed = clk_get_rate(fck);
144 clk_put(fck);
146 switch (fclk_speed) {
147 case 12000000:
148 sr->clk_length = SRCLKLENGTH_12MHZ_SYSCLK;
149 break;
150 case 13000000:
151 sr->clk_length = SRCLKLENGTH_13MHZ_SYSCLK;
152 break;
153 case 19200000:
154 sr->clk_length = SRCLKLENGTH_19MHZ_SYSCLK;
155 break;
156 case 26000000:
157 sr->clk_length = SRCLKLENGTH_26MHZ_SYSCLK;
158 break;
159 case 38400000:
160 sr->clk_length = SRCLKLENGTH_38MHZ_SYSCLK;
161 break;
162 default:
163 dev_err(&sr->pdev->dev, "%s: Invalid fclk rate: %d\n",
164 __func__, fclk_speed);
165 break;
169 static void sr_start_vddautocomp(struct omap_sr *sr)
171 if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) {
172 dev_warn(&sr->pdev->dev,
173 "%s: smartreflex class driver not registered\n",
174 __func__);
175 return;
178 if (!sr_class->enable(sr))
179 sr->autocomp_active = true;
182 static void sr_stop_vddautocomp(struct omap_sr *sr)
184 if (!sr_class || !(sr_class->disable)) {
185 dev_warn(&sr->pdev->dev,
186 "%s: smartreflex class driver not registered\n",
187 __func__);
188 return;
191 if (sr->autocomp_active) {
192 sr_class->disable(sr, 1);
193 sr->autocomp_active = false;
198 * This function handles the intializations which have to be done
199 * only when both sr device and class driver regiter has
200 * completed. This will be attempted to be called from both sr class
201 * driver register and sr device intializtion API's. Only one call
202 * will ultimately succeed.
204 * Currently this function registers interrupt handler for a particular SR
205 * if smartreflex class driver is already registered and has
206 * requested for interrupts and the SR interrupt line in present.
208 static int sr_late_init(struct omap_sr *sr_info)
210 struct omap_sr_data *pdata = sr_info->pdev->dev.platform_data;
211 int ret = 0;
213 if (sr_class->notify && sr_class->notify_flags && sr_info->irq) {
214 ret = devm_request_irq(&sr_info->pdev->dev, sr_info->irq,
215 sr_interrupt, 0, sr_info->name, sr_info);
216 if (ret)
217 goto error;
218 disable_irq(sr_info->irq);
221 if (pdata && pdata->enable_on_init)
222 sr_start_vddautocomp(sr_info);
224 return ret;
226 error:
227 list_del(&sr_info->node);
228 dev_err(&sr_info->pdev->dev, "%s: ERROR in registering"
229 "interrupt handler. Smartreflex will"
230 "not function as desired\n", __func__);
232 return ret;
235 static void sr_v1_disable(struct omap_sr *sr)
237 int timeout = 0;
238 int errconf_val = ERRCONFIG_MCUACCUMINTST | ERRCONFIG_MCUVALIDINTST |
239 ERRCONFIG_MCUBOUNDINTST;
241 /* Enable MCUDisableAcknowledge interrupt */
242 sr_modify_reg(sr, ERRCONFIG_V1,
243 ERRCONFIG_MCUDISACKINTEN, ERRCONFIG_MCUDISACKINTEN);
245 /* SRCONFIG - disable SR */
246 sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0);
248 /* Disable all other SR interrupts and clear the status as needed */
249 if (sr_read_reg(sr, ERRCONFIG_V1) & ERRCONFIG_VPBOUNDINTST_V1)
250 errconf_val |= ERRCONFIG_VPBOUNDINTST_V1;
251 sr_modify_reg(sr, ERRCONFIG_V1,
252 (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN |
253 ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_VPBOUNDINTEN_V1),
254 errconf_val);
257 * Wait for SR to be disabled.
258 * wait until ERRCONFIG.MCUDISACKINTST = 1. Typical latency is 1us.
260 sr_test_cond_timeout((sr_read_reg(sr, ERRCONFIG_V1) &
261 ERRCONFIG_MCUDISACKINTST), SR_DISABLE_TIMEOUT,
262 timeout);
264 if (timeout >= SR_DISABLE_TIMEOUT)
265 dev_warn(&sr->pdev->dev, "%s: Smartreflex disable timedout\n",
266 __func__);
268 /* Disable MCUDisableAcknowledge interrupt & clear pending interrupt */
269 sr_modify_reg(sr, ERRCONFIG_V1, ERRCONFIG_MCUDISACKINTEN,
270 ERRCONFIG_MCUDISACKINTST);
273 static void sr_v2_disable(struct omap_sr *sr)
275 int timeout = 0;
277 /* Enable MCUDisableAcknowledge interrupt */
278 sr_write_reg(sr, IRQENABLE_SET, IRQENABLE_MCUDISABLEACKINT);
280 /* SRCONFIG - disable SR */
281 sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0);
284 * Disable all other SR interrupts and clear the status
285 * write to status register ONLY on need basis - only if status
286 * is set.
288 if (sr_read_reg(sr, ERRCONFIG_V2) & ERRCONFIG_VPBOUNDINTST_V2)
289 sr_modify_reg(sr, ERRCONFIG_V2, ERRCONFIG_VPBOUNDINTEN_V2,
290 ERRCONFIG_VPBOUNDINTST_V2);
291 else
292 sr_modify_reg(sr, ERRCONFIG_V2, ERRCONFIG_VPBOUNDINTEN_V2,
293 0x0);
294 sr_write_reg(sr, IRQENABLE_CLR, (IRQENABLE_MCUACCUMINT |
295 IRQENABLE_MCUVALIDINT |
296 IRQENABLE_MCUBOUNDSINT));
297 sr_write_reg(sr, IRQSTATUS, (IRQSTATUS_MCUACCUMINT |
298 IRQSTATUS_MCVALIDINT |
299 IRQSTATUS_MCBOUNDSINT));
302 * Wait for SR to be disabled.
303 * wait until IRQSTATUS.MCUDISACKINTST = 1. Typical latency is 1us.
305 sr_test_cond_timeout((sr_read_reg(sr, IRQSTATUS) &
306 IRQSTATUS_MCUDISABLEACKINT), SR_DISABLE_TIMEOUT,
307 timeout);
309 if (timeout >= SR_DISABLE_TIMEOUT)
310 dev_warn(&sr->pdev->dev, "%s: Smartreflex disable timedout\n",
311 __func__);
313 /* Disable MCUDisableAcknowledge interrupt & clear pending interrupt */
314 sr_write_reg(sr, IRQENABLE_CLR, IRQENABLE_MCUDISABLEACKINT);
315 sr_write_reg(sr, IRQSTATUS, IRQSTATUS_MCUDISABLEACKINT);
318 static struct omap_sr_nvalue_table *sr_retrieve_nvalue_row(
319 struct omap_sr *sr, u32 efuse_offs)
321 int i;
323 if (!sr->nvalue_table) {
324 dev_warn(&sr->pdev->dev, "%s: Missing ntarget value table\n",
325 __func__);
326 return NULL;
329 for (i = 0; i < sr->nvalue_count; i++) {
330 if (sr->nvalue_table[i].efuse_offs == efuse_offs)
331 return &sr->nvalue_table[i];
334 return NULL;
337 /* Public Functions */
340 * sr_configure_errgen() - Configures the SmartReflex to perform AVS using the
341 * error generator module.
342 * @sr: SR module to be configured.
344 * This API is to be called from the smartreflex class driver to
345 * configure the error generator module inside the smartreflex module.
346 * SR settings if using the ERROR module inside Smartreflex.
347 * SR CLASS 3 by default uses only the ERROR module where as
348 * SR CLASS 2 can choose between ERROR module and MINMAXAVG
349 * module. Returns 0 on success and error value in case of failure.
351 int sr_configure_errgen(struct omap_sr *sr)
353 u32 sr_config, sr_errconfig, errconfig_offs;
354 u32 vpboundint_en, vpboundint_st;
355 u32 senp_en = 0, senn_en = 0;
356 u8 senp_shift, senn_shift;
358 if (!sr) {
359 pr_warn("%s: NULL omap_sr from %pF\n", __func__,
360 (void *)_RET_IP_);
361 return -EINVAL;
364 if (!sr->clk_length)
365 sr_set_clk_length(sr);
367 senp_en = sr->senp_mod;
368 senn_en = sr->senn_mod;
370 sr_config = (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) |
371 SRCONFIG_SENENABLE | SRCONFIG_ERRGEN_EN;
373 switch (sr->ip_type) {
374 case SR_TYPE_V1:
375 sr_config |= SRCONFIG_DELAYCTRL;
376 senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT;
377 senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT;
378 errconfig_offs = ERRCONFIG_V1;
379 vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V1;
380 vpboundint_st = ERRCONFIG_VPBOUNDINTST_V1;
381 break;
382 case SR_TYPE_V2:
383 senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT;
384 senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT;
385 errconfig_offs = ERRCONFIG_V2;
386 vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V2;
387 vpboundint_st = ERRCONFIG_VPBOUNDINTST_V2;
388 break;
389 default:
390 dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex"
391 "module without specifying the ip\n", __func__);
392 return -EINVAL;
395 sr_config |= ((senn_en << senn_shift) | (senp_en << senp_shift));
396 sr_write_reg(sr, SRCONFIG, sr_config);
397 sr_errconfig = (sr->err_weight << ERRCONFIG_ERRWEIGHT_SHIFT) |
398 (sr->err_maxlimit << ERRCONFIG_ERRMAXLIMIT_SHIFT) |
399 (sr->err_minlimit << ERRCONFIG_ERRMINLIMIT_SHIFT);
400 sr_modify_reg(sr, errconfig_offs, (SR_ERRWEIGHT_MASK |
401 SR_ERRMAXLIMIT_MASK | SR_ERRMINLIMIT_MASK),
402 sr_errconfig);
404 /* Enabling the interrupts if the ERROR module is used */
405 sr_modify_reg(sr, errconfig_offs, (vpboundint_en | vpboundint_st),
406 vpboundint_en);
408 return 0;
412 * sr_disable_errgen() - Disables SmartReflex AVS module's errgen component
413 * @sr: SR module to be configured.
415 * This API is to be called from the smartreflex class driver to
416 * disable the error generator module inside the smartreflex module.
418 * Returns 0 on success and error value in case of failure.
420 int sr_disable_errgen(struct omap_sr *sr)
422 u32 errconfig_offs;
423 u32 vpboundint_en, vpboundint_st;
425 if (!sr) {
426 pr_warn("%s: NULL omap_sr from %pF\n", __func__,
427 (void *)_RET_IP_);
428 return -EINVAL;
431 switch (sr->ip_type) {
432 case SR_TYPE_V1:
433 errconfig_offs = ERRCONFIG_V1;
434 vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V1;
435 vpboundint_st = ERRCONFIG_VPBOUNDINTST_V1;
436 break;
437 case SR_TYPE_V2:
438 errconfig_offs = ERRCONFIG_V2;
439 vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V2;
440 vpboundint_st = ERRCONFIG_VPBOUNDINTST_V2;
441 break;
442 default:
443 dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex"
444 "module without specifying the ip\n", __func__);
445 return -EINVAL;
448 /* Disable the Sensor and errorgen */
449 sr_modify_reg(sr, SRCONFIG, SRCONFIG_SENENABLE | SRCONFIG_ERRGEN_EN, 0);
452 * Disable the interrupts of ERROR module
453 * NOTE: modify is a read, modify,write - an implicit OCP barrier
454 * which is required is present here - sequencing is critical
455 * at this point (after errgen is disabled, vpboundint disable)
457 sr_modify_reg(sr, errconfig_offs, vpboundint_en | vpboundint_st, 0);
459 return 0;
463 * sr_configure_minmax() - Configures the SmartReflex to perform AVS using the
464 * minmaxavg module.
465 * @sr: SR module to be configured.
467 * This API is to be called from the smartreflex class driver to
468 * configure the minmaxavg module inside the smartreflex module.
469 * SR settings if using the ERROR module inside Smartreflex.
470 * SR CLASS 3 by default uses only the ERROR module where as
471 * SR CLASS 2 can choose between ERROR module and MINMAXAVG
472 * module. Returns 0 on success and error value in case of failure.
474 int sr_configure_minmax(struct omap_sr *sr)
476 u32 sr_config, sr_avgwt;
477 u32 senp_en = 0, senn_en = 0;
478 u8 senp_shift, senn_shift;
480 if (!sr) {
481 pr_warn("%s: NULL omap_sr from %pF\n", __func__,
482 (void *)_RET_IP_);
483 return -EINVAL;
486 if (!sr->clk_length)
487 sr_set_clk_length(sr);
489 senp_en = sr->senp_mod;
490 senn_en = sr->senn_mod;
492 sr_config = (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) |
493 SRCONFIG_SENENABLE |
494 (sr->accum_data << SRCONFIG_ACCUMDATA_SHIFT);
496 switch (sr->ip_type) {
497 case SR_TYPE_V1:
498 sr_config |= SRCONFIG_DELAYCTRL;
499 senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT;
500 senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT;
501 break;
502 case SR_TYPE_V2:
503 senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT;
504 senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT;
505 break;
506 default:
507 dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex"
508 "module without specifying the ip\n", __func__);
509 return -EINVAL;
512 sr_config |= ((senn_en << senn_shift) | (senp_en << senp_shift));
513 sr_write_reg(sr, SRCONFIG, sr_config);
514 sr_avgwt = (sr->senp_avgweight << AVGWEIGHT_SENPAVGWEIGHT_SHIFT) |
515 (sr->senn_avgweight << AVGWEIGHT_SENNAVGWEIGHT_SHIFT);
516 sr_write_reg(sr, AVGWEIGHT, sr_avgwt);
519 * Enabling the interrupts if MINMAXAVG module is used.
520 * TODO: check if all the interrupts are mandatory
522 switch (sr->ip_type) {
523 case SR_TYPE_V1:
524 sr_modify_reg(sr, ERRCONFIG_V1,
525 (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN |
526 ERRCONFIG_MCUBOUNDINTEN),
527 (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUACCUMINTST |
528 ERRCONFIG_MCUVALIDINTEN | ERRCONFIG_MCUVALIDINTST |
529 ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_MCUBOUNDINTST));
530 break;
531 case SR_TYPE_V2:
532 sr_write_reg(sr, IRQSTATUS,
533 IRQSTATUS_MCUACCUMINT | IRQSTATUS_MCVALIDINT |
534 IRQSTATUS_MCBOUNDSINT | IRQSTATUS_MCUDISABLEACKINT);
535 sr_write_reg(sr, IRQENABLE_SET,
536 IRQENABLE_MCUACCUMINT | IRQENABLE_MCUVALIDINT |
537 IRQENABLE_MCUBOUNDSINT | IRQENABLE_MCUDISABLEACKINT);
538 break;
539 default:
540 dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex"
541 "module without specifying the ip\n", __func__);
542 return -EINVAL;
545 return 0;
549 * sr_enable() - Enables the smartreflex module.
550 * @sr: pointer to which the SR module to be configured belongs to.
551 * @volt: The voltage at which the Voltage domain associated with
552 * the smartreflex module is operating at.
553 * This is required only to program the correct Ntarget value.
555 * This API is to be called from the smartreflex class driver to
556 * enable a smartreflex module. Returns 0 on success. Returns error
557 * value if the voltage passed is wrong or if ntarget value is wrong.
559 int sr_enable(struct omap_sr *sr, unsigned long volt)
561 struct omap_volt_data *volt_data;
562 struct omap_sr_nvalue_table *nvalue_row;
563 int ret;
565 if (!sr) {
566 pr_warn("%s: NULL omap_sr from %pF\n", __func__,
567 (void *)_RET_IP_);
568 return -EINVAL;
571 volt_data = omap_voltage_get_voltdata(sr->voltdm, volt);
573 if (IS_ERR(volt_data)) {
574 dev_warn(&sr->pdev->dev, "%s: Unable to get voltage table"
575 "for nominal voltage %ld\n", __func__, volt);
576 return PTR_ERR(volt_data);
579 nvalue_row = sr_retrieve_nvalue_row(sr, volt_data->sr_efuse_offs);
581 if (!nvalue_row) {
582 dev_warn(&sr->pdev->dev, "%s: failure getting SR data for this voltage %ld\n",
583 __func__, volt);
584 return -ENODATA;
587 /* errminlimit is opp dependent and hence linked to voltage */
588 sr->err_minlimit = nvalue_row->errminlimit;
590 pm_runtime_get_sync(&sr->pdev->dev);
592 /* Check if SR is already enabled. If yes do nothing */
593 if (sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE)
594 return 0;
596 /* Configure SR */
597 ret = sr_class->configure(sr);
598 if (ret)
599 return ret;
601 sr_write_reg(sr, NVALUERECIPROCAL, nvalue_row->nvalue);
603 /* SRCONFIG - enable SR */
604 sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, SRCONFIG_SRENABLE);
605 return 0;
609 * sr_disable() - Disables the smartreflex module.
610 * @sr: pointer to which the SR module to be configured belongs to.
612 * This API is to be called from the smartreflex class driver to
613 * disable a smartreflex module.
615 void sr_disable(struct omap_sr *sr)
617 if (!sr) {
618 pr_warn("%s: NULL omap_sr from %pF\n", __func__,
619 (void *)_RET_IP_);
620 return;
623 /* Check if SR clocks are already disabled. If yes do nothing */
624 if (pm_runtime_suspended(&sr->pdev->dev))
625 return;
628 * Disable SR if only it is indeed enabled. Else just
629 * disable the clocks.
631 if (sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE) {
632 switch (sr->ip_type) {
633 case SR_TYPE_V1:
634 sr_v1_disable(sr);
635 break;
636 case SR_TYPE_V2:
637 sr_v2_disable(sr);
638 break;
639 default:
640 dev_err(&sr->pdev->dev, "UNKNOWN IP type %d\n",
641 sr->ip_type);
645 pm_runtime_put_sync_suspend(&sr->pdev->dev);
649 * sr_register_class() - API to register a smartreflex class parameters.
650 * @class_data: The structure containing various sr class specific data.
652 * This API is to be called by the smartreflex class driver to register itself
653 * with the smartreflex driver during init. Returns 0 on success else the
654 * error value.
656 int sr_register_class(struct omap_sr_class_data *class_data)
658 struct omap_sr *sr_info;
660 if (!class_data) {
661 pr_warning("%s:, Smartreflex class data passed is NULL\n",
662 __func__);
663 return -EINVAL;
666 if (sr_class) {
667 pr_warning("%s: Smartreflex class driver already registered\n",
668 __func__);
669 return -EBUSY;
672 sr_class = class_data;
675 * Call into late init to do intializations that require
676 * both sr driver and sr class driver to be initiallized.
678 list_for_each_entry(sr_info, &sr_list, node)
679 sr_late_init(sr_info);
681 return 0;
685 * omap_sr_enable() - API to enable SR clocks and to call into the
686 * registered smartreflex class enable API.
687 * @voltdm: VDD pointer to which the SR module to be configured belongs to.
689 * This API is to be called from the kernel in order to enable
690 * a particular smartreflex module. This API will do the initial
691 * configurations to turn on the smartreflex module and in turn call
692 * into the registered smartreflex class enable API.
694 void omap_sr_enable(struct voltagedomain *voltdm)
696 struct omap_sr *sr = _sr_lookup(voltdm);
698 if (IS_ERR(sr)) {
699 pr_warning("%s: omap_sr struct for voltdm not found\n", __func__);
700 return;
703 if (!sr->autocomp_active)
704 return;
706 if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) {
707 dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not"
708 "registered\n", __func__);
709 return;
712 sr_class->enable(sr);
716 * omap_sr_disable() - API to disable SR without resetting the voltage
717 * processor voltage
718 * @voltdm: VDD pointer to which the SR module to be configured belongs to.
720 * This API is to be called from the kernel in order to disable
721 * a particular smartreflex module. This API will in turn call
722 * into the registered smartreflex class disable API. This API will tell
723 * the smartreflex class disable not to reset the VP voltage after
724 * disabling smartreflex.
726 void omap_sr_disable(struct voltagedomain *voltdm)
728 struct omap_sr *sr = _sr_lookup(voltdm);
730 if (IS_ERR(sr)) {
731 pr_warning("%s: omap_sr struct for voltdm not found\n", __func__);
732 return;
735 if (!sr->autocomp_active)
736 return;
738 if (!sr_class || !(sr_class->disable)) {
739 dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not"
740 "registered\n", __func__);
741 return;
744 sr_class->disable(sr, 0);
748 * omap_sr_disable_reset_volt() - API to disable SR and reset the
749 * voltage processor voltage
750 * @voltdm: VDD pointer to which the SR module to be configured belongs to.
752 * This API is to be called from the kernel in order to disable
753 * a particular smartreflex module. This API will in turn call
754 * into the registered smartreflex class disable API. This API will tell
755 * the smartreflex class disable to reset the VP voltage after
756 * disabling smartreflex.
758 void omap_sr_disable_reset_volt(struct voltagedomain *voltdm)
760 struct omap_sr *sr = _sr_lookup(voltdm);
762 if (IS_ERR(sr)) {
763 pr_warning("%s: omap_sr struct for voltdm not found\n", __func__);
764 return;
767 if (!sr->autocomp_active)
768 return;
770 if (!sr_class || !(sr_class->disable)) {
771 dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not"
772 "registered\n", __func__);
773 return;
776 sr_class->disable(sr, 1);
780 * omap_sr_register_pmic() - API to register pmic specific info.
781 * @pmic_data: The structure containing pmic specific data.
783 * This API is to be called from the PMIC specific code to register with
784 * smartreflex driver pmic specific info. Currently the only info required
785 * is the smartreflex init on the PMIC side.
787 void omap_sr_register_pmic(struct omap_sr_pmic_data *pmic_data)
789 if (!pmic_data) {
790 pr_warning("%s: Trying to register NULL PMIC data structure"
791 "with smartreflex\n", __func__);
792 return;
795 sr_pmic_data = pmic_data;
798 /* PM Debug FS entries to enable and disable smartreflex. */
799 static int omap_sr_autocomp_show(void *data, u64 *val)
801 struct omap_sr *sr_info = data;
803 if (!sr_info) {
804 pr_warning("%s: omap_sr struct not found\n", __func__);
805 return -EINVAL;
808 *val = sr_info->autocomp_active;
810 return 0;
813 static int omap_sr_autocomp_store(void *data, u64 val)
815 struct omap_sr *sr_info = data;
817 if (!sr_info) {
818 pr_warning("%s: omap_sr struct not found\n", __func__);
819 return -EINVAL;
822 /* Sanity check */
823 if (val > 1) {
824 pr_warning("%s: Invalid argument %lld\n", __func__, val);
825 return -EINVAL;
828 /* control enable/disable only if there is a delta in value */
829 if (sr_info->autocomp_active != val) {
830 if (!val)
831 sr_stop_vddautocomp(sr_info);
832 else
833 sr_start_vddautocomp(sr_info);
836 return 0;
839 DEFINE_SIMPLE_ATTRIBUTE(pm_sr_fops, omap_sr_autocomp_show,
840 omap_sr_autocomp_store, "%llu\n");
842 static int __init omap_sr_probe(struct platform_device *pdev)
844 struct omap_sr *sr_info;
845 struct omap_sr_data *pdata = pdev->dev.platform_data;
846 struct resource *mem, *irq;
847 struct dentry *nvalue_dir;
848 int i, ret = 0;
850 sr_info = devm_kzalloc(&pdev->dev, sizeof(struct omap_sr), GFP_KERNEL);
851 if (!sr_info) {
852 dev_err(&pdev->dev, "%s: unable to allocate sr_info\n",
853 __func__);
854 return -ENOMEM;
857 sr_info->name = devm_kzalloc(&pdev->dev,
858 SMARTREFLEX_NAME_LEN, GFP_KERNEL);
859 if (!sr_info->name) {
860 dev_err(&pdev->dev, "%s: unable to allocate SR instance name\n",
861 __func__);
862 return -ENOMEM;
865 platform_set_drvdata(pdev, sr_info);
867 if (!pdata) {
868 dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
869 return -EINVAL;
872 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
873 sr_info->base = devm_ioremap_resource(&pdev->dev, mem);
874 if (IS_ERR(sr_info->base)) {
875 dev_err(&pdev->dev, "%s: ioremap fail\n", __func__);
876 return PTR_ERR(sr_info->base);
879 irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
881 pm_runtime_enable(&pdev->dev);
882 pm_runtime_irq_safe(&pdev->dev);
884 snprintf(sr_info->name, SMARTREFLEX_NAME_LEN, "%s", pdata->name);
886 sr_info->pdev = pdev;
887 sr_info->srid = pdev->id;
888 sr_info->voltdm = pdata->voltdm;
889 sr_info->nvalue_table = pdata->nvalue_table;
890 sr_info->nvalue_count = pdata->nvalue_count;
891 sr_info->senn_mod = pdata->senn_mod;
892 sr_info->senp_mod = pdata->senp_mod;
893 sr_info->err_weight = pdata->err_weight;
894 sr_info->err_maxlimit = pdata->err_maxlimit;
895 sr_info->accum_data = pdata->accum_data;
896 sr_info->senn_avgweight = pdata->senn_avgweight;
897 sr_info->senp_avgweight = pdata->senp_avgweight;
898 sr_info->autocomp_active = false;
899 sr_info->ip_type = pdata->ip_type;
901 if (irq)
902 sr_info->irq = irq->start;
904 sr_set_clk_length(sr_info);
906 list_add(&sr_info->node, &sr_list);
909 * Call into late init to do intializations that require
910 * both sr driver and sr class driver to be initiallized.
912 if (sr_class) {
913 ret = sr_late_init(sr_info);
914 if (ret) {
915 pr_warning("%s: Error in SR late init\n", __func__);
916 goto err_list_del;
920 dev_info(&pdev->dev, "%s: SmartReflex driver initialized\n", __func__);
921 if (!sr_dbg_dir) {
922 sr_dbg_dir = debugfs_create_dir("smartreflex", NULL);
923 if (IS_ERR_OR_NULL(sr_dbg_dir)) {
924 ret = PTR_ERR(sr_dbg_dir);
925 pr_err("%s:sr debugfs dir creation failed(%d)\n",
926 __func__, ret);
927 goto err_list_del;
931 sr_info->dbg_dir = debugfs_create_dir(sr_info->name, sr_dbg_dir);
932 if (IS_ERR_OR_NULL(sr_info->dbg_dir)) {
933 dev_err(&pdev->dev, "%s: Unable to create debugfs directory\n",
934 __func__);
935 ret = PTR_ERR(sr_info->dbg_dir);
936 goto err_debugfs;
939 (void) debugfs_create_file("autocomp", S_IRUGO | S_IWUSR,
940 sr_info->dbg_dir, (void *)sr_info, &pm_sr_fops);
941 (void) debugfs_create_x32("errweight", S_IRUGO, sr_info->dbg_dir,
942 &sr_info->err_weight);
943 (void) debugfs_create_x32("errmaxlimit", S_IRUGO, sr_info->dbg_dir,
944 &sr_info->err_maxlimit);
946 nvalue_dir = debugfs_create_dir("nvalue", sr_info->dbg_dir);
947 if (IS_ERR_OR_NULL(nvalue_dir)) {
948 dev_err(&pdev->dev, "%s: Unable to create debugfs directory"
949 "for n-values\n", __func__);
950 ret = PTR_ERR(nvalue_dir);
951 goto err_debugfs;
954 if (sr_info->nvalue_count == 0 || !sr_info->nvalue_table) {
955 dev_warn(&pdev->dev, "%s: %s: No Voltage table for the corresponding vdd. Cannot create debugfs entries for n-values\n",
956 __func__, sr_info->name);
958 ret = -ENODATA;
959 goto err_debugfs;
962 for (i = 0; i < sr_info->nvalue_count; i++) {
963 char name[NVALUE_NAME_LEN + 1];
965 snprintf(name, sizeof(name), "volt_%lu",
966 sr_info->nvalue_table[i].volt_nominal);
967 (void) debugfs_create_x32(name, S_IRUGO | S_IWUSR, nvalue_dir,
968 &(sr_info->nvalue_table[i].nvalue));
969 snprintf(name, sizeof(name), "errminlimit_%lu",
970 sr_info->nvalue_table[i].volt_nominal);
971 (void) debugfs_create_x32(name, S_IRUGO | S_IWUSR, nvalue_dir,
972 &(sr_info->nvalue_table[i].errminlimit));
976 return ret;
978 err_debugfs:
979 debugfs_remove_recursive(sr_info->dbg_dir);
980 err_list_del:
981 list_del(&sr_info->node);
982 return ret;
985 static int omap_sr_remove(struct platform_device *pdev)
987 struct omap_sr_data *pdata = pdev->dev.platform_data;
988 struct omap_sr *sr_info;
990 if (!pdata) {
991 dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
992 return -EINVAL;
995 sr_info = _sr_lookup(pdata->voltdm);
996 if (IS_ERR(sr_info)) {
997 dev_warn(&pdev->dev, "%s: omap_sr struct not found\n",
998 __func__);
999 return PTR_ERR(sr_info);
1002 if (sr_info->autocomp_active)
1003 sr_stop_vddautocomp(sr_info);
1004 if (sr_info->dbg_dir)
1005 debugfs_remove_recursive(sr_info->dbg_dir);
1007 pm_runtime_disable(&pdev->dev);
1008 list_del(&sr_info->node);
1009 return 0;
1012 static void omap_sr_shutdown(struct platform_device *pdev)
1014 struct omap_sr_data *pdata = pdev->dev.platform_data;
1015 struct omap_sr *sr_info;
1017 if (!pdata) {
1018 dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
1019 return;
1022 sr_info = _sr_lookup(pdata->voltdm);
1023 if (IS_ERR(sr_info)) {
1024 dev_warn(&pdev->dev, "%s: omap_sr struct not found\n",
1025 __func__);
1026 return;
1029 if (sr_info->autocomp_active)
1030 sr_stop_vddautocomp(sr_info);
1032 return;
1035 static struct platform_driver smartreflex_driver = {
1036 .remove = omap_sr_remove,
1037 .shutdown = omap_sr_shutdown,
1038 .driver = {
1039 .name = DRIVER_NAME,
1043 static int __init sr_init(void)
1045 int ret = 0;
1048 * sr_init is a late init. If by then a pmic specific API is not
1049 * registered either there is no need for anything to be done on
1050 * the PMIC side or somebody has forgotten to register a PMIC
1051 * handler. Warn for the second condition.
1053 if (sr_pmic_data && sr_pmic_data->sr_pmic_init)
1054 sr_pmic_data->sr_pmic_init();
1055 else
1056 pr_warning("%s: No PMIC hook to init smartreflex\n", __func__);
1058 ret = platform_driver_probe(&smartreflex_driver, omap_sr_probe);
1059 if (ret) {
1060 pr_err("%s: platform driver register failed for SR\n",
1061 __func__);
1062 return ret;
1065 return 0;
1067 late_initcall(sr_init);
1069 static void __exit sr_exit(void)
1071 platform_driver_unregister(&smartreflex_driver);
1073 module_exit(sr_exit);
1075 MODULE_DESCRIPTION("OMAP Smartreflex Driver");
1076 MODULE_LICENSE("GPL");
1077 MODULE_ALIAS("platform:" DRIVER_NAME);
1078 MODULE_AUTHOR("Texas Instruments Inc");