of: MSI: Simplify irqdomain lookup
[linux/fpc-iii.git] / arch / arm / include / asm / smp_plat.h
blobf9080717fc88c6dd4f3e79e40a426de22100d8db
1 /*
2 * ARM specific SMP header, this contains our implementation
3 * details.
4 */
5 #ifndef __ASMARM_SMP_PLAT_H
6 #define __ASMARM_SMP_PLAT_H
8 #include <linux/cpumask.h>
9 #include <linux/err.h>
11 #include <asm/cpu.h>
12 #include <asm/cputype.h>
15 * Return true if we are running on a SMP platform
17 static inline bool is_smp(void)
19 #ifndef CONFIG_SMP
20 return false;
21 #elif defined(CONFIG_SMP_ON_UP)
22 extern unsigned int smp_on_up;
23 return !!smp_on_up;
24 #else
25 return true;
26 #endif
29 /**
30 * smp_cpuid_part() - return part id for a given cpu
31 * @cpu: logical cpu id.
33 * Return: part id of logical cpu passed as argument.
35 static inline unsigned int smp_cpuid_part(int cpu)
37 struct cpuinfo_arm *cpu_info = &per_cpu(cpu_data, cpu);
39 return is_smp() ? cpu_info->cpuid & ARM_CPU_PART_MASK :
40 read_cpuid_part();
43 /* all SMP configurations have the extended CPUID registers */
44 #ifndef CONFIG_MMU
45 #define tlb_ops_need_broadcast() 0
46 #else
47 static inline int tlb_ops_need_broadcast(void)
49 if (!is_smp())
50 return 0;
52 return ((read_cpuid_ext(CPUID_EXT_MMFR3) >> 12) & 0xf) < 2;
54 #endif
56 #if !defined(CONFIG_SMP) || __LINUX_ARM_ARCH__ >= 7
57 #define cache_ops_need_broadcast() 0
58 #else
59 static inline int cache_ops_need_broadcast(void)
61 if (!is_smp())
62 return 0;
64 return ((read_cpuid_ext(CPUID_EXT_MMFR3) >> 12) & 0xf) < 1;
66 #endif
69 * Logical CPU mapping.
71 extern u32 __cpu_logical_map[];
72 #define cpu_logical_map(cpu) __cpu_logical_map[cpu]
74 * Retrieve logical cpu index corresponding to a given MPIDR[23:0]
75 * - mpidr: MPIDR[23:0] to be used for the look-up
77 * Returns the cpu logical index or -EINVAL on look-up error
79 static inline int get_logical_index(u32 mpidr)
81 int cpu;
82 for (cpu = 0; cpu < nr_cpu_ids; cpu++)
83 if (cpu_logical_map(cpu) == mpidr)
84 return cpu;
85 return -EINVAL;
89 * NOTE ! Assembly code relies on the following
90 * structure memory layout in order to carry out load
91 * multiple from its base address. For more
92 * information check arch/arm/kernel/sleep.S
94 struct mpidr_hash {
95 u32 mask; /* used by sleep.S */
96 u32 shift_aff[3]; /* used by sleep.S */
97 u32 bits;
100 extern struct mpidr_hash mpidr_hash;
102 static inline u32 mpidr_hash_size(void)
104 return 1 << mpidr_hash.bits;
107 extern int platform_can_secondary_boot(void);
108 extern int platform_can_cpu_hotplug(void);
110 #ifdef CONFIG_HOTPLUG_CPU
111 extern int platform_can_hotplug_cpu(unsigned int cpu);
112 #else
113 static inline int platform_can_hotplug_cpu(unsigned int cpu)
115 return 0;
117 #endif
119 #endif