2 * Debugging macro include header
4 * Copyright (C) 1994-1999 Russell King
5 * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
13 #include <linux/serial_reg.h>
15 /* OMAP2 serial ports */
16 #define OMAP2_UART1_BASE 0x4806a000
17 #define OMAP2_UART2_BASE 0x4806c000
18 #define OMAP2_UART3_BASE 0x4806e000
20 /* OMAP3 serial ports */
21 #define OMAP3_UART1_BASE OMAP2_UART1_BASE
22 #define OMAP3_UART2_BASE OMAP2_UART2_BASE
23 #define OMAP3_UART3_BASE 0x49020000
24 #define OMAP3_UART4_BASE 0x49042000 /* Only on 36xx */
25 #define OMAP3_UART4_AM35XX_BASE 0x4809E000 /* Only on AM35xx */
27 /* OMAP4 serial ports */
28 #define OMAP4_UART1_BASE OMAP2_UART1_BASE
29 #define OMAP4_UART2_BASE OMAP2_UART2_BASE
30 #define OMAP4_UART3_BASE 0x48020000
31 #define OMAP4_UART4_BASE 0x4806e000
33 /* TI81XX serial ports */
34 #define TI81XX_UART1_BASE 0x48020000
35 #define TI81XX_UART2_BASE 0x48022000
36 #define TI81XX_UART3_BASE 0x48024000
38 /* AM3505/3517 UART4 */
39 #define AM35XX_UART4_BASE 0x4809E000 /* Only on AM3505/3517 */
41 /* AM33XX serial port */
42 #define AM33XX_UART1_BASE 0x44E09000
44 /* OMAP5 serial ports */
45 #define OMAP5_UART1_BASE OMAP2_UART1_BASE
46 #define OMAP5_UART2_BASE OMAP2_UART2_BASE
47 #define OMAP5_UART3_BASE OMAP4_UART3_BASE
48 #define OMAP5_UART4_BASE OMAP4_UART4_BASE
49 #define OMAP5_UART5_BASE 0x48066000
50 #define OMAP5_UART6_BASE 0x48068000
52 /* External port on Zoom2/3 */
53 #define ZOOM_UART_BASE 0x10000000
54 #define ZOOM_UART_VIRT 0xfa400000
56 #define OMAP_PORT_SHIFT 2
57 #define ZOOM_PORT_SHIFT 1
59 #define UART_OFFSET(addr) ((addr) & 0x00ffffff)
62 omap_uart_phys: .word 0
63 omap_uart_virt: .word 0
64 omap_uart_lsr: .word 0
67 .macro addruart, rp, rv, tmp
69 /* Use omap_uart_phys/virt if already configured */
70 10: adr \rp, 99f @ get effective addr of 99f
71 ldr \rv, [\rp] @ get absolute addr of 99f
72 sub \rv, \rv, \rp @ offset between the two
73 ldr \rp, [\rp, #4] @ abs addr of omap_uart_phys
74 sub \tmp, \rp, \rv @ make it effective
75 ldr \rp, [\tmp, #0] @ omap_uart_phys
76 ldr \rv, [\tmp, #4] @ omap_uart_virt
77 cmp \rp, #0 @ is port configured?
79 bne 100f @ already configured
81 /* Configure the UART offset from the phys/virt base */
82 #ifdef CONFIG_DEBUG_OMAP2UART1
83 mov \rp, #UART_OFFSET(OMAP2_UART1_BASE) @ omap2/3/4
86 #ifdef CONFIG_DEBUG_OMAP2UART2
87 mov \rp, #UART_OFFSET(OMAP2_UART2_BASE) @ omap2/3/4
90 #ifdef CONFIG_DEBUG_OMAP2UART3
91 mov \rp, #UART_OFFSET(OMAP2_UART3_BASE)
94 #ifdef CONFIG_DEBUG_OMAP3UART3
95 mov \rp, #UART_OFFSET(OMAP3_UART1_BASE)
96 add \rp, \rp, #0x00fb0000
97 add \rp, \rp, #0x00006000 @ OMAP3_UART3_BASE
100 #ifdef CONFIG_DEBUG_OMAP4UART3
101 mov \rp, #UART_OFFSET(OMAP4_UART3_BASE)
104 #ifdef CONFIG_DEBUG_OMAP3UART4
105 mov \rp, #UART_OFFSET(OMAP3_UART1_BASE)
106 add \rp, \rp, #0x00fb0000
107 add \rp, \rp, #0x00028000 @ OMAP3_UART4_BASE
110 #ifdef CONFIG_DEBUG_OMAP4UART4
111 mov \rp, #UART_OFFSET(OMAP4_UART4_BASE)
114 #ifdef CONFIG_DEBUG_TI81XXUART1
115 mov \rp, #UART_OFFSET(TI81XX_UART1_BASE)
118 #ifdef CONFIG_DEBUG_TI81XXUART2
119 mov \rp, #UART_OFFSET(TI81XX_UART2_BASE)
122 #ifdef CONFIG_DEBUG_TI81XXUART3
123 mov \rp, #UART_OFFSET(TI81XX_UART3_BASE)
126 #ifdef CONFIG_DEBUG_AM33XXUART1
127 ldr \rp, =AM33XX_UART1_BASE
128 and \rp, \rp, #0x00ffffff
131 #ifdef CONFIG_DEBUG_ZOOM_UART
132 ldr \rp, =ZOOM_UART_BASE
133 str \rp, [\tmp, #0] @ omap_uart_phys
134 ldr \rp, =ZOOM_UART_VIRT
135 str \rp, [\tmp, #4] @ omap_uart_virt
136 mov \rp, #(UART_LSR << ZOOM_PORT_SHIFT)
137 str \rp, [\tmp, #8] @ omap_uart_lsr
141 /* AM33XX: Store both phys and virt address for the uart */
142 97: add \rp, \rp, #0x44000000 @ phys base
143 str \rp, [\tmp, #0] @ omap_uart_phys
144 sub \rp, \rp, #0x44000000 @ phys base
145 add \rp, \rp, #0xf9000000 @ virt base
146 str \rp, [\tmp, #4] @ omap_uart_virt
147 mov \rp, #(UART_LSR << OMAP_PORT_SHIFT)
148 str \rp, [\tmp, #8] @ omap_uart_lsr
152 /* Store both phys and virt address for the uart */
153 98: add \rp, \rp, #0x48000000 @ phys base
154 str \rp, [\tmp, #0] @ omap_uart_phys
155 sub \rp, \rp, #0x48000000 @ phys base
156 add \rp, \rp, #0xfa000000 @ virt base
157 str \rp, [\tmp, #4] @ omap_uart_virt
158 mov \rp, #(UART_LSR << OMAP_PORT_SHIFT)
159 str \rp, [\tmp, #8] @ omap_uart_lsr
168 100: /* Pass the UART_LSR reg address */
169 ldr \tmp, [\tmp, #8] @ omap_uart_lsr
174 .macro senduart,rd,rx
175 orr \rd, \rd, \rx, lsl #24 @ preserve LSR reg offset
176 bic \rx, \rx, #0xff @ get base (THR) reg address
177 strb \rd, [\rx] @ send lower byte of rd
178 orr \rx, \rx, \rd, lsr #24 @ restore original rx (LSR)
179 bic \rd, \rd, #(0xff << 24) @ restore original rd
182 .macro busyuart,rd,rx
183 1001: ldrb \rd, [\rx] @ rx contains UART_LSR address
184 and \rd, \rd, #(UART_LSR_TEMT | UART_LSR_THRE)
185 teq \rd, #(UART_LSR_TEMT | UART_LSR_THRE)
189 .macro waituart,rd,rx