arch/avr32/boards/atstk1000/atstk1002.c

   1 /*
   2  * ATSTK1002/ATSTK1006 daughterboard-specific init code
   3  *
   4  * Copyright (C) 2005-2007 Atmel Corporation
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  */
  10 #include <linux/clk.h>
  11 #include <linux/etherdevice.h>
  12 #include <linux/init.h>
  13 #include <linux/kernel.h>
  14 #include <linux/platform_device.h>
  15 #include <linux/string.h>
  16 #include <linux/types.h>
  17 #include <linux/spi/spi.h>
  18 #include <linux/spi/at73c213.h>
  19 #include <linux/atmel-mci.h>
  20
  21 #include <video/atmel_lcdc.h>
  22
  23 #include <asm/io.h>
  24 #include <asm/setup.h>
  25
  26 #include <mach/at32ap700x.h>
  27 #include <mach/board.h>
  28 #include <mach/init.h>
  29 #include <mach/portmux.h>
  30
  31 #include "atstk1000.h"
  32
  33 /* Oscillator frequencies. These are board specific */
  34 unsigned long at32_board_osc_rates[3] = {
  35         [0] = 32768,    /* 32.768 kHz on RTC osc */
  36         [1] = 20000000, /* 20 MHz on osc0 */
  37         [2] = 12000000, /* 12 MHz on osc1 */
  38 };
  39
  40 /*
  41  * The ATSTK1006 daughterboard is very similar to the ATSTK1002. Both
  42  * have the AT32AP7000 chip on board; the difference is that the
  43  * STK1006 has 128 MB SDRAM (the STK1002 uses the 8 MB SDRAM chip on
  44  * the STK1000 motherboard) and 256 MB NAND flash (the STK1002 has
  45  * none.)
  46  *
  47  * The RAM difference is handled by the boot loader, so the only
  48  * difference we end up handling here is the NAND flash.
  49  */
  50 #ifdef CONFIG_BOARD_ATSTK1006
  51 #include <linux/mtd/partitions.h>
  52 #include <mach/smc.h>
  53
  54 static struct smc_timing nand_timing __initdata = {
  55         .ncs_read_setup         = 0,
  56         .nrd_setup              = 10,
  57         .ncs_write_setup        = 0,
  58         .nwe_setup              = 10,
  59
  60         .ncs_read_pulse         = 30,
  61         .nrd_pulse              = 15,
  62         .ncs_write_pulse        = 30,
  63         .nwe_pulse              = 15,
  64
  65         .read_cycle             = 30,
  66         .write_cycle            = 30,
  67
  68         .ncs_read_recover       = 0,
  69         .nrd_recover            = 15,
  70         .ncs_write_recover      = 0,
  71         /* WE# high -> RE# low min 60 ns */
  72         .nwe_recover            = 50,
  73 };
  74
  75 static struct smc_config nand_config __initdata = {
  76         .bus_width              = 1,
  77         .nrd_controlled         = 1,
  78         .nwe_controlled         = 1,
  79         .nwait_mode             = 0,
  80         .byte_write             = 0,
  81         .tdf_cycles             = 2,
  82         .tdf_mode               = 0,
  83 };
  84
  85 static struct mtd_partition nand_partitions[] = {
  86         {
  87                 .name           = "main",
  88                 .offset         = 0x00000000,
  89                 .size           = MTDPART_SIZ_FULL,
  90         },
  91 };
  92
  93 static struct atmel_nand_data atstk1006_nand_data __initdata = {
  94         .cle            = 21,
  95         .ale            = 22,
  96         .rdy_pin        = GPIO_PIN_PB(30),
  97         .enable_pin     = GPIO_PIN_PB(29),
  98         .ecc_mode       = NAND_ECC_SOFT,
  99         .parts          = nand_partitions,
 100         .num_parts      = ARRAY_SIZE(nand_partitions),
 101 };
 102 #endif
 103
 104 struct eth_addr {
 105         u8 addr[6];
 106 };
 107
 108 static struct eth_addr __initdata hw_addr[2];
 109 static struct macb_platform_data __initdata eth_data[2] = {
 110         {
 111                 /*
 112                  * The MDIO pullups on STK1000 are a bit too weak for
 113                  * the autodetection to work properly, so we have to
 114                  * mask out everything but the correct address.
 115                  */
 116                 .phy_mask       = ~(1U << 16),
 117         },
 118         {
 119                 .phy_mask       = ~(1U << 17),
 120         },
 121 };
 122
 123 #ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
 124 static struct at73c213_board_info at73c213_data = {
 125         .ssc_id         = 0,
 126         .shortname      = "AVR32 STK1000 external DAC",
 127 };
 128 #endif
 129
 130 #ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
 131 static struct spi_board_info spi0_board_info[] __initdata = {
 132 #ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
 133         {
 134                 /* AT73C213 */
 135                 .modalias       = "at73c213",
 136                 .max_speed_hz   = 200000,
 137                 .chip_select    = 0,
 138                 .mode           = SPI_MODE_1,
 139                 .platform_data  = &at73c213_data,
 140         },
 141 #endif
 142         {
 143                 /* QVGA display */
 144                 .modalias       = "ltv350qv",
 145                 .max_speed_hz   = 16000000,
 146                 .chip_select    = 1,
 147                 .mode           = SPI_MODE_3,
 148         },
 149 };
 150 #endif
 151
 152 #ifdef CONFIG_BOARD_ATSTK100X_SPI1
 153 static struct spi_board_info spi1_board_info[] __initdata = { {
 154         /* patch in custom entries here */
 155 } };
 156 #endif
 157
 158 /*
 159  * The next two functions should go away as the boot loader is
 160  * supposed to initialize the macb address registers with a valid
 161  * ethernet address. But we need to keep it around for a while until
 162  * we can be reasonably sure the boot loader does this.
 163  *
 164  * The phy_id is ignored as the driver will probe for it.
 165  */
 166 static int __init parse_tag_ethernet(struct tag *tag)
 167 {
 168         int i;
 169
 170         i = tag->u.ethernet.mac_index;
 171         if (i < ARRAY_SIZE(hw_addr))
 172                 memcpy(hw_addr[i].addr, tag->u.ethernet.hw_address,
 173                        sizeof(hw_addr[i].addr));
 174
 175         return 0;
 176 }
 177 __tagtable(ATAG_ETHERNET, parse_tag_ethernet);
 178
 179 static void __init set_hw_addr(struct platform_device *pdev)
 180 {
 181         struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 182         const u8 *addr;
 183         void __iomem *regs;
 184         struct clk *pclk;
 185
 186         if (!res)
 187                 return;
 188         if (pdev->id >= ARRAY_SIZE(hw_addr))
 189                 return;
 190
 191         addr = hw_addr[pdev->id].addr;
 192         if (!is_valid_ether_addr(addr))
 193                 return;
 194
 195         /*
 196          * Since this is board-specific code, we'll cheat and use the
 197          * physical address directly as we happen to know that it's
 198          * the same as the virtual address.
 199          */
 200         regs = (void __iomem __force *)res->start;
 201         pclk = clk_get(&pdev->dev, "pclk");
 202         if (IS_ERR(pclk))
 203                 return;
 204
 205         clk_enable(pclk);
 206         __raw_writel((addr[3] << 24) | (addr[2] << 16)
 207                      | (addr[1] << 8) | addr[0], regs + 0x98);
 208         __raw_writel((addr[5] << 8) | addr[4], regs + 0x9c);
 209         clk_disable(pclk);
 210         clk_put(pclk);
 211 }
 212
 213 #ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
 214 static void __init atstk1002_setup_extdac(void)
 215 {
 216         struct clk *gclk;
 217         struct clk *pll;
 218
 219         gclk = clk_get(NULL, "gclk0");
 220         if (IS_ERR(gclk))
 221                 goto err_gclk;
 222         pll = clk_get(NULL, "pll0");
 223         if (IS_ERR(pll))
 224                 goto err_pll;
 225
 226         if (clk_set_parent(gclk, pll)) {
 227                 pr_debug("STK1000: failed to set pll0 as parent for DAC clock\n");
 228                 goto err_set_clk;
 229         }
 230
 231         at32_select_periph(GPIO_PIOA_BASE, (1 << 30), GPIO_PERIPH_A, 0);
 232         at73c213_data.dac_clk = gclk;
 233
 234 err_set_clk:
 235         clk_put(pll);
 236 err_pll:
 237         clk_put(gclk);
 238 err_gclk:
 239         return;
 240 }
 241 #else
 242 static void __init atstk1002_setup_extdac(void)
 243 {
 244
 245 }
 246 #endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */
 247
 248 void __init setup_board(void)
 249 {
 250 #ifdef  CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
 251         at32_map_usart(0, 1, 0);        /* USART 0/B: /dev/ttyS1, IRDA */
 252 #else
 253         at32_map_usart(1, 0, 0);        /* USART 1/A: /dev/ttyS0, DB9 */
 254 #endif
 255         /* USART 2/unused: expansion connector */
 256         at32_map_usart(3, 2, 0);        /* USART 3/C: /dev/ttyS2, DB9 */
 257
 258         at32_setup_serial_console(0);
 259 }
 260
 261 #ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
 262
 263 static struct mci_platform_data __initdata mci0_data = {
 264         .slot[0] = {
 265                 .bus_width      = 4,
 266
 267 /* MMC card detect requires MACB0 *NOT* be used */
 268 #ifdef CONFIG_BOARD_ATSTK1002_SW6_CUSTOM
 269                 .detect_pin     = GPIO_PIN_PC(14), /* gpio30/sdcd */
 270                 .wp_pin         = GPIO_PIN_PC(15), /* gpio31/sdwp */
 271 #else
 272                 .detect_pin     = -ENODEV,
 273                 .wp_pin         = -ENODEV,
 274 #endif  /* SW6 for sd{cd,wp} routing */
 275         },
 276 };
 277
 278 #endif  /* SW2 for MMC signal routing */
 279
 280 static int __init atstk1002_init(void)
 281 {
 282         /*
 283          * ATSTK1000 uses 32-bit SDRAM interface. Reserve the
 284          * SDRAM-specific pins so that nobody messes with them.
 285          */
 286         at32_reserve_pin(GPIO_PIOE_BASE, ATMEL_EBI_PE_DATA_ALL);
 287
 288 #ifdef CONFIG_BOARD_ATSTK1006
 289         smc_set_timing(&nand_config, &nand_timing);
 290         smc_set_configuration(3, &nand_config);
 291         at32_add_device_nand(0, &atstk1006_nand_data);
 292 #endif
 293
 294 #ifdef  CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
 295         at32_add_device_usart(1);
 296 #else
 297         at32_add_device_usart(0);
 298 #endif
 299         at32_add_device_usart(2);
 300
 301 #ifndef CONFIG_BOARD_ATSTK1002_SW6_CUSTOM
 302         set_hw_addr(at32_add_device_eth(0, &eth_data[0]));
 303 #endif
 304 #ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
 305         at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
 306 #endif
 307 #ifdef CONFIG_BOARD_ATSTK100X_SPI1
 308         at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info));
 309 #endif
 310 #ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
 311         at32_add_device_mci(0, &mci0_data);
 312 #endif
 313 #ifdef CONFIG_BOARD_ATSTK1002_SW5_CUSTOM
 314         set_hw_addr(at32_add_device_eth(1, &eth_data[1]));
 315 #else
 316         at32_add_device_lcdc(0, &atstk1000_lcdc_data,
 317                              fbmem_start, fbmem_size,
 318                              ATMEL_LCDC_PRI_24BIT | ATMEL_LCDC_PRI_CONTROL);
 319 #endif
 320         at32_add_device_usba(0, NULL);
 321 #ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM
 322         at32_add_device_ssc(0, ATMEL_SSC_TX);
 323 #endif
 324
 325         atstk1000_setup_j2_leds();
 326         atstk1002_setup_extdac();
 327
 328         return 0;
 329 }
 330 postcore_initcall(atstk1002_init);