| blob | a4877a4217560b5074ca1421377913286a646255 |
1 /*
2 * Head of the kernel - alter with care
3 *
4 * Copyright (C) 2000, 2001, 2010 Axis Communications AB
5 *
6 */
8 #define ASSEMBLER_MACROS_ONLY
9 /* The IO_* macros use the ## token concatenation operator, so
10 -traditional must not be used when assembling this file. */
11 #include <arch/sv_addr_ag.h>
13 #define CRAMFS_MAGIC 0x28cd3d45
14 #define RAM_INIT_MAGIC 0x56902387
15 #define COMMAND_LINE_MAGIC 0x87109563
17 #define START_ETHERNET_CLOCK IO_STATE(R_NETWORK_GEN_CONFIG, enable, on) |\
18 IO_STATE(R_NETWORK_GEN_CONFIG, phy, mii_clk)
20 ;; exported symbols
22 .globl etrax_irv
23 .globl romfs_start
24 .globl romfs_length
25 .globl romfs_in_flash
26 .globl swapper_pg_dir
28 .text
30 ;; This is the entry point of the kernel. We are in supervisor mode.
31 ;; 0x00000000 if Flash, 0x40004000 if DRAM
32 ;; since etrax actually starts at address 2 when booting from flash, we
33 ;; put a nop (2 bytes) here first so we dont accidentally skip the di
34 ;;
35 ;; NOTICE! The registers r8 and r9 are used as parameters carrying
36 ;; information from the decompressor (if the kernel was compressed).
37 ;; They should not be used in the code below until read.
39 nop
40 di
42 ;; First setup the kseg_c mapping from where the kernel is linked
43 ;; to 0x40000000 (where the actual DRAM resides) otherwise
44 ;; we cannot do very much! See arch/cris/README.mm
45 ;;
46 ;; Notice that since we're potentially running at 0x00 or 0x40 right now,
47 ;; we will get a fault as soon as we enable the MMU if we dont
48 ;; temporarily map those segments linearily.
49 ;;
50 ;; Due to a bug in Etrax-100 LX version 1 we need to map the memory
51 ;; slightly different. The bug is that you can't remap bit 31 of
52 ;; an address. Though we can check the version register for
53 ;; whether the bug is present, some constants would then have to
54 ;; be variables, so we don't. The drawback is that you can "only" map
55 ;; 1G per process with CONFIG_CRIS_LOW_MAP.
57 #ifdef CONFIG_CRIS_LOW_MAP
58 ; kseg mappings, temporary map of 0xc0->0x40
59 move.d IO_FIELD (R_MMU_KBASE_HI, base_c, 4) \
60 | IO_FIELD (R_MMU_KBASE_HI, base_b, 0xb) \
61 | IO_FIELD (R_MMU_KBASE_HI, base_9, 9) \
62 | IO_FIELD (R_MMU_KBASE_HI, base_8, 8), $r0
63 move.d $r0, [R_MMU_KBASE_HI]
65 ; temporary map of 0x40->0x40 and 0x60->0x40
66 move.d IO_FIELD (R_MMU_KBASE_LO, base_6, 4) \
67 | IO_FIELD (R_MMU_KBASE_LO, base_4, 4), $r0
68 move.d $r0, [R_MMU_KBASE_LO]
70 ; mmu enable, segs e,c,b,a,6,5,4,0 segment mapped
71 move.d IO_STATE (R_MMU_CONFIG, mmu_enable, enable) \
72 | IO_STATE (R_MMU_CONFIG, inv_excp, enable) \
73 | IO_STATE (R_MMU_CONFIG, acc_excp, enable) \
74 | IO_STATE (R_MMU_CONFIG, we_excp, enable) \
75 | IO_STATE (R_MMU_CONFIG, seg_f, page) \
76 | IO_STATE (R_MMU_CONFIG, seg_e, seg) \
77 | IO_STATE (R_MMU_CONFIG, seg_d, page) \
78 | IO_STATE (R_MMU_CONFIG, seg_c, seg) \
79 | IO_STATE (R_MMU_CONFIG, seg_b, seg) \
80 | IO_STATE (R_MMU_CONFIG, seg_a, seg) \
81 | IO_STATE (R_MMU_CONFIG, seg_9, page) \
82 | IO_STATE (R_MMU_CONFIG, seg_8, page) \
83 | IO_STATE (R_MMU_CONFIG, seg_7, page) \
84 | IO_STATE (R_MMU_CONFIG, seg_6, seg) \
85 | IO_STATE (R_MMU_CONFIG, seg_5, seg) \
86 | IO_STATE (R_MMU_CONFIG, seg_4, seg) \
87 | IO_STATE (R_MMU_CONFIG, seg_3, page) \
88 | IO_STATE (R_MMU_CONFIG, seg_2, page) \
89 | IO_STATE (R_MMU_CONFIG, seg_1, page) \
90 | IO_STATE (R_MMU_CONFIG, seg_0, seg), $r0
91 move.d $r0, [R_MMU_CONFIG]
92 #else
93 ; kseg mappings
94 move.d IO_FIELD (R_MMU_KBASE_HI, base_e, 8) \
95 | IO_FIELD (R_MMU_KBASE_HI, base_c, 4) \
96 | IO_FIELD (R_MMU_KBASE_HI, base_b, 0xb), $r0
97 move.d $r0, [R_MMU_KBASE_HI]
99 ; temporary map of 0x40->0x40 and 0x00->0x00
100 move.d IO_FIELD (R_MMU_KBASE_LO, base_4, 4), $r0
101 move.d $r0, [R_MMU_KBASE_LO]
103 ; mmu enable, segs f,e,c,b,4,0 segment mapped
104 move.d IO_STATE (R_MMU_CONFIG, mmu_enable, enable) \
105 | IO_STATE (R_MMU_CONFIG, inv_excp, enable) \
106 | IO_STATE (R_MMU_CONFIG, acc_excp, enable) \
107 | IO_STATE (R_MMU_CONFIG, we_excp, enable) \
108 | IO_STATE (R_MMU_CONFIG, seg_f, seg) \
109 | IO_STATE (R_MMU_CONFIG, seg_e, seg) \
110 | IO_STATE (R_MMU_CONFIG, seg_d, page) \
111 | IO_STATE (R_MMU_CONFIG, seg_c, seg) \
112 | IO_STATE (R_MMU_CONFIG, seg_b, seg) \
113 | IO_STATE (R_MMU_CONFIG, seg_a, page) \
114 | IO_STATE (R_MMU_CONFIG, seg_9, page) \
115 | IO_STATE (R_MMU_CONFIG, seg_8, page) \
116 | IO_STATE (R_MMU_CONFIG, seg_7, page) \
117 | IO_STATE (R_MMU_CONFIG, seg_6, page) \
118 | IO_STATE (R_MMU_CONFIG, seg_5, page) \
119 | IO_STATE (R_MMU_CONFIG, seg_4, seg) \
120 | IO_STATE (R_MMU_CONFIG, seg_3, page) \
121 | IO_STATE (R_MMU_CONFIG, seg_2, page) \
122 | IO_STATE (R_MMU_CONFIG, seg_1, page) \
123 | IO_STATE (R_MMU_CONFIG, seg_0, seg), $r0
124 move.d $r0, [R_MMU_CONFIG]
125 #endif
127 ;; Now we need to sort out the segments and their locations in RAM or
128 ;; Flash. The image in the Flash (or in DRAM) consists of 3 pieces:
129 ;; 1) kernel text, 2) kernel data, 3) ROM filesystem image
130 ;; But the linker has linked the kernel to expect this layout in
131 ;; DRAM memory:
132 ;; 1) kernel text, 2) kernel data, 3) kernel BSS
133 ;; (the location of the ROM filesystem is determined by the krom driver)
134 ;; If we boot this from Flash, we want to keep the ROM filesystem in
135 ;; the flash, we want to copy the text and need to copy the data to DRAM.
136 ;; But if we boot from DRAM, we need to move the ROMFS image
137 ;; from its position after kernel data, to after kernel BSS, BEFORE the
138 ;; kernel starts using the BSS area (since its "overlayed" with the ROMFS)
139 ;;
140 ;; In both cases, we start in un-cached mode, and need to jump into a
141 ;; cached PC after we're done fiddling around with the segments.
142 ;;
143 ;; arch/etrax100/etrax100.ld sets some symbols that define the start
144 ;; and end of each segment.
146 ;; Check if we start from DRAM or FLASH by testing PC
148 move.d $pc,$r0
149 and.d 0x7fffffff,$r0 ; get rid of the non-cache bit
150 cmp.d 0x10000,$r0 ; arbitrary... just something above this code
151 blo _inflash0
152 nop
154 jump _inram ; enter cached ram
156 ;; Jumpgate for branches.
157 _inflash0:
158 jump _inflash
160 ;; Put this in a suitable section where we can reclaim storage
161 ;; after init.
162 .section ".init.text", "ax"
163 _inflash:
164 #ifdef CONFIG_ETRAX_ETHERNET
165 ;; Start MII clock to make sure it is running when tranceiver is reset
166 move.d START_ETHERNET_CLOCK, $r0
167 move.d $r0, [R_NETWORK_GEN_CONFIG]
168 #endif
170 ;; Set up waitstates etc according to kernel configuration.
171 move.d CONFIG_ETRAX_DEF_R_WAITSTATES, $r0
172 move.d $r0, [R_WAITSTATES]
174 move.d CONFIG_ETRAX_DEF_R_BUS_CONFIG, $r0
175 move.d $r0, [R_BUS_CONFIG]
177 ;; We need to initialze DRAM registers before we start using the DRAM
179 cmp.d RAM_INIT_MAGIC, $r8 ; Already initialized?
180 beq _dram_init_finished
181 nop
183 #include "../lib/dram_init.S"
185 _dram_init_finished:
186 ;; Copy text+data to DRAM
187 ;; This is fragile - the calculation of r4 as the image size depends
188 ;; on that the labels below actually are the first and last positions
189 ;; in the linker-script.
190 ;;
191 ;; Then the locating of the cramfs image depends on the aforementioned
192 ;; image being located in the flash at 0. This is most often not true,
193 ;; thus the following does not work (normally there is a rescue-block
194 ;; between the physical start of the flash and the flash-image start,
195 ;; and when run with compression, the kernel is actually unpacked to
196 ;; DRAM and we never get here in the first place :))
198 moveq 0, $r0 ; source
199 move.d text_start, $r1 ; destination
200 move.d __vmlinux_end, $r2 ; end destination
201 move.d $r2, $r4
202 sub.d $r1, $r4 ; r4=__vmlinux_end in flash, used below
203 1: move.w [$r0+], $r3
204 move.w $r3, [$r1+]
205 cmp.d $r2, $r1
206 blo 1b
207 nop
209 ;; We keep the cramfs in the flash.
210 ;; There might be none, but that does not matter because
211 ;; we don't do anything than read some bytes here.
213 moveq 0, $r0
214 move.d $r0, [romfs_length] ; default if there is no cramfs
216 move.d [$r4], $r0 ; cramfs_super.magic
217 cmp.d CRAMFS_MAGIC, $r0
218 bne 1f
219 nop
220 move.d [$r4 + 4], $r0 ; cramfs_super.size
221 move.d $r0, [romfs_length]
222 #ifdef CONFIG_CRIS_LOW_MAP
223 add.d 0x50000000, $r4 ; add flash start in virtual memory (cached)
224 #else
225 add.d 0xf0000000, $r4 ; add flash start in virtual memory (cached)
226 #endif
227 move.d $r4, [romfs_start]
228 1:
229 moveq 1, $r0
230 move.d $r0, [romfs_in_flash]
232 jump _start_it ; enter code, cached this time
234 _inram:
235 ;; Move the ROM fs to after BSS end. This assumes that the cramfs
236 ;; second longword contains the length of the cramfs
238 moveq 0, $r0
239 move.d $r0, [romfs_length] ; default if there is no cramfs
241 ;; The kernel could have been unpacked to DRAM by the loader, but
242 ;; the cramfs image could still be in the Flash directly after the
243 ;; compressed kernel image. The loader passes the address of the
244 ;; byte succeeding the last compressed byte in the flash in the
245 ;; register r9 when starting the kernel. Check if r9 points to a
246 ;; decent cramfs image!
247 ;; (Notice that if this is not booted from the loader, r9 will be
248 ;; garbage but we do sanity checks on it, the chance that it points
249 ;; to a cramfs magic is small.. )
251 cmp.d 0x0ffffff8, $r9
252 bhs _no_romfs_in_flash ; r9 points outside the flash area
253 nop
254 move.d [$r9], $r0 ; cramfs_super.magic
255 cmp.d CRAMFS_MAGIC, $r0
256 bne _no_romfs_in_flash
257 nop
258 move.d [$r9+4], $r0 ; cramfs_super.length
259 move.d $r0, [romfs_length]
260 #ifdef CONFIG_CRIS_LOW_MAP
261 add.d 0x50000000, $r9 ; add flash start in virtual memory (cached)
262 #else
263 add.d 0xf0000000, $r9 ; add flash start in virtual memory (cached)
264 #endif
265 move.d $r9, [romfs_start]
267 moveq 1, $r0
268 move.d $r0, [romfs_in_flash]
270 jump _start_it ; enter code, cached this time
272 _no_romfs_in_flash:
274 ;; Check if there is a cramfs (magic value).
275 ;; Notice that we check for cramfs magic value - which is
276 ;; the "rom fs" we'll possibly use in 2.4 if not JFFS (which does
277 ;; not need this mechanism anyway)
279 move.d __init_end, $r0; the image will be after the end of init
280 move.d [$r0], $r1 ; cramfs assumes same endian on host/target
281 cmp.d CRAMFS_MAGIC, $r1; magic value in cramfs superblock
282 bne 2f
283 nop
285 ;; Ok. What is its size ?
287 move.d [$r0 + 4], $r2 ; cramfs_super.size (again, no need to swapwb)
289 ;; We want to copy it to the end of the BSS
291 move.d _end, $r1
293 ;; Remember values so cramfs and setup can find this info
295 move.d $r1, [romfs_start] ; new romfs location
296 move.d $r2, [romfs_length]
298 ;; We need to copy it backwards, since they can be overlapping
300 add.d $r2, $r0
301 add.d $r2, $r1
303 ;; Go ahead. Make my loop.
305 lsrq 1, $r2 ; size is in bytes, we copy words
307 1: move.w [$r0=$r0-2],$r3
308 move.w $r3,[$r1=$r1-2]
309 subq 1, $r2
310 bne 1b
311 nop
313 2:
314 ;; Dont worry that the BSS is tainted. It will be cleared later.
316 moveq 0, $r0
317 move.d $r0, [romfs_in_flash]
319 jump _start_it ; better skip the additional cramfs check below
321 _start_it:
323 ;; Check if kernel command line is supplied
324 cmp.d COMMAND_LINE_MAGIC, $r10
325 bne no_command_line
326 nop
328 move.d 256, $r13
329 move.d cris_command_line, $r10
330 or.d 0x80000000, $r11 ; Make it virtual
331 1:
332 move.b [$r11+], $r12
333 move.b $r12, [$r10+]
334 subq 1, $r13
335 bne 1b
336 nop
338 no_command_line:
340 ;; the kernel stack is overlayed with the task structure for each
341 ;; task. thus the initial kernel stack is in the same page as the
342 ;; init_task (but starts in the top of the page, size 8192)
343 move.d init_thread_union + 8192, $sp
344 move.d ibr_start,$r0 ; this symbol is set by the linker script
345 move $r0,$ibr
346 move.d $r0,[etrax_irv] ; set the interrupt base register and pointer
348 ;; Clear BSS region, from _bss_start to _end
350 move.d __bss_start, $r0
351 move.d _end, $r1
352 1: clear.d [$r0+]
353 cmp.d $r1, $r0
354 blo 1b
355 nop
357 ;; Etrax product HW genconfig setup
359 moveq 0,$r0
361 ;; Select or disable serial port 2
362 #ifdef CONFIG_ETRAX_SERIAL_PORT2
363 or.d IO_STATE (R_GEN_CONFIG, ser2, select),$r0
364 #else
365 or.d IO_STATE (R_GEN_CONFIG, ser2, disable),$r0
366 #endif
368 ;; Init interfaces (disable them).
369 or.d IO_STATE (R_GEN_CONFIG, scsi0, disable) \
370 | IO_STATE (R_GEN_CONFIG, ata, disable) \
371 | IO_STATE (R_GEN_CONFIG, par0, disable) \
372 | IO_STATE (R_GEN_CONFIG, mio, disable) \
373 | IO_STATE (R_GEN_CONFIG, scsi1, disable) \
374 | IO_STATE (R_GEN_CONFIG, scsi0w, disable) \
375 | IO_STATE (R_GEN_CONFIG, par1, disable) \
376 | IO_STATE (R_GEN_CONFIG, ser3, disable) \
377 | IO_STATE (R_GEN_CONFIG, mio_w, disable) \
378 | IO_STATE (R_GEN_CONFIG, usb1, disable) \
379 | IO_STATE (R_GEN_CONFIG, usb2, disable) \
380 | IO_STATE (R_GEN_CONFIG, par_w, disable),$r0
382 ;; Init DMA channel muxing (set to unused clients).
383 or.d IO_STATE (R_GEN_CONFIG, dma2, ata) \
384 | IO_STATE (R_GEN_CONFIG, dma3, ata) \
385 | IO_STATE (R_GEN_CONFIG, dma4, scsi1) \
386 | IO_STATE (R_GEN_CONFIG, dma5, scsi1) \
387 | IO_STATE (R_GEN_CONFIG, dma6, unused) \
388 | IO_STATE (R_GEN_CONFIG, dma7, unused) \
389 | IO_STATE (R_GEN_CONFIG, dma8, usb) \
390 | IO_STATE (R_GEN_CONFIG, dma9, usb),$r0
393 move.d $r0,[genconfig_shadow] ; init a shadow register of R_GEN_CONFIG
395 move.d $r0,[R_GEN_CONFIG]
397 #if 0
398 moveq 4,$r0
399 move.b $r0,[R_DMA_CH6_CMD] ; reset (ser0 dma out)
400 move.b $r0,[R_DMA_CH7_CMD] ; reset (ser0 dma in)
401 1: move.b [R_DMA_CH6_CMD],$r0 ; wait for reset cycle to finish
402 and.b 7,$r0
403 cmp.b 4,$r0
404 beq 1b
405 nop
406 1: move.b [R_DMA_CH7_CMD],$r0 ; wait for reset cycle to finish
407 and.b 7,$r0
408 cmp.b 4,$r0
409 beq 1b
410 nop
411 #endif
413 moveq IO_STATE (R_DMA_CH8_CMD, cmd, reset),$r0
414 move.b $r0,[R_DMA_CH8_CMD] ; reset (ser1 dma out)
415 move.b $r0,[R_DMA_CH9_CMD] ; reset (ser1 dma in)
416 1: move.b [R_DMA_CH8_CMD],$r0 ; wait for reset cycle to finish
417 andq IO_MASK (R_DMA_CH8_CMD, cmd),$r0
418 cmpq IO_STATE (R_DMA_CH8_CMD, cmd, reset),$r0
419 beq 1b
420 nop
421 1: move.b [R_DMA_CH9_CMD],$r0 ; wait for reset cycle to finish
422 andq IO_MASK (R_DMA_CH9_CMD, cmd),$r0
423 cmpq IO_STATE (R_DMA_CH9_CMD, cmd, reset),$r0
424 beq 1b
425 nop
427 ;; setup port PA and PB default initial directions and data
428 ;; including their shadow registers
430 move.b CONFIG_ETRAX_DEF_R_PORT_PA_DIR,$r0
431 move.b $r0,[port_pa_dir_shadow]
432 move.b $r0,[R_PORT_PA_DIR]
433 move.b CONFIG_ETRAX_DEF_R_PORT_PA_DATA,$r0
434 move.b $r0,[port_pa_data_shadow]
435 move.b $r0,[R_PORT_PA_DATA]
437 move.b CONFIG_ETRAX_DEF_R_PORT_PB_CONFIG,$r0
438 move.b $r0,[port_pb_config_shadow]
439 move.b $r0,[R_PORT_PB_CONFIG]
440 move.b CONFIG_ETRAX_DEF_R_PORT_PB_DIR,$r0
441 move.b $r0,[port_pb_dir_shadow]
442 move.b $r0,[R_PORT_PB_DIR]
443 move.b CONFIG_ETRAX_DEF_R_PORT_PB_DATA,$r0
444 move.b $r0,[port_pb_data_shadow]
445 move.b $r0,[R_PORT_PB_DATA]
447 moveq 0, $r0
448 move.d $r0,[port_pb_i2c_shadow]
449 move.d $r0, [R_PORT_PB_I2C]
451 moveq 0,$r0
452 move.d $r0,[port_g_data_shadow]
453 move.d $r0,[R_PORT_G_DATA]
455 ;; setup the serial port 0 at 115200 baud for debug purposes
457 moveq IO_STATE (R_SERIAL0_XOFF, tx_stop, enable) \
458 | IO_STATE (R_SERIAL0_XOFF, auto_xoff, disable) \
459 | IO_FIELD (R_SERIAL0_XOFF, xoff_char, 0),$r0
460 move.d $r0,[R_SERIAL0_XOFF]
462 ; 115.2kbaud for both transmit and receive
463 move.b IO_STATE (R_SERIAL0_BAUD, tr_baud, c115k2Hz) \
464 | IO_STATE (R_SERIAL0_BAUD, rec_baud, c115k2Hz),$r0
465 move.b $r0,[R_SERIAL0_BAUD]
467 ; Set up and enable the serial0 receiver.
468 move.b IO_STATE (R_SERIAL0_REC_CTRL, dma_err, stop) \
469 | IO_STATE (R_SERIAL0_REC_CTRL, rec_enable, enable) \
470 | IO_STATE (R_SERIAL0_REC_CTRL, rts_, active) \
471 | IO_STATE (R_SERIAL0_REC_CTRL, sampling, middle) \
472 | IO_STATE (R_SERIAL0_REC_CTRL, rec_stick_par, normal) \
473 | IO_STATE (R_SERIAL0_REC_CTRL, rec_par, even) \
474 | IO_STATE (R_SERIAL0_REC_CTRL, rec_par_en, disable) \
475 | IO_STATE (R_SERIAL0_REC_CTRL, rec_bitnr, rec_8bit),$r0
476 move.b $r0,[R_SERIAL0_REC_CTRL]
478 ; Set up and enable the serial0 transmitter.
479 move.b IO_FIELD (R_SERIAL0_TR_CTRL, txd, 0) \
480 | IO_STATE (R_SERIAL0_TR_CTRL, tr_enable, enable) \
481 | IO_STATE (R_SERIAL0_TR_CTRL, auto_cts, disabled) \
482 | IO_STATE (R_SERIAL0_TR_CTRL, stop_bits, one_bit) \
483 | IO_STATE (R_SERIAL0_TR_CTRL, tr_stick_par, normal) \
484 | IO_STATE (R_SERIAL0_TR_CTRL, tr_par, even) \
485 | IO_STATE (R_SERIAL0_TR_CTRL, tr_par_en, disable) \
486 | IO_STATE (R_SERIAL0_TR_CTRL, tr_bitnr, tr_8bit),$r0
487 move.b $r0,[R_SERIAL0_TR_CTRL]
489 ;; setup the serial port 1 at 115200 baud for debug purposes
491 moveq IO_STATE (R_SERIAL1_XOFF, tx_stop, enable) \
492 | IO_STATE (R_SERIAL1_XOFF, auto_xoff, disable) \
493 | IO_FIELD (R_SERIAL1_XOFF, xoff_char, 0),$r0
494 move.d $r0,[R_SERIAL1_XOFF]
496 ; 115.2kbaud for both transmit and receive
497 move.b IO_STATE (R_SERIAL1_BAUD, tr_baud, c115k2Hz) \
498 | IO_STATE (R_SERIAL1_BAUD, rec_baud, c115k2Hz),$r0
499 move.b $r0,[R_SERIAL1_BAUD]
501 ; Set up and enable the serial1 receiver.
502 move.b IO_STATE (R_SERIAL1_REC_CTRL, dma_err, stop) \
503 | IO_STATE (R_SERIAL1_REC_CTRL, rec_enable, enable) \
504 | IO_STATE (R_SERIAL1_REC_CTRL, rts_, active) \
505 | IO_STATE (R_SERIAL1_REC_CTRL, sampling, middle) \
506 | IO_STATE (R_SERIAL1_REC_CTRL, rec_stick_par, normal) \
507 | IO_STATE (R_SERIAL1_REC_CTRL, rec_par, even) \
508 | IO_STATE (R_SERIAL1_REC_CTRL, rec_par_en, disable) \
509 | IO_STATE (R_SERIAL1_REC_CTRL, rec_bitnr, rec_8bit),$r0
510 move.b $r0,[R_SERIAL1_REC_CTRL]
512 ; Set up and enable the serial1 transmitter.
513 move.b IO_FIELD (R_SERIAL1_TR_CTRL, txd, 0) \
514 | IO_STATE (R_SERIAL1_TR_CTRL, tr_enable, enable) \
515 | IO_STATE (R_SERIAL1_TR_CTRL, auto_cts, disabled) \
516 | IO_STATE (R_SERIAL1_TR_CTRL, stop_bits, one_bit) \
517 | IO_STATE (R_SERIAL1_TR_CTRL, tr_stick_par, normal) \
518 | IO_STATE (R_SERIAL1_TR_CTRL, tr_par, even) \
519 | IO_STATE (R_SERIAL1_TR_CTRL, tr_par_en, disable) \
520 | IO_STATE (R_SERIAL1_TR_CTRL, tr_bitnr, tr_8bit),$r0
521 move.b $r0,[R_SERIAL1_TR_CTRL]
523 #ifdef CONFIG_ETRAX_SERIAL_PORT2
524 ;; setup the serial port 2 at 115200 baud for debug purposes
526 moveq IO_STATE (R_SERIAL2_XOFF, tx_stop, enable) \
527 | IO_STATE (R_SERIAL2_XOFF, auto_xoff, disable) \
528 | IO_FIELD (R_SERIAL2_XOFF, xoff_char, 0),$r0
529 move.d $r0,[R_SERIAL2_XOFF]
531 ; 115.2kbaud for both transmit and receive
532 move.b IO_STATE (R_SERIAL2_BAUD, tr_baud, c115k2Hz) \
533 | IO_STATE (R_SERIAL2_BAUD, rec_baud, c115k2Hz),$r0
534 move.b $r0,[R_SERIAL2_BAUD]
536 ; Set up and enable the serial2 receiver.
537 move.b IO_STATE (R_SERIAL2_REC_CTRL, dma_err, stop) \
538 | IO_STATE (R_SERIAL2_REC_CTRL, rec_enable, enable) \
539 | IO_STATE (R_SERIAL2_REC_CTRL, rts_, active) \
540 | IO_STATE (R_SERIAL2_REC_CTRL, sampling, middle) \
541 | IO_STATE (R_SERIAL2_REC_CTRL, rec_stick_par, normal) \
542 | IO_STATE (R_SERIAL2_REC_CTRL, rec_par, even) \
543 | IO_STATE (R_SERIAL2_REC_CTRL, rec_par_en, disable) \
544 | IO_STATE (R_SERIAL2_REC_CTRL, rec_bitnr, rec_8bit),$r0
545 move.b $r0,[R_SERIAL2_REC_CTRL]
547 ; Set up and enable the serial2 transmitter.
548 move.b IO_FIELD (R_SERIAL2_TR_CTRL, txd, 0) \
549 | IO_STATE (R_SERIAL2_TR_CTRL, tr_enable, enable) \
550 | IO_STATE (R_SERIAL2_TR_CTRL, auto_cts, disabled) \
551 | IO_STATE (R_SERIAL2_TR_CTRL, stop_bits, one_bit) \
552 | IO_STATE (R_SERIAL2_TR_CTRL, tr_stick_par, normal) \
553 | IO_STATE (R_SERIAL2_TR_CTRL, tr_par, even) \
554 | IO_STATE (R_SERIAL2_TR_CTRL, tr_par_en, disable) \
555 | IO_STATE (R_SERIAL2_TR_CTRL, tr_bitnr, tr_8bit),$r0
556 move.b $r0,[R_SERIAL2_TR_CTRL]
557 #endif
559 #ifdef CONFIG_ETRAX_SERIAL_PORT3
560 ;; setup the serial port 3 at 115200 baud for debug purposes
562 moveq IO_STATE (R_SERIAL3_XOFF, tx_stop, enable) \
563 | IO_STATE (R_SERIAL3_XOFF, auto_xoff, disable) \
564 | IO_FIELD (R_SERIAL3_XOFF, xoff_char, 0),$r0
565 move.d $r0,[R_SERIAL3_XOFF]
567 ; 115.2kbaud for both transmit and receive
568 move.b IO_STATE (R_SERIAL3_BAUD, tr_baud, c115k2Hz) \
569 | IO_STATE (R_SERIAL3_BAUD, rec_baud, c115k2Hz),$r0
570 move.b $r0,[R_SERIAL3_BAUD]
572 ; Set up and enable the serial3 receiver.
573 move.b IO_STATE (R_SERIAL3_REC_CTRL, dma_err, stop) \
574 | IO_STATE (R_SERIAL3_REC_CTRL, rec_enable, enable) \
575 | IO_STATE (R_SERIAL3_REC_CTRL, rts_, active) \
576 | IO_STATE (R_SERIAL3_REC_CTRL, sampling, middle) \
577 | IO_STATE (R_SERIAL3_REC_CTRL, rec_stick_par, normal) \
578 | IO_STATE (R_SERIAL3_REC_CTRL, rec_par, even) \
579 | IO_STATE (R_SERIAL3_REC_CTRL, rec_par_en, disable) \
580 | IO_STATE (R_SERIAL3_REC_CTRL, rec_bitnr, rec_8bit),$r0
581 move.b $r0,[R_SERIAL3_REC_CTRL]
583 ; Set up and enable the serial3 transmitter.
584 move.b IO_FIELD (R_SERIAL3_TR_CTRL, txd, 0) \
585 | IO_STATE (R_SERIAL3_TR_CTRL, tr_enable, enable) \
586 | IO_STATE (R_SERIAL3_TR_CTRL, auto_cts, disabled) \
587 | IO_STATE (R_SERIAL3_TR_CTRL, stop_bits, one_bit) \
588 | IO_STATE (R_SERIAL3_TR_CTRL, tr_stick_par, normal) \
589 | IO_STATE (R_SERIAL3_TR_CTRL, tr_par, even) \
590 | IO_STATE (R_SERIAL3_TR_CTRL, tr_par_en, disable) \
591 | IO_STATE (R_SERIAL3_TR_CTRL, tr_bitnr, tr_8bit),$r0
592 move.b $r0,[R_SERIAL3_TR_CTRL]
593 #endif
595 jump start_kernel ; jump into the C-function start_kernel in init/main.c
597 .data
598 etrax_irv:
599 .dword 0
600 romfs_start:
601 .dword 0
602 romfs_length:
603 .dword 0
604 romfs_in_flash:
605 .dword 0
607 ;; put some special pages at the beginning of the kernel aligned
608 ;; to page boundaries - the kernel cannot start until after this
610 #ifdef CONFIG_CRIS_LOW_MAP
611 swapper_pg_dir = 0x60002000
612 #else
613 swapper_pg_dir = 0xc0002000
614 #endif
616 .section ".init.data", "aw"
617 #include "../lib/hw_settings.S"