1 /***********************license start***************
2 * Author: Cavium Networks
4 * Contact: support@caviumnetworks.com
5 * This file is part of the OCTEON SDK
7 * Copyright (c) 2003-2008 Cavium Networks
9 * This file is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License, Version 2, as
11 * published by the Free Software Foundation.
13 * This file is distributed in the hope that it will be useful, but
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
16 * NONINFRINGEMENT. See the GNU General Public License for more
19 * You should have received a copy of the GNU General Public License
20 * along with this file; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 * or visit http://www.gnu.org/licenses/.
24 * This file may also be available under a different license from Cavium.
25 * Contact Cavium Networks for more information
26 ***********************license end**************************************/
30 * Helper functions to abstract board specific data about
31 * network ports from the rest of the cvmx-helper files.
34 #ifndef __CVMX_HELPER_BOARD_H__
35 #define __CVMX_HELPER_BOARD_H__
37 #include <asm/octeon/cvmx-helper.h>
39 enum cvmx_helper_board_usb_clock_types
{
40 USB_CLOCK_TYPE_REF_12
,
41 USB_CLOCK_TYPE_REF_24
,
42 USB_CLOCK_TYPE_REF_48
,
43 USB_CLOCK_TYPE_CRYSTAL_12
,
47 set_phy_link_flags_autoneg
= 0x1,
48 set_phy_link_flags_flow_control_dont_touch
= 0x0 << 1,
49 set_phy_link_flags_flow_control_enable
= 0x1 << 1,
50 set_phy_link_flags_flow_control_disable
= 0x2 << 1,
51 set_phy_link_flags_flow_control_mask
= 0x3 << 1, /* Mask for 2 bit wide flow control field */
52 } cvmx_helper_board_set_phy_link_flags_types_t
;
55 * Fake IPD port, the RGMII/MII interface may use different PHY, use
56 * this macro to return appropriate MIX address to read the PHY.
58 #define CVMX_HELPER_BOARD_MGMT_IPD_PORT -10
61 * cvmx_override_board_link_get(int ipd_port) is a function
62 * pointer. It is meant to allow customization of the process of
63 * talking to a PHY to determine link speed. It is called every
64 * time a PHY must be polled for link status. Users should set
65 * this pointer to a function before calling any cvmx-helper
68 extern cvmx_helper_link_info_t(*cvmx_override_board_link_get
) (int ipd_port
);
71 * Return the MII PHY address associated with the given IPD
72 * port. A result of -1 means there isn't a MII capable PHY
73 * connected to this port. On chips supporting multiple MII
74 * busses the bus number is encoded in bits <15:8>.
76 * This function must be modifed for every new Octeon board.
77 * Internally it uses switch statements based on the cvmx_sysinfo
78 * data to determine board types and revisions. It relys on the
79 * fact that every Octeon board receives a unique board type
80 * enumeration from the bootloader.
82 * @ipd_port: Octeon IPD port to get the MII address for.
84 * Returns MII PHY address and bus number or -1.
86 extern int cvmx_helper_board_get_mii_address(int ipd_port
);
89 * This function as a board specific method of changing the PHY
90 * speed, duplex, and autonegotiation. This programs the PHY and
91 * not Octeon. This can be used to force Octeon's links to
94 * @phy_addr: The address of the PHY to program
96 * Flags to control autonegotiation. Bit 0 is autonegotiation
97 * enable/disable to maintain backware compatibility.
98 * @link_info: Link speed to program. If the speed is zero and autonegotiation
99 * is enabled, all possible negotiation speeds are advertised.
101 * Returns Zero on success, negative on failure
103 int cvmx_helper_board_link_set_phy(int phy_addr
,
104 cvmx_helper_board_set_phy_link_flags_types_t
106 cvmx_helper_link_info_t link_info
);
109 * This function is the board specific method of determining an
110 * ethernet ports link speed. Most Octeon boards have Marvell PHYs
111 * and are handled by the fall through case. This function must be
112 * updated for boards that don't have the normal Marvell PHYs.
114 * This function must be modifed for every new Octeon board.
115 * Internally it uses switch statements based on the cvmx_sysinfo
116 * data to determine board types and revisions. It relys on the
117 * fact that every Octeon board receives a unique board type
118 * enumeration from the bootloader.
120 * @ipd_port: IPD input port associated with the port we want to get link
123 * Returns The ports link status. If the link isn't fully resolved, this must
126 extern cvmx_helper_link_info_t
__cvmx_helper_board_link_get(int ipd_port
);
129 * This function is called by cvmx_helper_interface_probe() after it
130 * determines the number of ports Octeon can support on a specific
131 * interface. This function is the per board location to override
132 * this value. It is called with the number of ports Octeon might
133 * support and should return the number of actual ports on the
136 * This function must be modifed for every new Octeon board.
137 * Internally it uses switch statements based on the cvmx_sysinfo
138 * data to determine board types and revisions. It relys on the
139 * fact that every Octeon board receives a unique board type
140 * enumeration from the bootloader.
142 * @interface: Interface to probe
144 * Number of ports Octeon supports.
146 * Returns Number of ports the actual board supports. Many times this will
147 * simple be "support_ports".
149 extern int __cvmx_helper_board_interface_probe(int interface
,
150 int supported_ports
);
153 * Enable packet input/output from the hardware. This function is
154 * called after by cvmx_helper_packet_hardware_enable() to
155 * perform board specific initialization. For most boards
158 * @interface: Interface to enable
160 * Returns Zero on success, negative on failure
162 extern int __cvmx_helper_board_hardware_enable(int interface
);
164 enum cvmx_helper_board_usb_clock_types
__cvmx_helper_board_usb_get_clock_type(void);
166 #endif /* __CVMX_HELPER_BOARD_H__ */