2 * P1022/P1013 Silicon/SoC Device Tree Source (post include)
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39 * The localbus on the P1022 is not a simple-bus because of the eLBC
40 * pin muxing when the DIU is enabled.
42 compatible = "fsl,p1022-elbc", "fsl,elbc";
43 interrupts = <19 2 0 0>,
47 /* controller at 0x9000 */
49 compatible = "fsl,mpc8548-pcie";
54 clock-frequency = <33333333>;
55 interrupts = <16 2 0 0>;
59 #interrupt-cells = <1>;
63 interrupts = <16 2 0 0>;
64 interrupt-map-mask = <0xf800 0 0 7>;
67 0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0
68 0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0
69 0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0
70 0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0
75 /* controller at 0xa000 */
77 compatible = "fsl,mpc8548-pcie";
82 clock-frequency = <33333333>;
83 interrupts = <16 2 0 0>;
87 #interrupt-cells = <1>;
91 interrupts = <16 2 0 0>;
92 interrupt-map-mask = <0xf800 0 0 7>;
96 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
97 0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
98 0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
99 0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
104 /* controller at 0xb000 */
106 compatible = "fsl,mpc8548-pcie";
109 #address-cells = <3>;
111 clock-frequency = <33333333>;
112 interrupts = <16 2 0 0>;
116 #interrupt-cells = <1>;
118 #address-cells = <3>;
120 interrupts = <16 2 0 0>;
121 interrupt-map-mask = <0xf800 0 0 7>;
125 0000 0x0 0x0 0x1 &mpic 0x8 0x1 0x0 0x0
126 0000 0x0 0x0 0x2 &mpic 0x9 0x1 0x0 0x0
127 0000 0x0 0x0 0x3 &mpic 0xa 0x1 0x0 0x0
128 0000 0x0 0x0 0x4 &mpic 0xb 0x1 0x0 0x0
134 #address-cells = <1>;
137 compatible = "fsl,p1022-immr", "simple-bus";
138 bus-frequency = <0>; // Filled out by uboot.
141 compatible = "fsl,ecm-law";
147 compatible = "fsl,p1022-ecm", "fsl,ecm";
148 reg = <0x1000 0x1000>;
149 interrupts = <16 2 0 0>;
152 memory-controller@2000 {
153 compatible = "fsl,p1022-memory-controller";
154 reg = <0x2000 0x1000>;
155 interrupts = <16 2 0 0>;
158 /include/ "pq3-i2c-0.dtsi"
159 /include/ "pq3-i2c-1.dtsi"
160 /include/ "pq3-duart-0.dtsi"
161 /include/ "pq3-espi-0.dtsi"
163 fsl,espi-num-chipselects = <4>;
166 /include/ "pq3-dma-1.dtsi"
168 dma00: dma-channel@0 {
169 compatible = "fsl,ssi-dma-channel";
171 dma01: dma-channel@80 {
172 compatible = "fsl,ssi-dma-channel";
176 /include/ "pq3-gpio-0.dtsi"
178 display: display@10000 {
179 compatible = "fsl,diu", "fsl,p1022-diu";
180 reg = <0x10000 1000>;
181 interrupts = <64 2 0 0>;
185 compatible = "fsl,mpc8610-ssi";
187 reg = <0x15000 0x100>;
188 interrupts = <75 2 0 0>;
189 fsl,playback-dma = <&dma00>;
190 fsl,capture-dma = <&dma01>;
191 fsl,fifo-depth = <15>;
194 /include/ "pq3-sata2-0.dtsi"
195 /include/ "pq3-sata2-1.dtsi"
197 L2: l2-cache-controller@20000 {
198 compatible = "fsl,p1022-l2-cache-controller";
199 reg = <0x20000 0x1000>;
200 cache-line-size = <32>; // 32 bytes
201 cache-size = <0x40000>; // L2,256K
202 interrupts = <16 2 0 0>;
205 /include/ "pq3-dma-0.dtsi"
206 /include/ "pq3-usb2-dr-0.dtsi"
208 compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr";
210 /include/ "pq3-usb2-dr-1.dtsi"
212 compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr";
215 /include/ "pq3-esdhc-0.dtsi"
217 compatible = "fsl,p1022-esdhc", "fsl,esdhc";
221 /include/ "pq3-sec3.3-0.dtsi"
222 /include/ "pq3-mpic.dtsi"
223 /include/ "pq3-mpic-timer-B.dtsi"
225 /include/ "pq3-etsec2-0.dtsi"
226 enet0: enet0_grp2: ethernet@b0000 {
230 /include/ "pq3-etsec2-1.dtsi"
231 enet1: enet1_grp2: ethernet@b1000 {
235 global-utilities@e0000 {
236 compatible = "fsl,p1022-guts";
237 reg = <0xe0000 0x1000>;
242 compatible = "fsl,mpc8536-pmc", "fsl,mpc8548-pmc";
243 reg = <0xe0070 0x20>;
248 /include/ "pq3-etsec2-grp2-0.dtsi"
249 /include/ "pq3-etsec2-grp2-1.dtsi"