2 * T4240QDS Device Tree Source
4 * Copyright 2012 - 2014 Freescale Semiconductor Inc.
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35 /include/ "t4240si-pre.dtsi"
38 model = "fsl,T4240QDS";
39 compatible = "fsl,T4240QDS";
42 interrupt-parent = <&mpic>;
44 ifc: localbus@ffe124000 {
45 reg = <0xf 0xfe124000 0 0x2000>;
46 ranges = <0 0 0xf 0xe8000000 0x08000000
47 2 0 0xf 0xff800000 0x00010000
48 3 0 0xf 0xffdf0000 0x00008000>;
53 compatible = "cfi-flash";
54 reg = <0x0 0x0 0x8000000>;
63 compatible = "fsl,ifc-nand";
64 reg = <0x2 0x0 0x10000>;
67 /* This location must not be altered */
68 /* 1MB for u-boot Bootloader Image */
69 reg = <0x0 0x00100000>;
70 label = "NAND U-Boot Image";
75 /* 1MB for DTB Image */
76 reg = <0x00100000 0x00100000>;
77 label = "NAND DTB Image";
81 /* 10MB for Linux Kernel Image */
82 reg = <0x00200000 0x00A00000>;
83 label = "NAND Linux Kernel Image";
87 /* 500MB for Root file System Image */
88 reg = <0x00c00000 0x1F400000>;
89 label = "NAND RFS Image";
94 compatible = "fsl,t4240qds-fpga", "fsl,fpga-qixis";
100 device_type = "memory";
104 #address-cells = <2>;
108 bman_fbpr: bman-fbpr {
109 size = <0 0x1000000>;
110 alignment = <0 0x1000000>;
114 alignment = <0 0x400000>;
116 qman_pfdr: qman-pfdr {
117 size = <0 0x2000000>;
118 alignment = <0 0x2000000>;
122 dcsr: dcsr@f00000000 {
123 ranges = <0x00000000 0xf 0x00000000 0x01072000>;
126 bportals: bman-portals@ff4000000 {
127 ranges = <0x0 0xf 0xf4000000 0x2000000>;
130 qportals: qman-portals@ff6000000 {
131 ranges = <0x0 0xf 0xf6000000 0x2000000>;
135 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
136 reg = <0xf 0xfe000000 0 0x00001000>;
139 #address-cells = <1>;
141 compatible = "sst,sst25wf040";
143 spi-max-frequency = <40000000>; /* input clock */
149 compatible = "nxp,pca9547";
151 #address-cells = <1>;
155 #address-cells = <1>;
160 compatible = "at24,24c256";
164 compatible = "at24,24c256";
168 compatible = "at24,24c256";
172 compatible = "at24,24c256";
176 compatible = "at24,24c256";
180 compatible = "at24,24c256";
184 compatible = "dallas,ds3232";
186 interrupts = <0x1 0x1 0 0>;
191 #address-cells = <1>;
196 compatible = "ti,ina220";
198 shunt-resistor = <1000>;
202 compatible = "ti,ina220";
204 shunt-resistor = <1000>;
208 compatible = "ti,ina220";
210 shunt-resistor = <1000>;
214 compatible = "ti,ina220";
216 shunt-resistor = <1000>;
220 compatible = "ti,ina220";
222 shunt-resistor = <1000>;
226 compatible = "ti,ina220";
228 shunt-resistor = <1000>;
235 voltage-ranges = <1800 1800 3300 3300>;
239 pci0: pcie@ffe240000 {
240 reg = <0xf 0xfe240000 0 0x10000>;
241 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
242 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
244 ranges = <0x02000000 0 0xe0000000
245 0x02000000 0 0xe0000000
248 0x01000000 0 0x00000000
249 0x01000000 0 0x00000000
254 pci1: pcie@ffe250000 {
255 reg = <0xf 0xfe250000 0 0x10000>;
256 ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
257 0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>;
259 ranges = <0x02000000 0 0xe0000000
260 0x02000000 0 0xe0000000
263 0x01000000 0 0x00000000
264 0x01000000 0 0x00000000
269 pci2: pcie@ffe260000 {
270 reg = <0xf 0xfe260000 0 0x1000>;
271 ranges = <0x02000000 0 0xe0000000 0xc 0x40000000 0 0x20000000
272 0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>;
274 ranges = <0x02000000 0 0xe0000000
275 0x02000000 0 0xe0000000
278 0x01000000 0 0x00000000
279 0x01000000 0 0x00000000
284 pci3: pcie@ffe270000 {
285 reg = <0xf 0xfe270000 0 0x10000>;
286 ranges = <0x02000000 0 0xe0000000 0xc 0x60000000 0 0x20000000
287 0x01000000 0 0x00000000 0xf 0xf8030000 0 0x00010000>;
289 ranges = <0x02000000 0 0xe0000000
290 0x02000000 0 0xe0000000
293 0x01000000 0 0x00000000
294 0x01000000 0 0x00000000
298 rio: rapidio@ffe0c0000 {
299 reg = <0xf 0xfe0c0000 0 0x11000>;
302 ranges = <0 0 0xc 0x20000000 0 0x10000000>;
305 ranges = <0 0 0xc 0x30000000 0 0x10000000>;
310 /include/ "t4240si-post.dtsi"