1 #ifndef _ASM_POWERPC_TM_H
2 #define _ASM_POWERPC_TM_H
4 /* Reason codes describing kernel causes for transaction aborts. By
5 * convention, bit0 is copied to TEXASR[56] (IBM bit 7) which is set if
6 * the failure is persistent. PAPR saves 0xff-0xe0 for the hypervisor.
8 #define TM_CAUSE_PERSISTENT 0x01
9 #define TM_CAUSE_KVM_RESCHED 0xe0 /* From PAPR */
10 #define TM_CAUSE_KVM_FAC_UNAV 0xe2 /* From PAPR */
11 #define TM_CAUSE_RESCHED 0xde
12 #define TM_CAUSE_TLBI 0xdc
13 #define TM_CAUSE_FAC_UNAV 0xda
14 #define TM_CAUSE_SYSCALL 0xd8
15 #define TM_CAUSE_MISC 0xd6 /* future use */
16 #define TM_CAUSE_SIGNAL 0xd4
17 #define TM_CAUSE_ALIGNMENT 0xd2
18 #define TM_CAUSE_EMULATE 0xd0