2 * PowerNV LPC bus handling.
4 * Copyright 2013 IBM Corp.
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
12 #include <linux/kernel.h>
14 #include <linux/bug.h>
15 #include <linux/debugfs.h>
17 #include <linux/slab.h>
19 #include <asm/machdep.h>
20 #include <asm/firmware.h>
24 #include <asm/uaccess.h>
25 #include <asm/debug.h>
27 static int opal_lpc_chip_id
= -1;
29 static u8
opal_lpc_inb(unsigned long port
)
34 if (opal_lpc_chip_id
< 0 || port
> 0xffff)
36 rc
= opal_lpc_read(opal_lpc_chip_id
, OPAL_LPC_IO
, port
, &data
, 1);
37 return rc
? 0xff : be32_to_cpu(data
);
40 static __le16
__opal_lpc_inw(unsigned long port
)
45 if (opal_lpc_chip_id
< 0 || port
> 0xfffe)
48 return (__le16
)opal_lpc_inb(port
) << 8 | opal_lpc_inb(port
+ 1);
49 rc
= opal_lpc_read(opal_lpc_chip_id
, OPAL_LPC_IO
, port
, &data
, 2);
50 return rc
? 0xffff : be32_to_cpu(data
);
52 static u16
opal_lpc_inw(unsigned long port
)
54 return le16_to_cpu(__opal_lpc_inw(port
));
57 static __le32
__opal_lpc_inl(unsigned long port
)
62 if (opal_lpc_chip_id
< 0 || port
> 0xfffc)
65 return (__le32
)opal_lpc_inb(port
) << 24 |
66 (__le32
)opal_lpc_inb(port
+ 1) << 16 |
67 (__le32
)opal_lpc_inb(port
+ 2) << 8 |
68 opal_lpc_inb(port
+ 3);
69 rc
= opal_lpc_read(opal_lpc_chip_id
, OPAL_LPC_IO
, port
, &data
, 4);
70 return rc
? 0xffffffff : be32_to_cpu(data
);
73 static u32
opal_lpc_inl(unsigned long port
)
75 return le32_to_cpu(__opal_lpc_inl(port
));
78 static void opal_lpc_outb(u8 val
, unsigned long port
)
80 if (opal_lpc_chip_id
< 0 || port
> 0xffff)
82 opal_lpc_write(opal_lpc_chip_id
, OPAL_LPC_IO
, port
, val
, 1);
85 static void __opal_lpc_outw(__le16 val
, unsigned long port
)
87 if (opal_lpc_chip_id
< 0 || port
> 0xfffe)
90 opal_lpc_outb(val
>> 8, port
);
91 opal_lpc_outb(val
, port
+ 1);
94 opal_lpc_write(opal_lpc_chip_id
, OPAL_LPC_IO
, port
, val
, 2);
97 static void opal_lpc_outw(u16 val
, unsigned long port
)
99 __opal_lpc_outw(cpu_to_le16(val
), port
);
102 static void __opal_lpc_outl(__le32 val
, unsigned long port
)
104 if (opal_lpc_chip_id
< 0 || port
> 0xfffc)
107 opal_lpc_outb(val
>> 24, port
);
108 opal_lpc_outb(val
>> 16, port
+ 1);
109 opal_lpc_outb(val
>> 8, port
+ 2);
110 opal_lpc_outb(val
, port
+ 3);
113 opal_lpc_write(opal_lpc_chip_id
, OPAL_LPC_IO
, port
, val
, 4);
116 static void opal_lpc_outl(u32 val
, unsigned long port
)
118 __opal_lpc_outl(cpu_to_le32(val
), port
);
121 static void opal_lpc_insb(unsigned long p
, void *b
, unsigned long c
)
126 *(ptr
++) = opal_lpc_inb(p
);
129 static void opal_lpc_insw(unsigned long p
, void *b
, unsigned long c
)
134 *(ptr
++) = __opal_lpc_inw(p
);
137 static void opal_lpc_insl(unsigned long p
, void *b
, unsigned long c
)
142 *(ptr
++) = __opal_lpc_inl(p
);
145 static void opal_lpc_outsb(unsigned long p
, const void *b
, unsigned long c
)
150 opal_lpc_outb(*(ptr
++), p
);
153 static void opal_lpc_outsw(unsigned long p
, const void *b
, unsigned long c
)
155 const __le16
*ptr
= b
;
158 __opal_lpc_outw(*(ptr
++), p
);
161 static void opal_lpc_outsl(unsigned long p
, const void *b
, unsigned long c
)
163 const __le32
*ptr
= b
;
166 __opal_lpc_outl(*(ptr
++), p
);
169 static const struct ppc_pci_io opal_lpc_io
= {
173 .outb
= opal_lpc_outb
,
174 .outw
= opal_lpc_outw
,
175 .outl
= opal_lpc_outl
,
176 .insb
= opal_lpc_insb
,
177 .insw
= opal_lpc_insw
,
178 .insl
= opal_lpc_insl
,
179 .outsb
= opal_lpc_outsb
,
180 .outsw
= opal_lpc_outsw
,
181 .outsl
= opal_lpc_outsl
,
184 #ifdef CONFIG_DEBUG_FS
185 struct lpc_debugfs_entry
{
186 enum OpalLPCAddressType lpc_type
;
189 static ssize_t
lpc_debug_read(struct file
*filp
, char __user
*ubuf
,
190 size_t count
, loff_t
*ppos
)
192 struct lpc_debugfs_entry
*lpc
= filp
->private_data
;
193 u32 data
, pos
, len
, todo
;
196 if (!access_ok(VERIFY_WRITE
, ubuf
, count
))
204 * Select access size based on count and alignment and
205 * access type. IO and MEM only support byte acceses,
209 if (lpc
->lpc_type
== OPAL_LPC_FW
) {
210 if (todo
> 3 && (pos
& 3) == 0)
212 else if (todo
> 1 && (pos
& 1) == 0)
215 rc
= opal_lpc_read(opal_lpc_chip_id
, lpc
->lpc_type
, pos
,
221 * Now there is some trickery with the data returned by OPAL
222 * as it's the desired data right justified in a 32-bit BE
225 * This is a very bad interface and I'm to blame for it :-(
227 * So we can't just apply a 32-bit swap to what comes from OPAL,
228 * because user space expects the *bytes* to be in their proper
229 * respective positions (ie, LPC position).
231 * So what we really want to do here is to shift data right
232 * appropriately on a LE kernel.
234 * IE. If the LPC transaction has bytes B0, B1, B2 and B3 in that
235 * order, we have in memory written to by OPAL at the "data"
238 * Bytes: OPAL "data" LE "data"
239 * 32-bit: B0 B1 B2 B3 B0B1B2B3 B3B2B1B0
240 * 16-bit: B0 B1 0000B0B1 B1B00000
241 * 8-bit: B0 000000B0 B0000000
243 * So a BE kernel will have the leftmost of the above in the MSB
244 * and rightmost in the LSB and can just then "cast" the u32 "data"
245 * down to the appropriate quantity and write it.
247 * However, an LE kernel can't. It doesn't need to swap because a
248 * load from data followed by a store to user are going to preserve
249 * the byte ordering which is the wire byte order which is what the
250 * user wants, but in order to "crop" to the right size, we need to
255 rc
= __put_user((u32
)data
, (u32 __user
*)ubuf
);
258 #ifdef __LITTLE_ENDIAN__
261 rc
= __put_user((u16
)data
, (u16 __user
*)ubuf
);
264 #ifdef __LITTLE_ENDIAN__
267 rc
= __put_user((u8
)data
, (u8 __user
*)ubuf
);
280 static ssize_t
lpc_debug_write(struct file
*filp
, const char __user
*ubuf
,
281 size_t count
, loff_t
*ppos
)
283 struct lpc_debugfs_entry
*lpc
= filp
->private_data
;
284 u32 data
, pos
, len
, todo
;
287 if (!access_ok(VERIFY_READ
, ubuf
, count
))
295 * Select access size based on count and alignment and
296 * access type. IO and MEM only support byte acceses,
300 if (lpc
->lpc_type
== OPAL_LPC_FW
) {
301 if (todo
> 3 && (pos
& 3) == 0)
303 else if (todo
> 1 && (pos
& 1) == 0)
308 * Similarly to the read case, we have some trickery here but
309 * it's different to handle. We need to pass the value to OPAL in
310 * a register whose layout depends on the access size. We want
311 * to reproduce the memory layout of the user, however we aren't
312 * doing a load from user and a store to another memory location
313 * which would achieve that. Here we pass the value to OPAL via
314 * a register which is expected to contain the "BE" interpretation
315 * of the byte sequence. IE: for a 32-bit access, byte 0 should be
316 * in the MSB. So here we *do* need to byteswap on LE.
318 * User bytes: LE "data" OPAL "data"
319 * 32-bit: B0 B1 B2 B3 B3B2B1B0 B0B1B2B3
320 * 16-bit: B0 B1 0000B1B0 0000B0B1
321 * 8-bit: B0 000000B0 000000B0
325 rc
= __get_user(data
, (u32 __user
*)ubuf
);
326 data
= cpu_to_be32(data
);
329 rc
= __get_user(data
, (u16 __user
*)ubuf
);
330 data
= cpu_to_be16(data
);
333 rc
= __get_user(data
, (u8 __user
*)ubuf
);
339 rc
= opal_lpc_write(opal_lpc_chip_id
, lpc
->lpc_type
, pos
,
351 static const struct file_operations lpc_fops
= {
352 .read
= lpc_debug_read
,
353 .write
= lpc_debug_write
,
355 .llseek
= default_llseek
,
358 static int opal_lpc_debugfs_create_type(struct dentry
*folder
,
360 enum OpalLPCAddressType type
)
362 struct lpc_debugfs_entry
*entry
;
363 entry
= kzalloc(sizeof(*entry
), GFP_KERNEL
);
366 entry
->lpc_type
= type
;
367 debugfs_create_file(fname
, 0600, folder
, entry
, &lpc_fops
);
371 static int opal_lpc_init_debugfs(void)
376 if (opal_lpc_chip_id
< 0)
379 root
= debugfs_create_dir("lpc", powerpc_debugfs_root
);
381 rc
|= opal_lpc_debugfs_create_type(root
, "io", OPAL_LPC_IO
);
382 rc
|= opal_lpc_debugfs_create_type(root
, "mem", OPAL_LPC_MEM
);
383 rc
|= opal_lpc_debugfs_create_type(root
, "fw", OPAL_LPC_FW
);
386 machine_device_initcall(powernv
, opal_lpc_init_debugfs
);
387 #endif /* CONFIG_DEBUG_FS */
389 void opal_lpc_init(void)
391 struct device_node
*np
;
394 * Look for a Power8 LPC bus tagged as "primary",
395 * we currently support only one though the OPAL APIs
396 * support any number.
398 for_each_compatible_node(np
, NULL
, "ibm,power8-lpc") {
399 if (!of_device_is_available(np
))
401 if (!of_get_property(np
, "primary", NULL
))
403 opal_lpc_chip_id
= of_get_ibm_chip_id(np
);
406 if (opal_lpc_chip_id
< 0)
409 /* Setup special IO ops */
410 ppc_pci_io
= opal_lpc_io
;
411 isa_io_special
= true;
413 pr_info("OPAL: Power8 LPC bus found, chip ID %d\n", opal_lpc_chip_id
);