1 #ifndef _ASM_X86_MICROCODE_H
2 #define _ASM_X86_MICROCODE_H
5 #include <linux/earlycpio.h>
7 #define native_rdmsr(msr, val1, val2) \
9 u64 __val = native_read_msr((msr)); \
10 (void)((val1) = (u32)__val); \
11 (void)((val2) = (u32)(__val >> 32)); \
14 #define native_wrmsr(msr, low, high) \
15 native_write_msr(msr, low, high)
17 #define native_wrmsrl(msr, val) \
18 native_write_msr((msr), \
20 (u32)((u64)(val) >> 32))
22 struct cpu_signature
{
30 enum ucode_state
{ UCODE_ERROR
, UCODE_OK
, UCODE_NFOUND
};
32 struct microcode_ops
{
33 enum ucode_state (*request_microcode_user
) (int cpu
,
34 const void __user
*buf
, size_t size
);
36 enum ucode_state (*request_microcode_fw
) (int cpu
, struct device
*,
39 void (*microcode_fini_cpu
) (int cpu
);
42 * The generic 'microcode_core' part guarantees that
43 * the callbacks below run on a target cpu when they
45 * See also the "Synchronization" section in microcode_core.c.
47 int (*apply_microcode
) (int cpu
);
48 int (*collect_cpu_info
) (int cpu
, struct cpu_signature
*csig
);
51 struct ucode_cpu_info
{
52 struct cpu_signature cpu_sig
;
56 extern struct ucode_cpu_info ucode_cpu_info
[];
58 #ifdef CONFIG_MICROCODE
59 int __init
microcode_init(void);
61 static inline int __init
microcode_init(void) { return 0; };
64 #ifdef CONFIG_MICROCODE_INTEL
65 extern struct microcode_ops
* __init
init_intel_microcode(void);
67 static inline struct microcode_ops
* __init
init_intel_microcode(void)
71 #endif /* CONFIG_MICROCODE_INTEL */
73 #ifdef CONFIG_MICROCODE_AMD
74 extern struct microcode_ops
* __init
init_amd_microcode(void);
75 extern void __exit
exit_amd_microcode(void);
77 static inline struct microcode_ops
* __init
init_amd_microcode(void)
81 static inline void __exit
exit_amd_microcode(void) {}
84 #define MAX_UCODE_COUNT 128
86 #define QCHAR(a, b, c, d) ((a) + ((b) << 8) + ((c) << 16) + ((d) << 24))
87 #define CPUID_INTEL1 QCHAR('G', 'e', 'n', 'u')
88 #define CPUID_INTEL2 QCHAR('i', 'n', 'e', 'I')
89 #define CPUID_INTEL3 QCHAR('n', 't', 'e', 'l')
90 #define CPUID_AMD1 QCHAR('A', 'u', 't', 'h')
91 #define CPUID_AMD2 QCHAR('e', 'n', 't', 'i')
92 #define CPUID_AMD3 QCHAR('c', 'A', 'M', 'D')
94 #define CPUID_IS(a, b, c, ebx, ecx, edx) \
95 (!((ebx ^ (a))|(edx ^ (b))|(ecx ^ (c))))
98 * In early loading microcode phase on BSP, boot_cpu_data is not set up yet.
99 * x86_cpuid_vendor() gets vendor id for BSP.
101 * In 32 bit AP case, accessing boot_cpu_data needs linear address. To simplify
102 * coding, we still use x86_cpuid_vendor() to get vendor id for AP.
104 * x86_cpuid_vendor() gets vendor information directly from CPUID.
106 static inline int x86_cpuid_vendor(void)
108 u32 eax
= 0x00000000;
109 u32 ebx
, ecx
= 0, edx
;
111 native_cpuid(&eax
, &ebx
, &ecx
, &edx
);
113 if (CPUID_IS(CPUID_INTEL1
, CPUID_INTEL2
, CPUID_INTEL3
, ebx
, ecx
, edx
))
114 return X86_VENDOR_INTEL
;
116 if (CPUID_IS(CPUID_AMD1
, CPUID_AMD2
, CPUID_AMD3
, ebx
, ecx
, edx
))
117 return X86_VENDOR_AMD
;
119 return X86_VENDOR_UNKNOWN
;
122 static inline unsigned int x86_cpuid_family(void)
124 u32 eax
= 0x00000001;
125 u32 ebx
, ecx
= 0, edx
;
127 native_cpuid(&eax
, &ebx
, &ecx
, &edx
);
129 return x86_family(eax
);
132 #ifdef CONFIG_MICROCODE
133 extern void __init
load_ucode_bsp(void);
134 extern void load_ucode_ap(void);
135 extern int __init
save_microcode_in_initrd(void);
136 void reload_early_microcode(void);
137 extern bool get_builtin_firmware(struct cpio_data
*cd
, const char *name
);
139 static inline void __init
load_ucode_bsp(void) { }
140 static inline void load_ucode_ap(void) { }
141 static inline int __init
save_microcode_in_initrd(void) { return 0; }
142 static inline void reload_early_microcode(void) { }
144 get_builtin_firmware(struct cpio_data
*cd
, const char *name
) { return false; }
146 #endif /* _ASM_X86_MICROCODE_H */