1 #ifndef _ASM_X86_PARAVIRT_H
2 #define _ASM_X86_PARAVIRT_H
3 /* Various instructions on x86 need to be replaced for
4 * para-virtualization: those hooks are defined here. */
7 #include <asm/pgtable_types.h>
10 #include <asm/paravirt_types.h>
13 #include <linux/bug.h>
14 #include <linux/types.h>
15 #include <linux/cpumask.h>
17 static inline int paravirt_enabled(void)
19 return pv_info
.paravirt_enabled
;
22 static inline int paravirt_has_feature(unsigned int feature
)
24 WARN_ON_ONCE(!pv_info
.paravirt_enabled
);
25 return (pv_info
.features
& feature
);
28 static inline void load_sp0(struct tss_struct
*tss
,
29 struct thread_struct
*thread
)
31 PVOP_VCALL2(pv_cpu_ops
.load_sp0
, tss
, thread
);
34 /* The paravirtualized CPUID instruction. */
35 static inline void __cpuid(unsigned int *eax
, unsigned int *ebx
,
36 unsigned int *ecx
, unsigned int *edx
)
38 PVOP_VCALL4(pv_cpu_ops
.cpuid
, eax
, ebx
, ecx
, edx
);
42 * These special macros can be used to get or set a debugging register
44 static inline unsigned long paravirt_get_debugreg(int reg
)
46 return PVOP_CALL1(unsigned long, pv_cpu_ops
.get_debugreg
, reg
);
48 #define get_debugreg(var, reg) var = paravirt_get_debugreg(reg)
49 static inline void set_debugreg(unsigned long val
, int reg
)
51 PVOP_VCALL2(pv_cpu_ops
.set_debugreg
, reg
, val
);
54 static inline void clts(void)
56 PVOP_VCALL0(pv_cpu_ops
.clts
);
59 static inline unsigned long read_cr0(void)
61 return PVOP_CALL0(unsigned long, pv_cpu_ops
.read_cr0
);
64 static inline void write_cr0(unsigned long x
)
66 PVOP_VCALL1(pv_cpu_ops
.write_cr0
, x
);
69 static inline unsigned long read_cr2(void)
71 return PVOP_CALL0(unsigned long, pv_mmu_ops
.read_cr2
);
74 static inline void write_cr2(unsigned long x
)
76 PVOP_VCALL1(pv_mmu_ops
.write_cr2
, x
);
79 static inline unsigned long read_cr3(void)
81 return PVOP_CALL0(unsigned long, pv_mmu_ops
.read_cr3
);
84 static inline void write_cr3(unsigned long x
)
86 PVOP_VCALL1(pv_mmu_ops
.write_cr3
, x
);
89 static inline unsigned long __read_cr4(void)
91 return PVOP_CALL0(unsigned long, pv_cpu_ops
.read_cr4
);
93 static inline unsigned long __read_cr4_safe(void)
95 return PVOP_CALL0(unsigned long, pv_cpu_ops
.read_cr4_safe
);
98 static inline void __write_cr4(unsigned long x
)
100 PVOP_VCALL1(pv_cpu_ops
.write_cr4
, x
);
104 static inline unsigned long read_cr8(void)
106 return PVOP_CALL0(unsigned long, pv_cpu_ops
.read_cr8
);
109 static inline void write_cr8(unsigned long x
)
111 PVOP_VCALL1(pv_cpu_ops
.write_cr8
, x
);
115 static inline void arch_safe_halt(void)
117 PVOP_VCALL0(pv_irq_ops
.safe_halt
);
120 static inline void halt(void)
122 PVOP_VCALL0(pv_irq_ops
.halt
);
125 static inline void wbinvd(void)
127 PVOP_VCALL0(pv_cpu_ops
.wbinvd
);
130 #define get_kernel_rpl() (pv_info.kernel_rpl)
132 static inline u64
paravirt_read_msr(unsigned msr
, int *err
)
134 return PVOP_CALL2(u64
, pv_cpu_ops
.read_msr
, msr
, err
);
137 static inline int paravirt_write_msr(unsigned msr
, unsigned low
, unsigned high
)
139 return PVOP_CALL3(int, pv_cpu_ops
.write_msr
, msr
, low
, high
);
142 /* These should all do BUG_ON(_err), but our headers are too tangled. */
143 #define rdmsr(msr, val1, val2) \
146 u64 _l = paravirt_read_msr(msr, &_err); \
151 #define wrmsr(msr, val1, val2) \
153 paravirt_write_msr(msr, val1, val2); \
156 #define rdmsrl(msr, val) \
159 val = paravirt_read_msr(msr, &_err); \
162 static inline void wrmsrl(unsigned msr
, u64 val
)
164 wrmsr(msr
, (u32
)val
, (u32
)(val
>>32));
167 #define wrmsr_safe(msr, a, b) paravirt_write_msr(msr, a, b)
169 /* rdmsr with exception handling */
170 #define rdmsr_safe(msr, a, b) \
173 u64 _l = paravirt_read_msr(msr, &_err); \
179 static inline int rdmsrl_safe(unsigned msr
, unsigned long long *p
)
183 *p
= paravirt_read_msr(msr
, &err
);
187 static inline unsigned long long paravirt_sched_clock(void)
189 return PVOP_CALL0(unsigned long long, pv_time_ops
.sched_clock
);
193 extern struct static_key paravirt_steal_enabled
;
194 extern struct static_key paravirt_steal_rq_enabled
;
196 static inline u64
paravirt_steal_clock(int cpu
)
198 return PVOP_CALL1(u64
, pv_time_ops
.steal_clock
, cpu
);
201 static inline unsigned long long paravirt_read_pmc(int counter
)
203 return PVOP_CALL1(u64
, pv_cpu_ops
.read_pmc
, counter
);
206 #define rdpmc(counter, low, high) \
208 u64 _l = paravirt_read_pmc(counter); \
213 #define rdpmcl(counter, val) ((val) = paravirt_read_pmc(counter))
215 static inline void paravirt_alloc_ldt(struct desc_struct
*ldt
, unsigned entries
)
217 PVOP_VCALL2(pv_cpu_ops
.alloc_ldt
, ldt
, entries
);
220 static inline void paravirt_free_ldt(struct desc_struct
*ldt
, unsigned entries
)
222 PVOP_VCALL2(pv_cpu_ops
.free_ldt
, ldt
, entries
);
225 static inline void load_TR_desc(void)
227 PVOP_VCALL0(pv_cpu_ops
.load_tr_desc
);
229 static inline void load_gdt(const struct desc_ptr
*dtr
)
231 PVOP_VCALL1(pv_cpu_ops
.load_gdt
, dtr
);
233 static inline void load_idt(const struct desc_ptr
*dtr
)
235 PVOP_VCALL1(pv_cpu_ops
.load_idt
, dtr
);
237 static inline void set_ldt(const void *addr
, unsigned entries
)
239 PVOP_VCALL2(pv_cpu_ops
.set_ldt
, addr
, entries
);
241 static inline void store_idt(struct desc_ptr
*dtr
)
243 PVOP_VCALL1(pv_cpu_ops
.store_idt
, dtr
);
245 static inline unsigned long paravirt_store_tr(void)
247 return PVOP_CALL0(unsigned long, pv_cpu_ops
.store_tr
);
249 #define store_tr(tr) ((tr) = paravirt_store_tr())
250 static inline void load_TLS(struct thread_struct
*t
, unsigned cpu
)
252 PVOP_VCALL2(pv_cpu_ops
.load_tls
, t
, cpu
);
256 static inline void load_gs_index(unsigned int gs
)
258 PVOP_VCALL1(pv_cpu_ops
.load_gs_index
, gs
);
262 static inline void write_ldt_entry(struct desc_struct
*dt
, int entry
,
265 PVOP_VCALL3(pv_cpu_ops
.write_ldt_entry
, dt
, entry
, desc
);
268 static inline void write_gdt_entry(struct desc_struct
*dt
, int entry
,
269 void *desc
, int type
)
271 PVOP_VCALL4(pv_cpu_ops
.write_gdt_entry
, dt
, entry
, desc
, type
);
274 static inline void write_idt_entry(gate_desc
*dt
, int entry
, const gate_desc
*g
)
276 PVOP_VCALL3(pv_cpu_ops
.write_idt_entry
, dt
, entry
, g
);
278 static inline void set_iopl_mask(unsigned mask
)
280 PVOP_VCALL1(pv_cpu_ops
.set_iopl_mask
, mask
);
283 /* The paravirtualized I/O functions */
284 static inline void slow_down_io(void)
286 pv_cpu_ops
.io_delay();
287 #ifdef REALLY_SLOW_IO
288 pv_cpu_ops
.io_delay();
289 pv_cpu_ops
.io_delay();
290 pv_cpu_ops
.io_delay();
294 static inline void paravirt_activate_mm(struct mm_struct
*prev
,
295 struct mm_struct
*next
)
297 PVOP_VCALL2(pv_mmu_ops
.activate_mm
, prev
, next
);
300 static inline void paravirt_arch_dup_mmap(struct mm_struct
*oldmm
,
301 struct mm_struct
*mm
)
303 PVOP_VCALL2(pv_mmu_ops
.dup_mmap
, oldmm
, mm
);
306 static inline void paravirt_arch_exit_mmap(struct mm_struct
*mm
)
308 PVOP_VCALL1(pv_mmu_ops
.exit_mmap
, mm
);
311 static inline void __flush_tlb(void)
313 PVOP_VCALL0(pv_mmu_ops
.flush_tlb_user
);
315 static inline void __flush_tlb_global(void)
317 PVOP_VCALL0(pv_mmu_ops
.flush_tlb_kernel
);
319 static inline void __flush_tlb_single(unsigned long addr
)
321 PVOP_VCALL1(pv_mmu_ops
.flush_tlb_single
, addr
);
324 static inline void flush_tlb_others(const struct cpumask
*cpumask
,
325 struct mm_struct
*mm
,
329 PVOP_VCALL4(pv_mmu_ops
.flush_tlb_others
, cpumask
, mm
, start
, end
);
332 static inline int paravirt_pgd_alloc(struct mm_struct
*mm
)
334 return PVOP_CALL1(int, pv_mmu_ops
.pgd_alloc
, mm
);
337 static inline void paravirt_pgd_free(struct mm_struct
*mm
, pgd_t
*pgd
)
339 PVOP_VCALL2(pv_mmu_ops
.pgd_free
, mm
, pgd
);
342 static inline void paravirt_alloc_pte(struct mm_struct
*mm
, unsigned long pfn
)
344 PVOP_VCALL2(pv_mmu_ops
.alloc_pte
, mm
, pfn
);
346 static inline void paravirt_release_pte(unsigned long pfn
)
348 PVOP_VCALL1(pv_mmu_ops
.release_pte
, pfn
);
351 static inline void paravirt_alloc_pmd(struct mm_struct
*mm
, unsigned long pfn
)
353 PVOP_VCALL2(pv_mmu_ops
.alloc_pmd
, mm
, pfn
);
356 static inline void paravirt_release_pmd(unsigned long pfn
)
358 PVOP_VCALL1(pv_mmu_ops
.release_pmd
, pfn
);
361 static inline void paravirt_alloc_pud(struct mm_struct
*mm
, unsigned long pfn
)
363 PVOP_VCALL2(pv_mmu_ops
.alloc_pud
, mm
, pfn
);
365 static inline void paravirt_release_pud(unsigned long pfn
)
367 PVOP_VCALL1(pv_mmu_ops
.release_pud
, pfn
);
370 static inline void pte_update(struct mm_struct
*mm
, unsigned long addr
,
373 PVOP_VCALL3(pv_mmu_ops
.pte_update
, mm
, addr
, ptep
);
376 static inline pte_t
__pte(pteval_t val
)
380 if (sizeof(pteval_t
) > sizeof(long))
381 ret
= PVOP_CALLEE2(pteval_t
,
383 val
, (u64
)val
>> 32);
385 ret
= PVOP_CALLEE1(pteval_t
,
389 return (pte_t
) { .pte
= ret
};
392 static inline pteval_t
pte_val(pte_t pte
)
396 if (sizeof(pteval_t
) > sizeof(long))
397 ret
= PVOP_CALLEE2(pteval_t
, pv_mmu_ops
.pte_val
,
398 pte
.pte
, (u64
)pte
.pte
>> 32);
400 ret
= PVOP_CALLEE1(pteval_t
, pv_mmu_ops
.pte_val
,
406 static inline pgd_t
__pgd(pgdval_t val
)
410 if (sizeof(pgdval_t
) > sizeof(long))
411 ret
= PVOP_CALLEE2(pgdval_t
, pv_mmu_ops
.make_pgd
,
412 val
, (u64
)val
>> 32);
414 ret
= PVOP_CALLEE1(pgdval_t
, pv_mmu_ops
.make_pgd
,
417 return (pgd_t
) { ret
};
420 static inline pgdval_t
pgd_val(pgd_t pgd
)
424 if (sizeof(pgdval_t
) > sizeof(long))
425 ret
= PVOP_CALLEE2(pgdval_t
, pv_mmu_ops
.pgd_val
,
426 pgd
.pgd
, (u64
)pgd
.pgd
>> 32);
428 ret
= PVOP_CALLEE1(pgdval_t
, pv_mmu_ops
.pgd_val
,
434 #define __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
435 static inline pte_t
ptep_modify_prot_start(struct mm_struct
*mm
, unsigned long addr
,
440 ret
= PVOP_CALL3(pteval_t
, pv_mmu_ops
.ptep_modify_prot_start
,
443 return (pte_t
) { .pte
= ret
};
446 static inline void ptep_modify_prot_commit(struct mm_struct
*mm
, unsigned long addr
,
447 pte_t
*ptep
, pte_t pte
)
449 if (sizeof(pteval_t
) > sizeof(long))
451 pv_mmu_ops
.ptep_modify_prot_commit(mm
, addr
, ptep
, pte
);
453 PVOP_VCALL4(pv_mmu_ops
.ptep_modify_prot_commit
,
454 mm
, addr
, ptep
, pte
.pte
);
457 static inline void set_pte(pte_t
*ptep
, pte_t pte
)
459 if (sizeof(pteval_t
) > sizeof(long))
460 PVOP_VCALL3(pv_mmu_ops
.set_pte
, ptep
,
461 pte
.pte
, (u64
)pte
.pte
>> 32);
463 PVOP_VCALL2(pv_mmu_ops
.set_pte
, ptep
,
467 static inline void set_pte_at(struct mm_struct
*mm
, unsigned long addr
,
468 pte_t
*ptep
, pte_t pte
)
470 if (sizeof(pteval_t
) > sizeof(long))
472 pv_mmu_ops
.set_pte_at(mm
, addr
, ptep
, pte
);
474 PVOP_VCALL4(pv_mmu_ops
.set_pte_at
, mm
, addr
, ptep
, pte
.pte
);
477 static inline void set_pmd_at(struct mm_struct
*mm
, unsigned long addr
,
478 pmd_t
*pmdp
, pmd_t pmd
)
480 if (sizeof(pmdval_t
) > sizeof(long))
482 pv_mmu_ops
.set_pmd_at(mm
, addr
, pmdp
, pmd
);
484 PVOP_VCALL4(pv_mmu_ops
.set_pmd_at
, mm
, addr
, pmdp
,
485 native_pmd_val(pmd
));
488 static inline void set_pmd(pmd_t
*pmdp
, pmd_t pmd
)
490 pmdval_t val
= native_pmd_val(pmd
);
492 if (sizeof(pmdval_t
) > sizeof(long))
493 PVOP_VCALL3(pv_mmu_ops
.set_pmd
, pmdp
, val
, (u64
)val
>> 32);
495 PVOP_VCALL2(pv_mmu_ops
.set_pmd
, pmdp
, val
);
498 #if CONFIG_PGTABLE_LEVELS >= 3
499 static inline pmd_t
__pmd(pmdval_t val
)
503 if (sizeof(pmdval_t
) > sizeof(long))
504 ret
= PVOP_CALLEE2(pmdval_t
, pv_mmu_ops
.make_pmd
,
505 val
, (u64
)val
>> 32);
507 ret
= PVOP_CALLEE1(pmdval_t
, pv_mmu_ops
.make_pmd
,
510 return (pmd_t
) { ret
};
513 static inline pmdval_t
pmd_val(pmd_t pmd
)
517 if (sizeof(pmdval_t
) > sizeof(long))
518 ret
= PVOP_CALLEE2(pmdval_t
, pv_mmu_ops
.pmd_val
,
519 pmd
.pmd
, (u64
)pmd
.pmd
>> 32);
521 ret
= PVOP_CALLEE1(pmdval_t
, pv_mmu_ops
.pmd_val
,
527 static inline void set_pud(pud_t
*pudp
, pud_t pud
)
529 pudval_t val
= native_pud_val(pud
);
531 if (sizeof(pudval_t
) > sizeof(long))
532 PVOP_VCALL3(pv_mmu_ops
.set_pud
, pudp
,
533 val
, (u64
)val
>> 32);
535 PVOP_VCALL2(pv_mmu_ops
.set_pud
, pudp
,
538 #if CONFIG_PGTABLE_LEVELS == 4
539 static inline pud_t
__pud(pudval_t val
)
543 if (sizeof(pudval_t
) > sizeof(long))
544 ret
= PVOP_CALLEE2(pudval_t
, pv_mmu_ops
.make_pud
,
545 val
, (u64
)val
>> 32);
547 ret
= PVOP_CALLEE1(pudval_t
, pv_mmu_ops
.make_pud
,
550 return (pud_t
) { ret
};
553 static inline pudval_t
pud_val(pud_t pud
)
557 if (sizeof(pudval_t
) > sizeof(long))
558 ret
= PVOP_CALLEE2(pudval_t
, pv_mmu_ops
.pud_val
,
559 pud
.pud
, (u64
)pud
.pud
>> 32);
561 ret
= PVOP_CALLEE1(pudval_t
, pv_mmu_ops
.pud_val
,
567 static inline void set_pgd(pgd_t
*pgdp
, pgd_t pgd
)
569 pgdval_t val
= native_pgd_val(pgd
);
571 if (sizeof(pgdval_t
) > sizeof(long))
572 PVOP_VCALL3(pv_mmu_ops
.set_pgd
, pgdp
,
573 val
, (u64
)val
>> 32);
575 PVOP_VCALL2(pv_mmu_ops
.set_pgd
, pgdp
,
579 static inline void pgd_clear(pgd_t
*pgdp
)
581 set_pgd(pgdp
, __pgd(0));
584 static inline void pud_clear(pud_t
*pudp
)
586 set_pud(pudp
, __pud(0));
589 #endif /* CONFIG_PGTABLE_LEVELS == 4 */
591 #endif /* CONFIG_PGTABLE_LEVELS >= 3 */
593 #ifdef CONFIG_X86_PAE
594 /* Special-case pte-setting operations for PAE, which can't update a
595 64-bit pte atomically */
596 static inline void set_pte_atomic(pte_t
*ptep
, pte_t pte
)
598 PVOP_VCALL3(pv_mmu_ops
.set_pte_atomic
, ptep
,
599 pte
.pte
, pte
.pte
>> 32);
602 static inline void pte_clear(struct mm_struct
*mm
, unsigned long addr
,
605 PVOP_VCALL3(pv_mmu_ops
.pte_clear
, mm
, addr
, ptep
);
608 static inline void pmd_clear(pmd_t
*pmdp
)
610 PVOP_VCALL1(pv_mmu_ops
.pmd_clear
, pmdp
);
612 #else /* !CONFIG_X86_PAE */
613 static inline void set_pte_atomic(pte_t
*ptep
, pte_t pte
)
618 static inline void pte_clear(struct mm_struct
*mm
, unsigned long addr
,
621 set_pte_at(mm
, addr
, ptep
, __pte(0));
624 static inline void pmd_clear(pmd_t
*pmdp
)
626 set_pmd(pmdp
, __pmd(0));
628 #endif /* CONFIG_X86_PAE */
630 #define __HAVE_ARCH_START_CONTEXT_SWITCH
631 static inline void arch_start_context_switch(struct task_struct
*prev
)
633 PVOP_VCALL1(pv_cpu_ops
.start_context_switch
, prev
);
636 static inline void arch_end_context_switch(struct task_struct
*next
)
638 PVOP_VCALL1(pv_cpu_ops
.end_context_switch
, next
);
641 #define __HAVE_ARCH_ENTER_LAZY_MMU_MODE
642 static inline void arch_enter_lazy_mmu_mode(void)
644 PVOP_VCALL0(pv_mmu_ops
.lazy_mode
.enter
);
647 static inline void arch_leave_lazy_mmu_mode(void)
649 PVOP_VCALL0(pv_mmu_ops
.lazy_mode
.leave
);
652 static inline void arch_flush_lazy_mmu_mode(void)
654 PVOP_VCALL0(pv_mmu_ops
.lazy_mode
.flush
);
657 static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx
,
658 phys_addr_t phys
, pgprot_t flags
)
660 pv_mmu_ops
.set_fixmap(idx
, phys
, flags
);
663 #if defined(CONFIG_SMP) && defined(CONFIG_PARAVIRT_SPINLOCKS)
665 #ifdef CONFIG_QUEUED_SPINLOCKS
667 static __always_inline
void pv_queued_spin_lock_slowpath(struct qspinlock
*lock
,
670 PVOP_VCALL2(pv_lock_ops
.queued_spin_lock_slowpath
, lock
, val
);
673 static __always_inline
void pv_queued_spin_unlock(struct qspinlock
*lock
)
675 PVOP_VCALLEE1(pv_lock_ops
.queued_spin_unlock
, lock
);
678 static __always_inline
void pv_wait(u8
*ptr
, u8 val
)
680 PVOP_VCALL2(pv_lock_ops
.wait
, ptr
, val
);
683 static __always_inline
void pv_kick(int cpu
)
685 PVOP_VCALL1(pv_lock_ops
.kick
, cpu
);
688 #else /* !CONFIG_QUEUED_SPINLOCKS */
690 static __always_inline
void __ticket_lock_spinning(struct arch_spinlock
*lock
,
693 PVOP_VCALLEE2(pv_lock_ops
.lock_spinning
, lock
, ticket
);
696 static __always_inline
void __ticket_unlock_kick(struct arch_spinlock
*lock
,
699 PVOP_VCALL2(pv_lock_ops
.unlock_kick
, lock
, ticket
);
702 #endif /* CONFIG_QUEUED_SPINLOCKS */
704 #endif /* SMP && PARAVIRT_SPINLOCKS */
707 #define PV_SAVE_REGS "pushl %ecx; pushl %edx;"
708 #define PV_RESTORE_REGS "popl %edx; popl %ecx;"
710 /* save and restore all caller-save registers, except return value */
711 #define PV_SAVE_ALL_CALLER_REGS "pushl %ecx;"
712 #define PV_RESTORE_ALL_CALLER_REGS "popl %ecx;"
714 #define PV_FLAGS_ARG "0"
715 #define PV_EXTRA_CLOBBERS
716 #define PV_VEXTRA_CLOBBERS
718 /* save and restore all caller-save registers, except return value */
719 #define PV_SAVE_ALL_CALLER_REGS \
728 #define PV_RESTORE_ALL_CALLER_REGS \
738 /* We save some registers, but all of them, that's too much. We clobber all
739 * caller saved registers but the argument parameter */
740 #define PV_SAVE_REGS "pushq %%rdi;"
741 #define PV_RESTORE_REGS "popq %%rdi;"
742 #define PV_EXTRA_CLOBBERS EXTRA_CLOBBERS, "rcx" , "rdx", "rsi"
743 #define PV_VEXTRA_CLOBBERS EXTRA_CLOBBERS, "rdi", "rcx" , "rdx", "rsi"
744 #define PV_FLAGS_ARG "D"
748 * Generate a thunk around a function which saves all caller-save
749 * registers except for the return value. This allows C functions to
750 * be called from assembler code where fewer than normal registers are
751 * available. It may also help code generation around calls from C
752 * code if the common case doesn't use many registers.
754 * When a callee is wrapped in a thunk, the caller can assume that all
755 * arg regs and all scratch registers are preserved across the
756 * call. The return value in rax/eax will not be saved, even for void
759 #define PV_CALLEE_SAVE_REGS_THUNK(func) \
760 extern typeof(func) __raw_callee_save_##func; \
762 asm(".pushsection .text;" \
763 ".globl __raw_callee_save_" #func " ; " \
764 "__raw_callee_save_" #func ": " \
765 PV_SAVE_ALL_CALLER_REGS \
767 PV_RESTORE_ALL_CALLER_REGS \
771 /* Get a reference to a callee-save function */
772 #define PV_CALLEE_SAVE(func) \
773 ((struct paravirt_callee_save) { __raw_callee_save_##func })
775 /* Promise that "func" already uses the right calling convention */
776 #define __PV_IS_CALLEE_SAVE(func) \
777 ((struct paravirt_callee_save) { func })
779 static inline notrace
unsigned long arch_local_save_flags(void)
781 return PVOP_CALLEE0(unsigned long, pv_irq_ops
.save_fl
);
784 static inline notrace
void arch_local_irq_restore(unsigned long f
)
786 PVOP_VCALLEE1(pv_irq_ops
.restore_fl
, f
);
789 static inline notrace
void arch_local_irq_disable(void)
791 PVOP_VCALLEE0(pv_irq_ops
.irq_disable
);
794 static inline notrace
void arch_local_irq_enable(void)
796 PVOP_VCALLEE0(pv_irq_ops
.irq_enable
);
799 static inline notrace
unsigned long arch_local_irq_save(void)
803 f
= arch_local_save_flags();
804 arch_local_irq_disable();
809 /* Make sure as little as possible of this mess escapes. */
824 extern void default_banner(void);
826 #else /* __ASSEMBLY__ */
828 #define _PVSITE(ptype, clobbers, ops, word, algn) \
832 .pushsection .parainstructions,"a"; \
841 #define COND_PUSH(set, mask, reg) \
842 .if ((~(set)) & mask); push %reg; .endif
843 #define COND_POP(set, mask, reg) \
844 .if ((~(set)) & mask); pop %reg; .endif
848 #define PV_SAVE_REGS(set) \
849 COND_PUSH(set, CLBR_RAX, rax); \
850 COND_PUSH(set, CLBR_RCX, rcx); \
851 COND_PUSH(set, CLBR_RDX, rdx); \
852 COND_PUSH(set, CLBR_RSI, rsi); \
853 COND_PUSH(set, CLBR_RDI, rdi); \
854 COND_PUSH(set, CLBR_R8, r8); \
855 COND_PUSH(set, CLBR_R9, r9); \
856 COND_PUSH(set, CLBR_R10, r10); \
857 COND_PUSH(set, CLBR_R11, r11)
858 #define PV_RESTORE_REGS(set) \
859 COND_POP(set, CLBR_R11, r11); \
860 COND_POP(set, CLBR_R10, r10); \
861 COND_POP(set, CLBR_R9, r9); \
862 COND_POP(set, CLBR_R8, r8); \
863 COND_POP(set, CLBR_RDI, rdi); \
864 COND_POP(set, CLBR_RSI, rsi); \
865 COND_POP(set, CLBR_RDX, rdx); \
866 COND_POP(set, CLBR_RCX, rcx); \
867 COND_POP(set, CLBR_RAX, rax)
869 #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 8)
870 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .quad, 8)
871 #define PARA_INDIRECT(addr) *addr(%rip)
873 #define PV_SAVE_REGS(set) \
874 COND_PUSH(set, CLBR_EAX, eax); \
875 COND_PUSH(set, CLBR_EDI, edi); \
876 COND_PUSH(set, CLBR_ECX, ecx); \
877 COND_PUSH(set, CLBR_EDX, edx)
878 #define PV_RESTORE_REGS(set) \
879 COND_POP(set, CLBR_EDX, edx); \
880 COND_POP(set, CLBR_ECX, ecx); \
881 COND_POP(set, CLBR_EDI, edi); \
882 COND_POP(set, CLBR_EAX, eax)
884 #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 4)
885 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .long, 4)
886 #define PARA_INDIRECT(addr) *%cs:addr
889 #define INTERRUPT_RETURN \
890 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_iret), CLBR_NONE, \
891 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_iret))
893 #define DISABLE_INTERRUPTS(clobbers) \
894 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_disable), clobbers, \
895 PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE); \
896 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_disable); \
897 PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
899 #define ENABLE_INTERRUPTS(clobbers) \
900 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_enable), clobbers, \
901 PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE); \
902 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_enable); \
903 PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
906 #define GET_CR0_INTO_EAX \
907 push %ecx; push %edx; \
908 call PARA_INDIRECT(pv_cpu_ops+PV_CPU_read_cr0); \
910 #else /* !CONFIG_X86_32 */
913 * If swapgs is used while the userspace stack is still current,
914 * there's no way to call a pvop. The PV replacement *must* be
915 * inlined, or the swapgs instruction must be trapped and emulated.
917 #define SWAPGS_UNSAFE_STACK \
918 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \
922 * Note: swapgs is very special, and in practise is either going to be
923 * implemented with a single "swapgs" instruction or something very
924 * special. Either way, we don't need to save any registers for
928 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \
929 call PARA_INDIRECT(pv_cpu_ops+PV_CPU_swapgs) \
932 #define GET_CR2_INTO_RAX \
933 call PARA_INDIRECT(pv_mmu_ops+PV_MMU_read_cr2)
935 #define PARAVIRT_ADJUST_EXCEPTION_FRAME \
936 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_adjust_exception_frame), \
938 call PARA_INDIRECT(pv_irq_ops+PV_IRQ_adjust_exception_frame))
940 #define USERGS_SYSRET64 \
941 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret64), \
943 jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret64))
944 #endif /* CONFIG_X86_32 */
946 #endif /* __ASSEMBLY__ */
947 #else /* CONFIG_PARAVIRT */
948 # define default_banner x86_init_noop
950 static inline void paravirt_arch_dup_mmap(struct mm_struct
*oldmm
,
951 struct mm_struct
*mm
)
955 static inline void paravirt_arch_exit_mmap(struct mm_struct
*mm
)
958 #endif /* __ASSEMBLY__ */
959 #endif /* !CONFIG_PARAVIRT */
960 #endif /* _ASM_X86_PARAVIRT_H */