2 * Copyright (C) 2001 MandrakeSoft S.A.
3 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
8 * http://www.linux-mandrake.com/
9 * http://www.mandrakesoft.com/
11 * This library is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU Lesser General Public
13 * License as published by the Free Software Foundation; either
14 * version 2 of the License, or (at your option) any later version.
16 * This library is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * Lesser General Public License for more details.
21 * You should have received a copy of the GNU Lesser General Public
22 * License along with this library; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 * Yunhong Jiang <yunhong.jiang@intel.com>
26 * Yaozu (Eddie) Dong <eddie.dong@intel.com>
27 * Based on Xen 3.1 code.
30 #include <linux/kvm_host.h>
31 #include <linux/kvm.h>
33 #include <linux/highmem.h>
34 #include <linux/smp.h>
35 #include <linux/hrtimer.h>
37 #include <linux/slab.h>
38 #include <linux/export.h>
39 #include <asm/processor.h>
41 #include <asm/current.h>
42 #include <trace/events/kvm.h>
49 #define ioapic_debug(fmt,arg...) printk(KERN_WARNING fmt,##arg)
51 #define ioapic_debug(fmt, arg...)
53 static int ioapic_service(struct kvm_ioapic
*vioapic
, int irq
,
56 static unsigned long ioapic_read_indirect(struct kvm_ioapic
*ioapic
,
60 unsigned long result
= 0;
62 switch (ioapic
->ioregsel
) {
63 case IOAPIC_REG_VERSION
:
64 result
= ((((IOAPIC_NUM_PINS
- 1) & 0xff) << 16)
65 | (IOAPIC_VERSION_ID
& 0xff));
68 case IOAPIC_REG_APIC_ID
:
69 case IOAPIC_REG_ARB_ID
:
70 result
= ((ioapic
->id
& 0xf) << 24);
75 u32 redir_index
= (ioapic
->ioregsel
- 0x10) >> 1;
78 if (redir_index
< IOAPIC_NUM_PINS
)
80 ioapic
->redirtbl
[redir_index
].bits
;
82 redir_content
= ~0ULL;
84 result
= (ioapic
->ioregsel
& 0x1) ?
85 (redir_content
>> 32) & 0xffffffff :
86 redir_content
& 0xffffffff;
94 static void rtc_irq_eoi_tracking_reset(struct kvm_ioapic
*ioapic
)
96 ioapic
->rtc_status
.pending_eoi
= 0;
97 bitmap_zero(ioapic
->rtc_status
.dest_map
, KVM_MAX_VCPUS
);
100 static void kvm_rtc_eoi_tracking_restore_all(struct kvm_ioapic
*ioapic
);
102 static void rtc_status_pending_eoi_check_valid(struct kvm_ioapic
*ioapic
)
104 if (WARN_ON(ioapic
->rtc_status
.pending_eoi
< 0))
105 kvm_rtc_eoi_tracking_restore_all(ioapic
);
108 static void __rtc_irq_eoi_tracking_restore_one(struct kvm_vcpu
*vcpu
)
110 bool new_val
, old_val
;
111 struct kvm_ioapic
*ioapic
= vcpu
->kvm
->arch
.vioapic
;
112 union kvm_ioapic_redirect_entry
*e
;
114 e
= &ioapic
->redirtbl
[RTC_GSI
];
115 if (!kvm_apic_match_dest(vcpu
, NULL
, 0, e
->fields
.dest_id
,
116 e
->fields
.dest_mode
))
119 new_val
= kvm_apic_pending_eoi(vcpu
, e
->fields
.vector
);
120 old_val
= test_bit(vcpu
->vcpu_id
, ioapic
->rtc_status
.dest_map
);
122 if (new_val
== old_val
)
126 __set_bit(vcpu
->vcpu_id
, ioapic
->rtc_status
.dest_map
);
127 ioapic
->rtc_status
.pending_eoi
++;
129 __clear_bit(vcpu
->vcpu_id
, ioapic
->rtc_status
.dest_map
);
130 ioapic
->rtc_status
.pending_eoi
--;
131 rtc_status_pending_eoi_check_valid(ioapic
);
135 void kvm_rtc_eoi_tracking_restore_one(struct kvm_vcpu
*vcpu
)
137 struct kvm_ioapic
*ioapic
= vcpu
->kvm
->arch
.vioapic
;
139 spin_lock(&ioapic
->lock
);
140 __rtc_irq_eoi_tracking_restore_one(vcpu
);
141 spin_unlock(&ioapic
->lock
);
144 static void kvm_rtc_eoi_tracking_restore_all(struct kvm_ioapic
*ioapic
)
146 struct kvm_vcpu
*vcpu
;
149 if (RTC_GSI
>= IOAPIC_NUM_PINS
)
152 rtc_irq_eoi_tracking_reset(ioapic
);
153 kvm_for_each_vcpu(i
, vcpu
, ioapic
->kvm
)
154 __rtc_irq_eoi_tracking_restore_one(vcpu
);
157 static void rtc_irq_eoi(struct kvm_ioapic
*ioapic
, struct kvm_vcpu
*vcpu
)
159 if (test_and_clear_bit(vcpu
->vcpu_id
, ioapic
->rtc_status
.dest_map
)) {
160 --ioapic
->rtc_status
.pending_eoi
;
161 rtc_status_pending_eoi_check_valid(ioapic
);
165 static bool rtc_irq_check_coalesced(struct kvm_ioapic
*ioapic
)
167 if (ioapic
->rtc_status
.pending_eoi
> 0)
168 return true; /* coalesced */
173 static int ioapic_set_irq(struct kvm_ioapic
*ioapic
, unsigned int irq
,
174 int irq_level
, bool line_status
)
176 union kvm_ioapic_redirect_entry entry
;
181 entry
= ioapic
->redirtbl
[irq
];
182 edge
= (entry
.fields
.trig_mode
== IOAPIC_EDGE_TRIG
);
185 ioapic
->irr
&= ~mask
;
191 * Return 0 for coalesced interrupts; for edge-triggered interrupts,
192 * this only happens if a previous edge has not been delivered due
193 * do masking. For level interrupts, the remote_irr field tells
194 * us if the interrupt is waiting for an EOI.
196 * RTC is special: it is edge-triggered, but userspace likes to know
197 * if it has been already ack-ed via EOI because coalesced RTC
198 * interrupts lead to time drift in Windows guests. So we track
199 * EOI manually for the RTC interrupt.
201 if (irq
== RTC_GSI
&& line_status
&&
202 rtc_irq_check_coalesced(ioapic
)) {
207 old_irr
= ioapic
->irr
;
210 ioapic
->irr_delivered
&= ~mask
;
211 if ((edge
&& old_irr
== ioapic
->irr
) ||
212 (!edge
&& entry
.fields
.remote_irr
)) {
217 ret
= ioapic_service(ioapic
, irq
, line_status
);
220 trace_kvm_ioapic_set_irq(entry
.bits
, irq
, ret
== 0);
224 static void kvm_ioapic_inject_all(struct kvm_ioapic
*ioapic
, unsigned long irr
)
228 rtc_irq_eoi_tracking_reset(ioapic
);
229 for_each_set_bit(idx
, &irr
, IOAPIC_NUM_PINS
)
230 ioapic_set_irq(ioapic
, idx
, 1, true);
232 kvm_rtc_eoi_tracking_restore_all(ioapic
);
236 void kvm_ioapic_scan_entry(struct kvm_vcpu
*vcpu
, u64
*eoi_exit_bitmap
)
238 struct kvm_ioapic
*ioapic
= vcpu
->kvm
->arch
.vioapic
;
239 union kvm_ioapic_redirect_entry
*e
;
242 spin_lock(&ioapic
->lock
);
243 for (index
= 0; index
< IOAPIC_NUM_PINS
; index
++) {
244 e
= &ioapic
->redirtbl
[index
];
245 if (e
->fields
.trig_mode
== IOAPIC_LEVEL_TRIG
||
246 kvm_irq_has_notifier(ioapic
->kvm
, KVM_IRQCHIP_IOAPIC
, index
) ||
248 if (kvm_apic_match_dest(vcpu
, NULL
, 0,
249 e
->fields
.dest_id
, e
->fields
.dest_mode
) ||
250 (e
->fields
.trig_mode
== IOAPIC_EDGE_TRIG
&&
251 kvm_apic_pending_eoi(vcpu
, e
->fields
.vector
)))
252 __set_bit(e
->fields
.vector
,
253 (unsigned long *)eoi_exit_bitmap
);
256 spin_unlock(&ioapic
->lock
);
259 void kvm_vcpu_request_scan_ioapic(struct kvm
*kvm
)
261 struct kvm_ioapic
*ioapic
= kvm
->arch
.vioapic
;
265 kvm_make_scan_ioapic_request(kvm
);
268 static void ioapic_write_indirect(struct kvm_ioapic
*ioapic
, u32 val
)
271 bool mask_before
, mask_after
;
272 union kvm_ioapic_redirect_entry
*e
;
274 switch (ioapic
->ioregsel
) {
275 case IOAPIC_REG_VERSION
:
276 /* Writes are ignored. */
279 case IOAPIC_REG_APIC_ID
:
280 ioapic
->id
= (val
>> 24) & 0xf;
283 case IOAPIC_REG_ARB_ID
:
287 index
= (ioapic
->ioregsel
- 0x10) >> 1;
289 ioapic_debug("change redir index %x val %x\n", index
, val
);
290 if (index
>= IOAPIC_NUM_PINS
)
292 e
= &ioapic
->redirtbl
[index
];
293 mask_before
= e
->fields
.mask
;
294 if (ioapic
->ioregsel
& 1) {
295 e
->bits
&= 0xffffffff;
296 e
->bits
|= (u64
) val
<< 32;
298 e
->bits
&= ~0xffffffffULL
;
299 e
->bits
|= (u32
) val
;
300 e
->fields
.remote_irr
= 0;
302 mask_after
= e
->fields
.mask
;
303 if (mask_before
!= mask_after
)
304 kvm_fire_mask_notifiers(ioapic
->kvm
, KVM_IRQCHIP_IOAPIC
, index
, mask_after
);
305 if (e
->fields
.trig_mode
== IOAPIC_LEVEL_TRIG
306 && ioapic
->irr
& (1 << index
))
307 ioapic_service(ioapic
, index
, false);
308 kvm_vcpu_request_scan_ioapic(ioapic
->kvm
);
313 static int ioapic_service(struct kvm_ioapic
*ioapic
, int irq
, bool line_status
)
315 union kvm_ioapic_redirect_entry
*entry
= &ioapic
->redirtbl
[irq
];
316 struct kvm_lapic_irq irqe
;
319 if (entry
->fields
.mask
)
322 ioapic_debug("dest=%x dest_mode=%x delivery_mode=%x "
323 "vector=%x trig_mode=%x\n",
324 entry
->fields
.dest_id
, entry
->fields
.dest_mode
,
325 entry
->fields
.delivery_mode
, entry
->fields
.vector
,
326 entry
->fields
.trig_mode
);
328 irqe
.dest_id
= entry
->fields
.dest_id
;
329 irqe
.vector
= entry
->fields
.vector
;
330 irqe
.dest_mode
= entry
->fields
.dest_mode
;
331 irqe
.trig_mode
= entry
->fields
.trig_mode
;
332 irqe
.delivery_mode
= entry
->fields
.delivery_mode
<< 8;
335 irqe
.msi_redir_hint
= false;
337 if (irqe
.trig_mode
== IOAPIC_EDGE_TRIG
)
338 ioapic
->irr_delivered
|= 1 << irq
;
340 if (irq
== RTC_GSI
&& line_status
) {
342 * pending_eoi cannot ever become negative (see
343 * rtc_status_pending_eoi_check_valid) and the caller
344 * ensures that it is only called if it is >= zero, namely
345 * if rtc_irq_check_coalesced returns false).
347 BUG_ON(ioapic
->rtc_status
.pending_eoi
!= 0);
348 ret
= kvm_irq_delivery_to_apic(ioapic
->kvm
, NULL
, &irqe
,
349 ioapic
->rtc_status
.dest_map
);
350 ioapic
->rtc_status
.pending_eoi
= (ret
< 0 ? 0 : ret
);
352 ret
= kvm_irq_delivery_to_apic(ioapic
->kvm
, NULL
, &irqe
, NULL
);
354 if (ret
&& irqe
.trig_mode
== IOAPIC_LEVEL_TRIG
)
355 entry
->fields
.remote_irr
= 1;
360 int kvm_ioapic_set_irq(struct kvm_ioapic
*ioapic
, int irq
, int irq_source_id
,
361 int level
, bool line_status
)
365 BUG_ON(irq
< 0 || irq
>= IOAPIC_NUM_PINS
);
367 spin_lock(&ioapic
->lock
);
368 irq_level
= __kvm_irq_line_state(&ioapic
->irq_states
[irq
],
369 irq_source_id
, level
);
370 ret
= ioapic_set_irq(ioapic
, irq
, irq_level
, line_status
);
372 spin_unlock(&ioapic
->lock
);
377 void kvm_ioapic_clear_all(struct kvm_ioapic
*ioapic
, int irq_source_id
)
381 spin_lock(&ioapic
->lock
);
382 for (i
= 0; i
< KVM_IOAPIC_NUM_PINS
; i
++)
383 __clear_bit(irq_source_id
, &ioapic
->irq_states
[i
]);
384 spin_unlock(&ioapic
->lock
);
387 static void kvm_ioapic_eoi_inject_work(struct work_struct
*work
)
390 struct kvm_ioapic
*ioapic
= container_of(work
, struct kvm_ioapic
,
392 spin_lock(&ioapic
->lock
);
393 for (i
= 0; i
< IOAPIC_NUM_PINS
; i
++) {
394 union kvm_ioapic_redirect_entry
*ent
= &ioapic
->redirtbl
[i
];
396 if (ent
->fields
.trig_mode
!= IOAPIC_LEVEL_TRIG
)
399 if (ioapic
->irr
& (1 << i
) && !ent
->fields
.remote_irr
)
400 ioapic_service(ioapic
, i
, false);
402 spin_unlock(&ioapic
->lock
);
405 #define IOAPIC_SUCCESSIVE_IRQ_MAX_COUNT 10000
407 static void __kvm_ioapic_update_eoi(struct kvm_vcpu
*vcpu
,
408 struct kvm_ioapic
*ioapic
, int vector
, int trigger_mode
)
411 struct kvm_lapic
*apic
= vcpu
->arch
.apic
;
413 for (i
= 0; i
< IOAPIC_NUM_PINS
; i
++) {
414 union kvm_ioapic_redirect_entry
*ent
= &ioapic
->redirtbl
[i
];
416 if (ent
->fields
.vector
!= vector
)
420 rtc_irq_eoi(ioapic
, vcpu
);
422 * We are dropping lock while calling ack notifiers because ack
423 * notifier callbacks for assigned devices call into IOAPIC
424 * recursively. Since remote_irr is cleared only after call
425 * to notifiers if the same vector will be delivered while lock
426 * is dropped it will be put into irr and will be delivered
427 * after ack notifier returns.
429 spin_unlock(&ioapic
->lock
);
430 kvm_notify_acked_irq(ioapic
->kvm
, KVM_IRQCHIP_IOAPIC
, i
);
431 spin_lock(&ioapic
->lock
);
433 if (trigger_mode
!= IOAPIC_LEVEL_TRIG
||
434 kvm_apic_get_reg(apic
, APIC_SPIV
) & APIC_SPIV_DIRECTED_EOI
)
437 ASSERT(ent
->fields
.trig_mode
== IOAPIC_LEVEL_TRIG
);
438 ent
->fields
.remote_irr
= 0;
439 if (!ent
->fields
.mask
&& (ioapic
->irr
& (1 << i
))) {
440 ++ioapic
->irq_eoi
[i
];
441 if (ioapic
->irq_eoi
[i
] == IOAPIC_SUCCESSIVE_IRQ_MAX_COUNT
) {
443 * Real hardware does not deliver the interrupt
444 * immediately during eoi broadcast, and this
445 * lets a buggy guest make slow progress
446 * even if it does not correctly handle a
447 * level-triggered interrupt. Emulate this
448 * behavior if we detect an interrupt storm.
450 schedule_delayed_work(&ioapic
->eoi_inject
, HZ
/ 100);
451 ioapic
->irq_eoi
[i
] = 0;
452 trace_kvm_ioapic_delayed_eoi_inj(ent
->bits
);
454 ioapic_service(ioapic
, i
, false);
457 ioapic
->irq_eoi
[i
] = 0;
462 void kvm_ioapic_update_eoi(struct kvm_vcpu
*vcpu
, int vector
, int trigger_mode
)
464 struct kvm_ioapic
*ioapic
= vcpu
->kvm
->arch
.vioapic
;
466 spin_lock(&ioapic
->lock
);
467 __kvm_ioapic_update_eoi(vcpu
, ioapic
, vector
, trigger_mode
);
468 spin_unlock(&ioapic
->lock
);
471 static inline struct kvm_ioapic
*to_ioapic(struct kvm_io_device
*dev
)
473 return container_of(dev
, struct kvm_ioapic
, dev
);
476 static inline int ioapic_in_range(struct kvm_ioapic
*ioapic
, gpa_t addr
)
478 return ((addr
>= ioapic
->base_address
&&
479 (addr
< ioapic
->base_address
+ IOAPIC_MEM_LENGTH
)));
482 static int ioapic_mmio_read(struct kvm_vcpu
*vcpu
, struct kvm_io_device
*this,
483 gpa_t addr
, int len
, void *val
)
485 struct kvm_ioapic
*ioapic
= to_ioapic(this);
487 if (!ioapic_in_range(ioapic
, addr
))
490 ioapic_debug("addr %lx\n", (unsigned long)addr
);
491 ASSERT(!(addr
& 0xf)); /* check alignment */
494 spin_lock(&ioapic
->lock
);
496 case IOAPIC_REG_SELECT
:
497 result
= ioapic
->ioregsel
;
500 case IOAPIC_REG_WINDOW
:
501 result
= ioapic_read_indirect(ioapic
, addr
, len
);
508 spin_unlock(&ioapic
->lock
);
512 *(u64
*) val
= result
;
517 memcpy(val
, (char *)&result
, len
);
520 printk(KERN_WARNING
"ioapic: wrong length %d\n", len
);
525 static int ioapic_mmio_write(struct kvm_vcpu
*vcpu
, struct kvm_io_device
*this,
526 gpa_t addr
, int len
, const void *val
)
528 struct kvm_ioapic
*ioapic
= to_ioapic(this);
530 if (!ioapic_in_range(ioapic
, addr
))
533 ioapic_debug("ioapic_mmio_write addr=%p len=%d val=%p\n",
534 (void*)addr
, len
, val
);
535 ASSERT(!(addr
& 0xf)); /* check alignment */
549 printk(KERN_WARNING
"ioapic: Unsupported size %d\n", len
);
554 spin_lock(&ioapic
->lock
);
556 case IOAPIC_REG_SELECT
:
557 ioapic
->ioregsel
= data
& 0xFF; /* 8-bit register */
560 case IOAPIC_REG_WINDOW
:
561 ioapic_write_indirect(ioapic
, data
);
567 spin_unlock(&ioapic
->lock
);
571 static void kvm_ioapic_reset(struct kvm_ioapic
*ioapic
)
575 cancel_delayed_work_sync(&ioapic
->eoi_inject
);
576 for (i
= 0; i
< IOAPIC_NUM_PINS
; i
++)
577 ioapic
->redirtbl
[i
].fields
.mask
= 1;
578 ioapic
->base_address
= IOAPIC_DEFAULT_BASE_ADDRESS
;
579 ioapic
->ioregsel
= 0;
581 ioapic
->irr_delivered
= 0;
583 memset(ioapic
->irq_eoi
, 0x00, IOAPIC_NUM_PINS
);
584 rtc_irq_eoi_tracking_reset(ioapic
);
587 static const struct kvm_io_device_ops ioapic_mmio_ops
= {
588 .read
= ioapic_mmio_read
,
589 .write
= ioapic_mmio_write
,
592 int kvm_ioapic_init(struct kvm
*kvm
)
594 struct kvm_ioapic
*ioapic
;
597 ioapic
= kzalloc(sizeof(struct kvm_ioapic
), GFP_KERNEL
);
600 spin_lock_init(&ioapic
->lock
);
601 INIT_DELAYED_WORK(&ioapic
->eoi_inject
, kvm_ioapic_eoi_inject_work
);
602 kvm
->arch
.vioapic
= ioapic
;
603 kvm_ioapic_reset(ioapic
);
604 kvm_iodevice_init(&ioapic
->dev
, &ioapic_mmio_ops
);
606 mutex_lock(&kvm
->slots_lock
);
607 ret
= kvm_io_bus_register_dev(kvm
, KVM_MMIO_BUS
, ioapic
->base_address
,
608 IOAPIC_MEM_LENGTH
, &ioapic
->dev
);
609 mutex_unlock(&kvm
->slots_lock
);
611 kvm
->arch
.vioapic
= NULL
;
616 kvm_vcpu_request_scan_ioapic(kvm
);
620 void kvm_ioapic_destroy(struct kvm
*kvm
)
622 struct kvm_ioapic
*ioapic
= kvm
->arch
.vioapic
;
624 cancel_delayed_work_sync(&ioapic
->eoi_inject
);
625 kvm_io_bus_unregister_dev(kvm
, KVM_MMIO_BUS
, &ioapic
->dev
);
626 kvm
->arch
.vioapic
= NULL
;
630 int kvm_get_ioapic(struct kvm
*kvm
, struct kvm_ioapic_state
*state
)
632 struct kvm_ioapic
*ioapic
= ioapic_irqchip(kvm
);
636 spin_lock(&ioapic
->lock
);
637 memcpy(state
, ioapic
, sizeof(struct kvm_ioapic_state
));
638 state
->irr
&= ~ioapic
->irr_delivered
;
639 spin_unlock(&ioapic
->lock
);
643 int kvm_set_ioapic(struct kvm
*kvm
, struct kvm_ioapic_state
*state
)
645 struct kvm_ioapic
*ioapic
= ioapic_irqchip(kvm
);
649 spin_lock(&ioapic
->lock
);
650 memcpy(ioapic
, state
, sizeof(struct kvm_ioapic_state
));
652 ioapic
->irr_delivered
= 0;
653 kvm_vcpu_request_scan_ioapic(kvm
);
654 kvm_ioapic_inject_all(ioapic
, state
->irr
);
655 spin_unlock(&ioapic
->lock
);