2 * Copyright 2002 Andi Kleen, SuSE Labs.
3 * Thanks to Ben LaHaise for precious feedback.
5 #include <linux/highmem.h>
6 #include <linux/bootmem.h>
7 #include <linux/sched.h>
9 #include <linux/interrupt.h>
10 #include <linux/seq_file.h>
11 #include <linux/debugfs.h>
12 #include <linux/pfn.h>
13 #include <linux/percpu.h>
14 #include <linux/gfp.h>
15 #include <linux/pci.h>
16 #include <linux/vmalloc.h>
19 #include <asm/processor.h>
20 #include <asm/tlbflush.h>
21 #include <asm/sections.h>
22 #include <asm/setup.h>
23 #include <asm/uaccess.h>
24 #include <asm/pgalloc.h>
25 #include <asm/proto.h>
29 * The current flushing context - we pass it instead of 5 arguments:
39 unsigned force_split
: 1;
45 * Serialize cpa() (for !DEBUG_PAGEALLOC which uses large identity mappings)
46 * using cpa_lock. So that we don't allow any other cpu, with stale large tlb
47 * entries change the page attribute in parallel to some other cpu
48 * splitting a large page entry along with changing the attribute.
50 static DEFINE_SPINLOCK(cpa_lock
);
52 #define CPA_FLUSHTLB 1
54 #define CPA_PAGES_ARRAY 4
57 static unsigned long direct_pages_count
[PG_LEVEL_NUM
];
59 void update_page_count(int level
, unsigned long pages
)
61 /* Protect against CPA */
63 direct_pages_count
[level
] += pages
;
64 spin_unlock(&pgd_lock
);
67 static void split_page_count(int level
)
69 direct_pages_count
[level
]--;
70 direct_pages_count
[level
- 1] += PTRS_PER_PTE
;
73 void arch_report_meminfo(struct seq_file
*m
)
75 seq_printf(m
, "DirectMap4k: %8lu kB\n",
76 direct_pages_count
[PG_LEVEL_4K
] << 2);
77 #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
78 seq_printf(m
, "DirectMap2M: %8lu kB\n",
79 direct_pages_count
[PG_LEVEL_2M
] << 11);
81 seq_printf(m
, "DirectMap4M: %8lu kB\n",
82 direct_pages_count
[PG_LEVEL_2M
] << 12);
85 seq_printf(m
, "DirectMap1G: %8lu kB\n",
86 direct_pages_count
[PG_LEVEL_1G
] << 20);
89 static inline void split_page_count(int level
) { }
94 static inline unsigned long highmap_start_pfn(void)
96 return __pa_symbol(_text
) >> PAGE_SHIFT
;
99 static inline unsigned long highmap_end_pfn(void)
101 return __pa_symbol(roundup(_brk_end
, PMD_SIZE
)) >> PAGE_SHIFT
;
106 #ifdef CONFIG_DEBUG_PAGEALLOC
107 # define debug_pagealloc 1
109 # define debug_pagealloc 0
113 within(unsigned long addr
, unsigned long start
, unsigned long end
)
115 return addr
>= start
&& addr
< end
;
123 * clflush_cache_range - flush a cache range with clflush
124 * @vaddr: virtual start address
125 * @size: number of bytes to flush
127 * clflushopt is an unordered instruction which needs fencing with mfence or
128 * sfence to avoid ordering issues.
130 void clflush_cache_range(void *vaddr
, unsigned int size
)
132 const unsigned long clflush_size
= boot_cpu_data
.x86_clflush_size
;
133 void *p
= (void *)((unsigned long)vaddr
& ~(clflush_size
- 1));
134 void *vend
= vaddr
+ size
;
141 for (; p
< vend
; p
+= clflush_size
)
146 EXPORT_SYMBOL_GPL(clflush_cache_range
);
148 static void __cpa_flush_all(void *arg
)
150 unsigned long cache
= (unsigned long)arg
;
153 * Flush all to work around Errata in early athlons regarding
154 * large page flushing.
158 if (cache
&& boot_cpu_data
.x86
>= 4)
162 static void cpa_flush_all(unsigned long cache
)
164 BUG_ON(irqs_disabled());
166 on_each_cpu(__cpa_flush_all
, (void *) cache
, 1);
169 static void __cpa_flush_range(void *arg
)
172 * We could optimize that further and do individual per page
173 * tlb invalidates for a low number of pages. Caveat: we must
174 * flush the high aliases on 64bit as well.
179 static void cpa_flush_range(unsigned long start
, int numpages
, int cache
)
181 unsigned int i
, level
;
184 BUG_ON(irqs_disabled());
185 WARN_ON(PAGE_ALIGN(start
) != start
);
187 on_each_cpu(__cpa_flush_range
, NULL
, 1);
193 * We only need to flush on one CPU,
194 * clflush is a MESI-coherent instruction that
195 * will cause all other CPUs to flush the same
198 for (i
= 0, addr
= start
; i
< numpages
; i
++, addr
+= PAGE_SIZE
) {
199 pte_t
*pte
= lookup_address(addr
, &level
);
202 * Only flush present addresses:
204 if (pte
&& (pte_val(*pte
) & _PAGE_PRESENT
))
205 clflush_cache_range((void *) addr
, PAGE_SIZE
);
209 static void cpa_flush_array(unsigned long *start
, int numpages
, int cache
,
210 int in_flags
, struct page
**pages
)
212 unsigned int i
, level
;
213 unsigned long do_wbinvd
= cache
&& numpages
>= 1024; /* 4M threshold */
215 BUG_ON(irqs_disabled());
217 on_each_cpu(__cpa_flush_all
, (void *) do_wbinvd
, 1);
219 if (!cache
|| do_wbinvd
)
223 * We only need to flush on one CPU,
224 * clflush is a MESI-coherent instruction that
225 * will cause all other CPUs to flush the same
228 for (i
= 0; i
< numpages
; i
++) {
232 if (in_flags
& CPA_PAGES_ARRAY
)
233 addr
= (unsigned long)page_address(pages
[i
]);
237 pte
= lookup_address(addr
, &level
);
240 * Only flush present addresses:
242 if (pte
&& (pte_val(*pte
) & _PAGE_PRESENT
))
243 clflush_cache_range((void *)addr
, PAGE_SIZE
);
248 * Certain areas of memory on x86 require very specific protection flags,
249 * for example the BIOS area or kernel text. Callers don't always get this
250 * right (again, ioremap() on BIOS memory is not uncommon) so this function
251 * checks and fixes these known static required protection bits.
253 static inline pgprot_t
static_protections(pgprot_t prot
, unsigned long address
,
256 pgprot_t forbidden
= __pgprot(0);
259 * The BIOS area between 640k and 1Mb needs to be executable for
260 * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
262 #ifdef CONFIG_PCI_BIOS
263 if (pcibios_enabled
&& within(pfn
, BIOS_BEGIN
>> PAGE_SHIFT
, BIOS_END
>> PAGE_SHIFT
))
264 pgprot_val(forbidden
) |= _PAGE_NX
;
268 * The kernel text needs to be executable for obvious reasons
269 * Does not cover __inittext since that is gone later on. On
270 * 64bit we do not enforce !NX on the low mapping
272 if (within(address
, (unsigned long)_text
, (unsigned long)_etext
))
273 pgprot_val(forbidden
) |= _PAGE_NX
;
276 * The .rodata section needs to be read-only. Using the pfn
277 * catches all aliases.
279 if (within(pfn
, __pa_symbol(__start_rodata
) >> PAGE_SHIFT
,
280 __pa_symbol(__end_rodata
) >> PAGE_SHIFT
))
281 pgprot_val(forbidden
) |= _PAGE_RW
;
283 #if defined(CONFIG_X86_64) && defined(CONFIG_DEBUG_RODATA)
285 * Once the kernel maps the text as RO (kernel_set_to_readonly is set),
286 * kernel text mappings for the large page aligned text, rodata sections
287 * will be always read-only. For the kernel identity mappings covering
288 * the holes caused by this alignment can be anything that user asks.
290 * This will preserve the large page mappings for kernel text/data
293 if (kernel_set_to_readonly
&&
294 within(address
, (unsigned long)_text
,
295 (unsigned long)__end_rodata_hpage_align
)) {
299 * Don't enforce the !RW mapping for the kernel text mapping,
300 * if the current mapping is already using small page mapping.
301 * No need to work hard to preserve large page mappings in this
304 * This also fixes the Linux Xen paravirt guest boot failure
305 * (because of unexpected read-only mappings for kernel identity
306 * mappings). In this paravirt guest case, the kernel text
307 * mapping and the kernel identity mapping share the same
308 * page-table pages. Thus we can't really use different
309 * protections for the kernel text and identity mappings. Also,
310 * these shared mappings are made of small page mappings.
311 * Thus this don't enforce !RW mapping for small page kernel
312 * text mapping logic will help Linux Xen parvirt guest boot
315 if (lookup_address(address
, &level
) && (level
!= PG_LEVEL_4K
))
316 pgprot_val(forbidden
) |= _PAGE_RW
;
320 prot
= __pgprot(pgprot_val(prot
) & ~pgprot_val(forbidden
));
326 * Lookup the page table entry for a virtual address in a specific pgd.
327 * Return a pointer to the entry and the level of the mapping.
329 pte_t
*lookup_address_in_pgd(pgd_t
*pgd
, unsigned long address
,
335 *level
= PG_LEVEL_NONE
;
340 pud
= pud_offset(pgd
, address
);
344 *level
= PG_LEVEL_1G
;
345 if (pud_large(*pud
) || !pud_present(*pud
))
348 pmd
= pmd_offset(pud
, address
);
352 *level
= PG_LEVEL_2M
;
353 if (pmd_large(*pmd
) || !pmd_present(*pmd
))
356 *level
= PG_LEVEL_4K
;
358 return pte_offset_kernel(pmd
, address
);
362 * Lookup the page table entry for a virtual address. Return a pointer
363 * to the entry and the level of the mapping.
365 * Note: We return pud and pmd either when the entry is marked large
366 * or when the present bit is not set. Otherwise we would return a
367 * pointer to a nonexisting mapping.
369 pte_t
*lookup_address(unsigned long address
, unsigned int *level
)
371 return lookup_address_in_pgd(pgd_offset_k(address
), address
, level
);
373 EXPORT_SYMBOL_GPL(lookup_address
);
375 static pte_t
*_lookup_address_cpa(struct cpa_data
*cpa
, unsigned long address
,
379 return lookup_address_in_pgd(cpa
->pgd
+ pgd_index(address
),
382 return lookup_address(address
, level
);
386 * Lookup the PMD entry for a virtual address. Return a pointer to the entry
387 * or NULL if not present.
389 pmd_t
*lookup_pmd_address(unsigned long address
)
394 pgd
= pgd_offset_k(address
);
398 pud
= pud_offset(pgd
, address
);
399 if (pud_none(*pud
) || pud_large(*pud
) || !pud_present(*pud
))
402 return pmd_offset(pud
, address
);
406 * This is necessary because __pa() does not work on some
407 * kinds of memory, like vmalloc() or the alloc_remap()
408 * areas on 32-bit NUMA systems. The percpu areas can
409 * end up in this kind of memory, for instance.
411 * This could be optimized, but it is only intended to be
412 * used at inititalization time, and keeping it
413 * unoptimized should increase the testing coverage for
414 * the more obscure platforms.
416 phys_addr_t
slow_virt_to_phys(void *__virt_addr
)
418 unsigned long virt_addr
= (unsigned long)__virt_addr
;
419 unsigned long phys_addr
, offset
;
423 pte
= lookup_address(virt_addr
, &level
);
428 phys_addr
= pud_pfn(*(pud_t
*)pte
) << PAGE_SHIFT
;
429 offset
= virt_addr
& ~PUD_PAGE_MASK
;
432 phys_addr
= pmd_pfn(*(pmd_t
*)pte
) << PAGE_SHIFT
;
433 offset
= virt_addr
& ~PMD_PAGE_MASK
;
436 phys_addr
= pte_pfn(*pte
) << PAGE_SHIFT
;
437 offset
= virt_addr
& ~PAGE_MASK
;
440 return (phys_addr_t
)(phys_addr
| offset
);
442 EXPORT_SYMBOL_GPL(slow_virt_to_phys
);
445 * Set the new pmd in all the pgds we know about:
447 static void __set_pmd_pte(pte_t
*kpte
, unsigned long address
, pte_t pte
)
450 set_pte_atomic(kpte
, pte
);
452 if (!SHARED_KERNEL_PMD
) {
455 list_for_each_entry(page
, &pgd_list
, lru
) {
460 pgd
= (pgd_t
*)page_address(page
) + pgd_index(address
);
461 pud
= pud_offset(pgd
, address
);
462 pmd
= pmd_offset(pud
, address
);
463 set_pte_atomic((pte_t
*)pmd
, pte
);
470 try_preserve_large_page(pte_t
*kpte
, unsigned long address
,
471 struct cpa_data
*cpa
)
473 unsigned long nextpage_addr
, numpages
, pmask
, psize
, addr
, pfn
, old_pfn
;
474 pte_t new_pte
, old_pte
, *tmp
;
475 pgprot_t old_prot
, new_prot
, req_prot
;
479 if (cpa
->force_split
)
482 spin_lock(&pgd_lock
);
484 * Check for races, another CPU might have split this page
487 tmp
= _lookup_address_cpa(cpa
, address
, &level
);
493 old_prot
= pmd_pgprot(*(pmd_t
*)kpte
);
494 old_pfn
= pmd_pfn(*(pmd_t
*)kpte
);
497 old_prot
= pud_pgprot(*(pud_t
*)kpte
);
498 old_pfn
= pud_pfn(*(pud_t
*)kpte
);
505 psize
= page_level_size(level
);
506 pmask
= page_level_mask(level
);
509 * Calculate the number of pages, which fit into this large
510 * page starting at address:
512 nextpage_addr
= (address
+ psize
) & pmask
;
513 numpages
= (nextpage_addr
- address
) >> PAGE_SHIFT
;
514 if (numpages
< cpa
->numpages
)
515 cpa
->numpages
= numpages
;
518 * We are safe now. Check whether the new pgprot is the same:
519 * Convert protection attributes to 4k-format, as cpa->mask* are set
523 req_prot
= pgprot_large_2_4k(old_prot
);
525 pgprot_val(req_prot
) &= ~pgprot_val(cpa
->mask_clr
);
526 pgprot_val(req_prot
) |= pgprot_val(cpa
->mask_set
);
529 * req_prot is in format of 4k pages. It must be converted to large
530 * page format: the caching mode includes the PAT bit located at
531 * different bit positions in the two formats.
533 req_prot
= pgprot_4k_2_large(req_prot
);
536 * Set the PSE and GLOBAL flags only if the PRESENT flag is
537 * set otherwise pmd_present/pmd_huge will return true even on
538 * a non present pmd. The canon_pgprot will clear _PAGE_GLOBAL
539 * for the ancient hardware that doesn't support it.
541 if (pgprot_val(req_prot
) & _PAGE_PRESENT
)
542 pgprot_val(req_prot
) |= _PAGE_PSE
| _PAGE_GLOBAL
;
544 pgprot_val(req_prot
) &= ~(_PAGE_PSE
| _PAGE_GLOBAL
);
546 req_prot
= canon_pgprot(req_prot
);
549 * old_pfn points to the large page base pfn. So we need
550 * to add the offset of the virtual address:
552 pfn
= old_pfn
+ ((address
& (psize
- 1)) >> PAGE_SHIFT
);
555 new_prot
= static_protections(req_prot
, address
, pfn
);
558 * We need to check the full range, whether
559 * static_protection() requires a different pgprot for one of
560 * the pages in the range we try to preserve:
562 addr
= address
& pmask
;
564 for (i
= 0; i
< (psize
>> PAGE_SHIFT
); i
++, addr
+= PAGE_SIZE
, pfn
++) {
565 pgprot_t chk_prot
= static_protections(req_prot
, addr
, pfn
);
567 if (pgprot_val(chk_prot
) != pgprot_val(new_prot
))
572 * If there are no changes, return. maxpages has been updated
575 if (pgprot_val(new_prot
) == pgprot_val(old_prot
)) {
581 * We need to change the attributes. Check, whether we can
582 * change the large page in one go. We request a split, when
583 * the address is not aligned and the number of pages is
584 * smaller than the number of pages in the large page. Note
585 * that we limited the number of possible pages already to
586 * the number of pages in the large page.
588 if (address
== (address
& pmask
) && cpa
->numpages
== (psize
>> PAGE_SHIFT
)) {
590 * The address is aligned and the number of pages
591 * covers the full page.
593 new_pte
= pfn_pte(old_pfn
, new_prot
);
594 __set_pmd_pte(kpte
, address
, new_pte
);
595 cpa
->flags
|= CPA_FLUSHTLB
;
600 spin_unlock(&pgd_lock
);
606 __split_large_page(struct cpa_data
*cpa
, pte_t
*kpte
, unsigned long address
,
609 pte_t
*pbase
= (pte_t
*)page_address(base
);
610 unsigned long ref_pfn
, pfn
, pfninc
= 1;
611 unsigned int i
, level
;
615 spin_lock(&pgd_lock
);
617 * Check for races, another CPU might have split this page
620 tmp
= _lookup_address_cpa(cpa
, address
, &level
);
622 spin_unlock(&pgd_lock
);
626 paravirt_alloc_pte(&init_mm
, page_to_pfn(base
));
630 ref_prot
= pmd_pgprot(*(pmd_t
*)kpte
);
631 /* clear PSE and promote PAT bit to correct position */
632 ref_prot
= pgprot_large_2_4k(ref_prot
);
633 ref_pfn
= pmd_pfn(*(pmd_t
*)kpte
);
637 ref_prot
= pud_pgprot(*(pud_t
*)kpte
);
638 ref_pfn
= pud_pfn(*(pud_t
*)kpte
);
639 pfninc
= PMD_PAGE_SIZE
>> PAGE_SHIFT
;
642 * Clear the PSE flags if the PRESENT flag is not set
643 * otherwise pmd_present/pmd_huge will return true
644 * even on a non present pmd.
646 if (!(pgprot_val(ref_prot
) & _PAGE_PRESENT
))
647 pgprot_val(ref_prot
) &= ~_PAGE_PSE
;
651 spin_unlock(&pgd_lock
);
656 * Set the GLOBAL flags only if the PRESENT flag is set
657 * otherwise pmd/pte_present will return true even on a non
658 * present pmd/pte. The canon_pgprot will clear _PAGE_GLOBAL
659 * for the ancient hardware that doesn't support it.
661 if (pgprot_val(ref_prot
) & _PAGE_PRESENT
)
662 pgprot_val(ref_prot
) |= _PAGE_GLOBAL
;
664 pgprot_val(ref_prot
) &= ~_PAGE_GLOBAL
;
667 * Get the target pfn from the original entry:
670 for (i
= 0; i
< PTRS_PER_PTE
; i
++, pfn
+= pfninc
)
671 set_pte(&pbase
[i
], pfn_pte(pfn
, canon_pgprot(ref_prot
)));
673 if (virt_addr_valid(address
)) {
674 unsigned long pfn
= PFN_DOWN(__pa(address
));
676 if (pfn_range_is_mapped(pfn
, pfn
+ 1))
677 split_page_count(level
);
681 * Install the new, split up pagetable.
683 * We use the standard kernel pagetable protections for the new
684 * pagetable protections, the actual ptes set above control the
685 * primary protection behavior:
687 __set_pmd_pte(kpte
, address
, mk_pte(base
, __pgprot(_KERNPG_TABLE
)));
690 * Intel Atom errata AAH41 workaround.
692 * The real fix should be in hw or in a microcode update, but
693 * we also probabilistically try to reduce the window of having
694 * a large TLB mixed with 4K TLBs while instruction fetches are
698 spin_unlock(&pgd_lock
);
703 static int split_large_page(struct cpa_data
*cpa
, pte_t
*kpte
,
704 unsigned long address
)
708 if (!debug_pagealloc
)
709 spin_unlock(&cpa_lock
);
710 base
= alloc_pages(GFP_KERNEL
| __GFP_NOTRACK
, 0);
711 if (!debug_pagealloc
)
712 spin_lock(&cpa_lock
);
716 if (__split_large_page(cpa
, kpte
, address
, base
))
722 static bool try_to_free_pte_page(pte_t
*pte
)
726 for (i
= 0; i
< PTRS_PER_PTE
; i
++)
727 if (!pte_none(pte
[i
]))
730 free_page((unsigned long)pte
);
734 static bool try_to_free_pmd_page(pmd_t
*pmd
)
738 for (i
= 0; i
< PTRS_PER_PMD
; i
++)
739 if (!pmd_none(pmd
[i
]))
742 free_page((unsigned long)pmd
);
746 static bool try_to_free_pud_page(pud_t
*pud
)
750 for (i
= 0; i
< PTRS_PER_PUD
; i
++)
751 if (!pud_none(pud
[i
]))
754 free_page((unsigned long)pud
);
758 static bool unmap_pte_range(pmd_t
*pmd
, unsigned long start
, unsigned long end
)
760 pte_t
*pte
= pte_offset_kernel(pmd
, start
);
762 while (start
< end
) {
763 set_pte(pte
, __pte(0));
769 if (try_to_free_pte_page((pte_t
*)pmd_page_vaddr(*pmd
))) {
776 static void __unmap_pmd_range(pud_t
*pud
, pmd_t
*pmd
,
777 unsigned long start
, unsigned long end
)
779 if (unmap_pte_range(pmd
, start
, end
))
780 if (try_to_free_pmd_page((pmd_t
*)pud_page_vaddr(*pud
)))
784 static void unmap_pmd_range(pud_t
*pud
, unsigned long start
, unsigned long end
)
786 pmd_t
*pmd
= pmd_offset(pud
, start
);
789 * Not on a 2MB page boundary?
791 if (start
& (PMD_SIZE
- 1)) {
792 unsigned long next_page
= (start
+ PMD_SIZE
) & PMD_MASK
;
793 unsigned long pre_end
= min_t(unsigned long, end
, next_page
);
795 __unmap_pmd_range(pud
, pmd
, start
, pre_end
);
802 * Try to unmap in 2M chunks.
804 while (end
- start
>= PMD_SIZE
) {
808 __unmap_pmd_range(pud
, pmd
, start
, start
+ PMD_SIZE
);
818 return __unmap_pmd_range(pud
, pmd
, start
, end
);
821 * Try again to free the PMD page if haven't succeeded above.
824 if (try_to_free_pmd_page((pmd_t
*)pud_page_vaddr(*pud
)))
828 static void unmap_pud_range(pgd_t
*pgd
, unsigned long start
, unsigned long end
)
830 pud_t
*pud
= pud_offset(pgd
, start
);
833 * Not on a GB page boundary?
835 if (start
& (PUD_SIZE
- 1)) {
836 unsigned long next_page
= (start
+ PUD_SIZE
) & PUD_MASK
;
837 unsigned long pre_end
= min_t(unsigned long, end
, next_page
);
839 unmap_pmd_range(pud
, start
, pre_end
);
846 * Try to unmap in 1G chunks?
848 while (end
- start
>= PUD_SIZE
) {
853 unmap_pmd_range(pud
, start
, start
+ PUD_SIZE
);
863 unmap_pmd_range(pud
, start
, end
);
866 * No need to try to free the PUD page because we'll free it in
867 * populate_pgd's error path
871 static void unmap_pgd_range(pgd_t
*root
, unsigned long addr
, unsigned long end
)
873 pgd_t
*pgd_entry
= root
+ pgd_index(addr
);
875 unmap_pud_range(pgd_entry
, addr
, end
);
877 if (try_to_free_pud_page((pud_t
*)pgd_page_vaddr(*pgd_entry
)))
878 pgd_clear(pgd_entry
);
881 static int alloc_pte_page(pmd_t
*pmd
)
883 pte_t
*pte
= (pte_t
*)get_zeroed_page(GFP_KERNEL
| __GFP_NOTRACK
);
887 set_pmd(pmd
, __pmd(__pa(pte
) | _KERNPG_TABLE
));
891 static int alloc_pmd_page(pud_t
*pud
)
893 pmd_t
*pmd
= (pmd_t
*)get_zeroed_page(GFP_KERNEL
| __GFP_NOTRACK
);
897 set_pud(pud
, __pud(__pa(pmd
) | _KERNPG_TABLE
));
901 static void populate_pte(struct cpa_data
*cpa
,
902 unsigned long start
, unsigned long end
,
903 unsigned num_pages
, pmd_t
*pmd
, pgprot_t pgprot
)
907 pte
= pte_offset_kernel(pmd
, start
);
909 while (num_pages
-- && start
< end
) {
911 /* deal with the NX bit */
912 if (!(pgprot_val(pgprot
) & _PAGE_NX
))
913 cpa
->pfn
&= ~_PAGE_NX
;
915 set_pte(pte
, pfn_pte(cpa
->pfn
>> PAGE_SHIFT
, pgprot
));
918 cpa
->pfn
+= PAGE_SIZE
;
923 static int populate_pmd(struct cpa_data
*cpa
,
924 unsigned long start
, unsigned long end
,
925 unsigned num_pages
, pud_t
*pud
, pgprot_t pgprot
)
927 unsigned int cur_pages
= 0;
932 * Not on a 2M boundary?
934 if (start
& (PMD_SIZE
- 1)) {
935 unsigned long pre_end
= start
+ (num_pages
<< PAGE_SHIFT
);
936 unsigned long next_page
= (start
+ PMD_SIZE
) & PMD_MASK
;
938 pre_end
= min_t(unsigned long, pre_end
, next_page
);
939 cur_pages
= (pre_end
- start
) >> PAGE_SHIFT
;
940 cur_pages
= min_t(unsigned int, num_pages
, cur_pages
);
945 pmd
= pmd_offset(pud
, start
);
947 if (alloc_pte_page(pmd
))
950 populate_pte(cpa
, start
, pre_end
, cur_pages
, pmd
, pgprot
);
956 * We mapped them all?
958 if (num_pages
== cur_pages
)
961 pmd_pgprot
= pgprot_4k_2_large(pgprot
);
963 while (end
- start
>= PMD_SIZE
) {
966 * We cannot use a 1G page so allocate a PMD page if needed.
969 if (alloc_pmd_page(pud
))
972 pmd
= pmd_offset(pud
, start
);
974 set_pmd(pmd
, __pmd(cpa
->pfn
| _PAGE_PSE
|
975 massage_pgprot(pmd_pgprot
)));
978 cpa
->pfn
+= PMD_SIZE
;
979 cur_pages
+= PMD_SIZE
>> PAGE_SHIFT
;
983 * Map trailing 4K pages.
986 pmd
= pmd_offset(pud
, start
);
988 if (alloc_pte_page(pmd
))
991 populate_pte(cpa
, start
, end
, num_pages
- cur_pages
,
997 static int populate_pud(struct cpa_data
*cpa
, unsigned long start
, pgd_t
*pgd
,
1003 pgprot_t pud_pgprot
;
1005 end
= start
+ (cpa
->numpages
<< PAGE_SHIFT
);
1008 * Not on a Gb page boundary? => map everything up to it with
1011 if (start
& (PUD_SIZE
- 1)) {
1012 unsigned long pre_end
;
1013 unsigned long next_page
= (start
+ PUD_SIZE
) & PUD_MASK
;
1015 pre_end
= min_t(unsigned long, end
, next_page
);
1016 cur_pages
= (pre_end
- start
) >> PAGE_SHIFT
;
1017 cur_pages
= min_t(int, (int)cpa
->numpages
, cur_pages
);
1019 pud
= pud_offset(pgd
, start
);
1025 if (alloc_pmd_page(pud
))
1028 cur_pages
= populate_pmd(cpa
, start
, pre_end
, cur_pages
,
1036 /* We mapped them all? */
1037 if (cpa
->numpages
== cur_pages
)
1040 pud
= pud_offset(pgd
, start
);
1041 pud_pgprot
= pgprot_4k_2_large(pgprot
);
1044 * Map everything starting from the Gb boundary, possibly with 1G pages
1046 while (end
- start
>= PUD_SIZE
) {
1047 set_pud(pud
, __pud(cpa
->pfn
| _PAGE_PSE
|
1048 massage_pgprot(pud_pgprot
)));
1051 cpa
->pfn
+= PUD_SIZE
;
1052 cur_pages
+= PUD_SIZE
>> PAGE_SHIFT
;
1056 /* Map trailing leftover */
1060 pud
= pud_offset(pgd
, start
);
1062 if (alloc_pmd_page(pud
))
1065 tmp
= populate_pmd(cpa
, start
, end
, cpa
->numpages
- cur_pages
,
1076 * Restrictions for kernel page table do not necessarily apply when mapping in
1079 static int populate_pgd(struct cpa_data
*cpa
, unsigned long addr
)
1081 pgprot_t pgprot
= __pgprot(_KERNPG_TABLE
);
1082 pud_t
*pud
= NULL
; /* shut up gcc */
1086 pgd_entry
= cpa
->pgd
+ pgd_index(addr
);
1089 * Allocate a PUD page and hand it down for mapping.
1091 if (pgd_none(*pgd_entry
)) {
1092 pud
= (pud_t
*)get_zeroed_page(GFP_KERNEL
| __GFP_NOTRACK
);
1096 set_pgd(pgd_entry
, __pgd(__pa(pud
) | _KERNPG_TABLE
));
1099 pgprot_val(pgprot
) &= ~pgprot_val(cpa
->mask_clr
);
1100 pgprot_val(pgprot
) |= pgprot_val(cpa
->mask_set
);
1102 ret
= populate_pud(cpa
, addr
, pgd_entry
, pgprot
);
1104 unmap_pgd_range(cpa
->pgd
, addr
,
1105 addr
+ (cpa
->numpages
<< PAGE_SHIFT
));
1109 cpa
->numpages
= ret
;
1113 static int __cpa_process_fault(struct cpa_data
*cpa
, unsigned long vaddr
,
1117 return populate_pgd(cpa
, vaddr
);
1120 * Ignore all non primary paths.
1126 * Ignore the NULL PTE for kernel identity mapping, as it is expected
1128 * Also set numpages to '1' indicating that we processed cpa req for
1129 * one virtual address page and its pfn. TBD: numpages can be set based
1130 * on the initial value and the level returned by lookup_address().
1132 if (within(vaddr
, PAGE_OFFSET
,
1133 PAGE_OFFSET
+ (max_pfn_mapped
<< PAGE_SHIFT
))) {
1135 cpa
->pfn
= __pa(vaddr
) >> PAGE_SHIFT
;
1138 WARN(1, KERN_WARNING
"CPA: called for zero pte. "
1139 "vaddr = %lx cpa->vaddr = %lx\n", vaddr
,
1146 static int __change_page_attr(struct cpa_data
*cpa
, int primary
)
1148 unsigned long address
;
1151 pte_t
*kpte
, old_pte
;
1153 if (cpa
->flags
& CPA_PAGES_ARRAY
) {
1154 struct page
*page
= cpa
->pages
[cpa
->curpage
];
1155 if (unlikely(PageHighMem(page
)))
1157 address
= (unsigned long)page_address(page
);
1158 } else if (cpa
->flags
& CPA_ARRAY
)
1159 address
= cpa
->vaddr
[cpa
->curpage
];
1161 address
= *cpa
->vaddr
;
1163 kpte
= _lookup_address_cpa(cpa
, address
, &level
);
1165 return __cpa_process_fault(cpa
, address
, primary
);
1168 if (!pte_val(old_pte
))
1169 return __cpa_process_fault(cpa
, address
, primary
);
1171 if (level
== PG_LEVEL_4K
) {
1173 pgprot_t new_prot
= pte_pgprot(old_pte
);
1174 unsigned long pfn
= pte_pfn(old_pte
);
1176 pgprot_val(new_prot
) &= ~pgprot_val(cpa
->mask_clr
);
1177 pgprot_val(new_prot
) |= pgprot_val(cpa
->mask_set
);
1179 new_prot
= static_protections(new_prot
, address
, pfn
);
1182 * Set the GLOBAL flags only if the PRESENT flag is
1183 * set otherwise pte_present will return true even on
1184 * a non present pte. The canon_pgprot will clear
1185 * _PAGE_GLOBAL for the ancient hardware that doesn't
1188 if (pgprot_val(new_prot
) & _PAGE_PRESENT
)
1189 pgprot_val(new_prot
) |= _PAGE_GLOBAL
;
1191 pgprot_val(new_prot
) &= ~_PAGE_GLOBAL
;
1194 * We need to keep the pfn from the existing PTE,
1195 * after all we're only going to change it's attributes
1196 * not the memory it points to
1198 new_pte
= pfn_pte(pfn
, canon_pgprot(new_prot
));
1201 * Do we really change anything ?
1203 if (pte_val(old_pte
) != pte_val(new_pte
)) {
1204 set_pte_atomic(kpte
, new_pte
);
1205 cpa
->flags
|= CPA_FLUSHTLB
;
1212 * Check, whether we can keep the large page intact
1213 * and just change the pte:
1215 do_split
= try_preserve_large_page(kpte
, address
, cpa
);
1217 * When the range fits into the existing large page,
1218 * return. cp->numpages and cpa->tlbflush have been updated in
1225 * We have to split the large page:
1227 err
= split_large_page(cpa
, kpte
, address
);
1230 * Do a global flush tlb after splitting the large page
1231 * and before we do the actual change page attribute in the PTE.
1233 * With out this, we violate the TLB application note, that says
1234 * "The TLBs may contain both ordinary and large-page
1235 * translations for a 4-KByte range of linear addresses. This
1236 * may occur if software modifies the paging structures so that
1237 * the page size used for the address range changes. If the two
1238 * translations differ with respect to page frame or attributes
1239 * (e.g., permissions), processor behavior is undefined and may
1240 * be implementation-specific."
1242 * We do this global tlb flush inside the cpa_lock, so that we
1243 * don't allow any other cpu, with stale tlb entries change the
1244 * page attribute in parallel, that also falls into the
1245 * just split large page entry.
1254 static int __change_page_attr_set_clr(struct cpa_data
*cpa
, int checkalias
);
1256 static int cpa_process_alias(struct cpa_data
*cpa
)
1258 struct cpa_data alias_cpa
;
1259 unsigned long laddr
= (unsigned long)__va(cpa
->pfn
<< PAGE_SHIFT
);
1260 unsigned long vaddr
;
1263 if (!pfn_range_is_mapped(cpa
->pfn
, cpa
->pfn
+ 1))
1267 * No need to redo, when the primary call touched the direct
1270 if (cpa
->flags
& CPA_PAGES_ARRAY
) {
1271 struct page
*page
= cpa
->pages
[cpa
->curpage
];
1272 if (unlikely(PageHighMem(page
)))
1274 vaddr
= (unsigned long)page_address(page
);
1275 } else if (cpa
->flags
& CPA_ARRAY
)
1276 vaddr
= cpa
->vaddr
[cpa
->curpage
];
1278 vaddr
= *cpa
->vaddr
;
1280 if (!(within(vaddr
, PAGE_OFFSET
,
1281 PAGE_OFFSET
+ (max_pfn_mapped
<< PAGE_SHIFT
)))) {
1284 alias_cpa
.vaddr
= &laddr
;
1285 alias_cpa
.flags
&= ~(CPA_PAGES_ARRAY
| CPA_ARRAY
);
1287 ret
= __change_page_attr_set_clr(&alias_cpa
, 0);
1292 #ifdef CONFIG_X86_64
1294 * If the primary call didn't touch the high mapping already
1295 * and the physical address is inside the kernel map, we need
1296 * to touch the high mapped kernel as well:
1298 if (!within(vaddr
, (unsigned long)_text
, _brk_end
) &&
1299 within(cpa
->pfn
, highmap_start_pfn(), highmap_end_pfn())) {
1300 unsigned long temp_cpa_vaddr
= (cpa
->pfn
<< PAGE_SHIFT
) +
1301 __START_KERNEL_map
- phys_base
;
1303 alias_cpa
.vaddr
= &temp_cpa_vaddr
;
1304 alias_cpa
.flags
&= ~(CPA_PAGES_ARRAY
| CPA_ARRAY
);
1307 * The high mapping range is imprecise, so ignore the
1310 __change_page_attr_set_clr(&alias_cpa
, 0);
1317 static int __change_page_attr_set_clr(struct cpa_data
*cpa
, int checkalias
)
1319 int ret
, numpages
= cpa
->numpages
;
1323 * Store the remaining nr of pages for the large page
1324 * preservation check.
1326 cpa
->numpages
= numpages
;
1327 /* for array changes, we can't use large page */
1328 if (cpa
->flags
& (CPA_ARRAY
| CPA_PAGES_ARRAY
))
1331 if (!debug_pagealloc
)
1332 spin_lock(&cpa_lock
);
1333 ret
= __change_page_attr(cpa
, checkalias
);
1334 if (!debug_pagealloc
)
1335 spin_unlock(&cpa_lock
);
1340 ret
= cpa_process_alias(cpa
);
1346 * Adjust the number of pages with the result of the
1347 * CPA operation. Either a large page has been
1348 * preserved or a single page update happened.
1350 BUG_ON(cpa
->numpages
> numpages
);
1351 numpages
-= cpa
->numpages
;
1352 if (cpa
->flags
& (CPA_PAGES_ARRAY
| CPA_ARRAY
))
1355 *cpa
->vaddr
+= cpa
->numpages
* PAGE_SIZE
;
1361 static int change_page_attr_set_clr(unsigned long *addr
, int numpages
,
1362 pgprot_t mask_set
, pgprot_t mask_clr
,
1363 int force_split
, int in_flag
,
1364 struct page
**pages
)
1366 struct cpa_data cpa
;
1367 int ret
, cache
, checkalias
;
1368 unsigned long baddr
= 0;
1370 memset(&cpa
, 0, sizeof(cpa
));
1373 * Check, if we are requested to change a not supported
1376 mask_set
= canon_pgprot(mask_set
);
1377 mask_clr
= canon_pgprot(mask_clr
);
1378 if (!pgprot_val(mask_set
) && !pgprot_val(mask_clr
) && !force_split
)
1381 /* Ensure we are PAGE_SIZE aligned */
1382 if (in_flag
& CPA_ARRAY
) {
1384 for (i
= 0; i
< numpages
; i
++) {
1385 if (addr
[i
] & ~PAGE_MASK
) {
1386 addr
[i
] &= PAGE_MASK
;
1390 } else if (!(in_flag
& CPA_PAGES_ARRAY
)) {
1392 * in_flag of CPA_PAGES_ARRAY implies it is aligned.
1393 * No need to cehck in that case
1395 if (*addr
& ~PAGE_MASK
) {
1398 * People should not be passing in unaligned addresses:
1403 * Save address for cache flush. *addr is modified in the call
1404 * to __change_page_attr_set_clr() below.
1409 /* Must avoid aliasing mappings in the highmem code */
1410 kmap_flush_unused();
1416 cpa
.numpages
= numpages
;
1417 cpa
.mask_set
= mask_set
;
1418 cpa
.mask_clr
= mask_clr
;
1421 cpa
.force_split
= force_split
;
1423 if (in_flag
& (CPA_ARRAY
| CPA_PAGES_ARRAY
))
1424 cpa
.flags
|= in_flag
;
1426 /* No alias checking for _NX bit modifications */
1427 checkalias
= (pgprot_val(mask_set
) | pgprot_val(mask_clr
)) != _PAGE_NX
;
1429 ret
= __change_page_attr_set_clr(&cpa
, checkalias
);
1432 * Check whether we really changed something:
1434 if (!(cpa
.flags
& CPA_FLUSHTLB
))
1438 * No need to flush, when we did not set any of the caching
1441 cache
= !!pgprot2cachemode(mask_set
);
1444 * On success we use CLFLUSH, when the CPU supports it to
1445 * avoid the WBINVD. If the CPU does not support it and in the
1446 * error case we fall back to cpa_flush_all (which uses
1449 if (!ret
&& cpu_has_clflush
) {
1450 if (cpa
.flags
& (CPA_PAGES_ARRAY
| CPA_ARRAY
)) {
1451 cpa_flush_array(addr
, numpages
, cache
,
1454 cpa_flush_range(baddr
, numpages
, cache
);
1456 cpa_flush_all(cache
);
1462 static inline int change_page_attr_set(unsigned long *addr
, int numpages
,
1463 pgprot_t mask
, int array
)
1465 return change_page_attr_set_clr(addr
, numpages
, mask
, __pgprot(0), 0,
1466 (array
? CPA_ARRAY
: 0), NULL
);
1469 static inline int change_page_attr_clear(unsigned long *addr
, int numpages
,
1470 pgprot_t mask
, int array
)
1472 return change_page_attr_set_clr(addr
, numpages
, __pgprot(0), mask
, 0,
1473 (array
? CPA_ARRAY
: 0), NULL
);
1476 static inline int cpa_set_pages_array(struct page
**pages
, int numpages
,
1479 return change_page_attr_set_clr(NULL
, numpages
, mask
, __pgprot(0), 0,
1480 CPA_PAGES_ARRAY
, pages
);
1483 static inline int cpa_clear_pages_array(struct page
**pages
, int numpages
,
1486 return change_page_attr_set_clr(NULL
, numpages
, __pgprot(0), mask
, 0,
1487 CPA_PAGES_ARRAY
, pages
);
1490 int _set_memory_uc(unsigned long addr
, int numpages
)
1493 * for now UC MINUS. see comments in ioremap_nocache()
1494 * If you really need strong UC use ioremap_uc(), but note
1495 * that you cannot override IO areas with set_memory_*() as
1496 * these helpers cannot work with IO memory.
1498 return change_page_attr_set(&addr
, numpages
,
1499 cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS
),
1503 int set_memory_uc(unsigned long addr
, int numpages
)
1508 * for now UC MINUS. see comments in ioremap_nocache()
1510 ret
= reserve_memtype(__pa(addr
), __pa(addr
) + numpages
* PAGE_SIZE
,
1511 _PAGE_CACHE_MODE_UC_MINUS
, NULL
);
1515 ret
= _set_memory_uc(addr
, numpages
);
1522 free_memtype(__pa(addr
), __pa(addr
) + numpages
* PAGE_SIZE
);
1526 EXPORT_SYMBOL(set_memory_uc
);
1528 static int _set_memory_array(unsigned long *addr
, int addrinarray
,
1529 enum page_cache_mode new_type
)
1531 enum page_cache_mode set_type
;
1535 for (i
= 0; i
< addrinarray
; i
++) {
1536 ret
= reserve_memtype(__pa(addr
[i
]), __pa(addr
[i
]) + PAGE_SIZE
,
1542 /* If WC, set to UC- first and then WC */
1543 set_type
= (new_type
== _PAGE_CACHE_MODE_WC
) ?
1544 _PAGE_CACHE_MODE_UC_MINUS
: new_type
;
1546 ret
= change_page_attr_set(addr
, addrinarray
,
1547 cachemode2pgprot(set_type
), 1);
1549 if (!ret
&& new_type
== _PAGE_CACHE_MODE_WC
)
1550 ret
= change_page_attr_set_clr(addr
, addrinarray
,
1552 _PAGE_CACHE_MODE_WC
),
1553 __pgprot(_PAGE_CACHE_MASK
),
1554 0, CPA_ARRAY
, NULL
);
1561 for (j
= 0; j
< i
; j
++)
1562 free_memtype(__pa(addr
[j
]), __pa(addr
[j
]) + PAGE_SIZE
);
1567 int set_memory_array_uc(unsigned long *addr
, int addrinarray
)
1569 return _set_memory_array(addr
, addrinarray
, _PAGE_CACHE_MODE_UC_MINUS
);
1571 EXPORT_SYMBOL(set_memory_array_uc
);
1573 int set_memory_array_wc(unsigned long *addr
, int addrinarray
)
1575 return _set_memory_array(addr
, addrinarray
, _PAGE_CACHE_MODE_WC
);
1577 EXPORT_SYMBOL(set_memory_array_wc
);
1579 int set_memory_array_wt(unsigned long *addr
, int addrinarray
)
1581 return _set_memory_array(addr
, addrinarray
, _PAGE_CACHE_MODE_WT
);
1583 EXPORT_SYMBOL_GPL(set_memory_array_wt
);
1585 int _set_memory_wc(unsigned long addr
, int numpages
)
1588 unsigned long addr_copy
= addr
;
1590 ret
= change_page_attr_set(&addr
, numpages
,
1591 cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS
),
1594 ret
= change_page_attr_set_clr(&addr_copy
, numpages
,
1596 _PAGE_CACHE_MODE_WC
),
1597 __pgprot(_PAGE_CACHE_MASK
),
1603 int set_memory_wc(unsigned long addr
, int numpages
)
1607 ret
= reserve_memtype(__pa(addr
), __pa(addr
) + numpages
* PAGE_SIZE
,
1608 _PAGE_CACHE_MODE_WC
, NULL
);
1612 ret
= _set_memory_wc(addr
, numpages
);
1614 free_memtype(__pa(addr
), __pa(addr
) + numpages
* PAGE_SIZE
);
1618 EXPORT_SYMBOL(set_memory_wc
);
1620 int _set_memory_wt(unsigned long addr
, int numpages
)
1622 return change_page_attr_set(&addr
, numpages
,
1623 cachemode2pgprot(_PAGE_CACHE_MODE_WT
), 0);
1626 int set_memory_wt(unsigned long addr
, int numpages
)
1630 ret
= reserve_memtype(__pa(addr
), __pa(addr
) + numpages
* PAGE_SIZE
,
1631 _PAGE_CACHE_MODE_WT
, NULL
);
1635 ret
= _set_memory_wt(addr
, numpages
);
1637 free_memtype(__pa(addr
), __pa(addr
) + numpages
* PAGE_SIZE
);
1641 EXPORT_SYMBOL_GPL(set_memory_wt
);
1643 int _set_memory_wb(unsigned long addr
, int numpages
)
1645 /* WB cache mode is hard wired to all cache attribute bits being 0 */
1646 return change_page_attr_clear(&addr
, numpages
,
1647 __pgprot(_PAGE_CACHE_MASK
), 0);
1650 int set_memory_wb(unsigned long addr
, int numpages
)
1654 ret
= _set_memory_wb(addr
, numpages
);
1658 free_memtype(__pa(addr
), __pa(addr
) + numpages
* PAGE_SIZE
);
1661 EXPORT_SYMBOL(set_memory_wb
);
1663 int set_memory_array_wb(unsigned long *addr
, int addrinarray
)
1668 /* WB cache mode is hard wired to all cache attribute bits being 0 */
1669 ret
= change_page_attr_clear(addr
, addrinarray
,
1670 __pgprot(_PAGE_CACHE_MASK
), 1);
1674 for (i
= 0; i
< addrinarray
; i
++)
1675 free_memtype(__pa(addr
[i
]), __pa(addr
[i
]) + PAGE_SIZE
);
1679 EXPORT_SYMBOL(set_memory_array_wb
);
1681 int set_memory_x(unsigned long addr
, int numpages
)
1683 if (!(__supported_pte_mask
& _PAGE_NX
))
1686 return change_page_attr_clear(&addr
, numpages
, __pgprot(_PAGE_NX
), 0);
1688 EXPORT_SYMBOL(set_memory_x
);
1690 int set_memory_nx(unsigned long addr
, int numpages
)
1692 if (!(__supported_pte_mask
& _PAGE_NX
))
1695 return change_page_attr_set(&addr
, numpages
, __pgprot(_PAGE_NX
), 0);
1697 EXPORT_SYMBOL(set_memory_nx
);
1699 int set_memory_ro(unsigned long addr
, int numpages
)
1701 return change_page_attr_clear(&addr
, numpages
, __pgprot(_PAGE_RW
), 0);
1704 int set_memory_rw(unsigned long addr
, int numpages
)
1706 return change_page_attr_set(&addr
, numpages
, __pgprot(_PAGE_RW
), 0);
1709 int set_memory_np(unsigned long addr
, int numpages
)
1711 return change_page_attr_clear(&addr
, numpages
, __pgprot(_PAGE_PRESENT
), 0);
1714 int set_memory_4k(unsigned long addr
, int numpages
)
1716 return change_page_attr_set_clr(&addr
, numpages
, __pgprot(0),
1717 __pgprot(0), 1, 0, NULL
);
1720 int set_pages_uc(struct page
*page
, int numpages
)
1722 unsigned long addr
= (unsigned long)page_address(page
);
1724 return set_memory_uc(addr
, numpages
);
1726 EXPORT_SYMBOL(set_pages_uc
);
1728 static int _set_pages_array(struct page
**pages
, int addrinarray
,
1729 enum page_cache_mode new_type
)
1731 unsigned long start
;
1733 enum page_cache_mode set_type
;
1738 for (i
= 0; i
< addrinarray
; i
++) {
1739 if (PageHighMem(pages
[i
]))
1741 start
= page_to_pfn(pages
[i
]) << PAGE_SHIFT
;
1742 end
= start
+ PAGE_SIZE
;
1743 if (reserve_memtype(start
, end
, new_type
, NULL
))
1747 /* If WC, set to UC- first and then WC */
1748 set_type
= (new_type
== _PAGE_CACHE_MODE_WC
) ?
1749 _PAGE_CACHE_MODE_UC_MINUS
: new_type
;
1751 ret
= cpa_set_pages_array(pages
, addrinarray
,
1752 cachemode2pgprot(set_type
));
1753 if (!ret
&& new_type
== _PAGE_CACHE_MODE_WC
)
1754 ret
= change_page_attr_set_clr(NULL
, addrinarray
,
1756 _PAGE_CACHE_MODE_WC
),
1757 __pgprot(_PAGE_CACHE_MASK
),
1758 0, CPA_PAGES_ARRAY
, pages
);
1761 return 0; /* Success */
1764 for (i
= 0; i
< free_idx
; i
++) {
1765 if (PageHighMem(pages
[i
]))
1767 start
= page_to_pfn(pages
[i
]) << PAGE_SHIFT
;
1768 end
= start
+ PAGE_SIZE
;
1769 free_memtype(start
, end
);
1774 int set_pages_array_uc(struct page
**pages
, int addrinarray
)
1776 return _set_pages_array(pages
, addrinarray
, _PAGE_CACHE_MODE_UC_MINUS
);
1778 EXPORT_SYMBOL(set_pages_array_uc
);
1780 int set_pages_array_wc(struct page
**pages
, int addrinarray
)
1782 return _set_pages_array(pages
, addrinarray
, _PAGE_CACHE_MODE_WC
);
1784 EXPORT_SYMBOL(set_pages_array_wc
);
1786 int set_pages_array_wt(struct page
**pages
, int addrinarray
)
1788 return _set_pages_array(pages
, addrinarray
, _PAGE_CACHE_MODE_WT
);
1790 EXPORT_SYMBOL_GPL(set_pages_array_wt
);
1792 int set_pages_wb(struct page
*page
, int numpages
)
1794 unsigned long addr
= (unsigned long)page_address(page
);
1796 return set_memory_wb(addr
, numpages
);
1798 EXPORT_SYMBOL(set_pages_wb
);
1800 int set_pages_array_wb(struct page
**pages
, int addrinarray
)
1803 unsigned long start
;
1807 /* WB cache mode is hard wired to all cache attribute bits being 0 */
1808 retval
= cpa_clear_pages_array(pages
, addrinarray
,
1809 __pgprot(_PAGE_CACHE_MASK
));
1813 for (i
= 0; i
< addrinarray
; i
++) {
1814 if (PageHighMem(pages
[i
]))
1816 start
= page_to_pfn(pages
[i
]) << PAGE_SHIFT
;
1817 end
= start
+ PAGE_SIZE
;
1818 free_memtype(start
, end
);
1823 EXPORT_SYMBOL(set_pages_array_wb
);
1825 int set_pages_x(struct page
*page
, int numpages
)
1827 unsigned long addr
= (unsigned long)page_address(page
);
1829 return set_memory_x(addr
, numpages
);
1831 EXPORT_SYMBOL(set_pages_x
);
1833 int set_pages_nx(struct page
*page
, int numpages
)
1835 unsigned long addr
= (unsigned long)page_address(page
);
1837 return set_memory_nx(addr
, numpages
);
1839 EXPORT_SYMBOL(set_pages_nx
);
1841 int set_pages_ro(struct page
*page
, int numpages
)
1843 unsigned long addr
= (unsigned long)page_address(page
);
1845 return set_memory_ro(addr
, numpages
);
1848 int set_pages_rw(struct page
*page
, int numpages
)
1850 unsigned long addr
= (unsigned long)page_address(page
);
1852 return set_memory_rw(addr
, numpages
);
1855 #ifdef CONFIG_DEBUG_PAGEALLOC
1857 static int __set_pages_p(struct page
*page
, int numpages
)
1859 unsigned long tempaddr
= (unsigned long) page_address(page
);
1860 struct cpa_data cpa
= { .vaddr
= &tempaddr
,
1862 .numpages
= numpages
,
1863 .mask_set
= __pgprot(_PAGE_PRESENT
| _PAGE_RW
),
1864 .mask_clr
= __pgprot(0),
1868 * No alias checking needed for setting present flag. otherwise,
1869 * we may need to break large pages for 64-bit kernel text
1870 * mappings (this adds to complexity if we want to do this from
1871 * atomic context especially). Let's keep it simple!
1873 return __change_page_attr_set_clr(&cpa
, 0);
1876 static int __set_pages_np(struct page
*page
, int numpages
)
1878 unsigned long tempaddr
= (unsigned long) page_address(page
);
1879 struct cpa_data cpa
= { .vaddr
= &tempaddr
,
1881 .numpages
= numpages
,
1882 .mask_set
= __pgprot(0),
1883 .mask_clr
= __pgprot(_PAGE_PRESENT
| _PAGE_RW
),
1887 * No alias checking needed for setting not present flag. otherwise,
1888 * we may need to break large pages for 64-bit kernel text
1889 * mappings (this adds to complexity if we want to do this from
1890 * atomic context especially). Let's keep it simple!
1892 return __change_page_attr_set_clr(&cpa
, 0);
1895 void __kernel_map_pages(struct page
*page
, int numpages
, int enable
)
1897 if (PageHighMem(page
))
1900 debug_check_no_locks_freed(page_address(page
),
1901 numpages
* PAGE_SIZE
);
1905 * The return value is ignored as the calls cannot fail.
1906 * Large pages for identity mappings are not used at boot time
1907 * and hence no memory allocations during large page split.
1910 __set_pages_p(page
, numpages
);
1912 __set_pages_np(page
, numpages
);
1915 * We should perform an IPI and flush all tlbs,
1916 * but that can deadlock->flush only current cpu:
1920 arch_flush_lazy_mmu_mode();
1923 #ifdef CONFIG_HIBERNATION
1925 bool kernel_page_present(struct page
*page
)
1930 if (PageHighMem(page
))
1933 pte
= lookup_address((unsigned long)page_address(page
), &level
);
1934 return (pte_val(*pte
) & _PAGE_PRESENT
);
1937 #endif /* CONFIG_HIBERNATION */
1939 #endif /* CONFIG_DEBUG_PAGEALLOC */
1941 int kernel_map_pages_in_pgd(pgd_t
*pgd
, u64 pfn
, unsigned long address
,
1942 unsigned numpages
, unsigned long page_flags
)
1944 int retval
= -EINVAL
;
1946 struct cpa_data cpa
= {
1950 .numpages
= numpages
,
1951 .mask_set
= __pgprot(0),
1952 .mask_clr
= __pgprot(0),
1956 if (!(__supported_pte_mask
& _PAGE_NX
))
1959 if (!(page_flags
& _PAGE_NX
))
1960 cpa
.mask_clr
= __pgprot(_PAGE_NX
);
1962 cpa
.mask_set
= __pgprot(_PAGE_PRESENT
| page_flags
);
1964 retval
= __change_page_attr_set_clr(&cpa
, 0);
1971 void kernel_unmap_pages_in_pgd(pgd_t
*root
, unsigned long address
,
1974 unmap_pgd_range(root
, address
, address
+ (numpages
<< PAGE_SHIFT
));
1978 * The testcases use internal knowledge of the implementation that shouldn't
1979 * be exposed to the rest of the kernel. Include these directly here.
1981 #ifdef CONFIG_CPA_DEBUG
1982 #include "pageattr-test.c"