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of: MSI: Simplify irqdomain lookup
[linux/fpc-iii.git] / drivers / mailbox / omap-mailbox.c
blobb7f636f15cac284028cd7039c82470deaffe2f95
1 /*
2 * OMAP mailbox driver
3 *
4 * Copyright (C) 2006-2009 Nokia Corporation. All rights reserved.
5 * Copyright (C) 2013-2014 Texas Instruments Inc.
6 *
7 * Contact: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
8 * Suman Anna <s-anna@ti.com>
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * version 2 as published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
22 * 02110-1301 USA
23 *
24 */
25
26 #include <linux/interrupt.h>
27 #include <linux/spinlock.h>
28 #include <linux/mutex.h>
29 #include <linux/slab.h>
30 #include <linux/kfifo.h>
31 #include <linux/err.h>
32 #include <linux/module.h>
33 #include <linux/of_device.h>
34 #include <linux/platform_device.h>
35 #include <linux/pm_runtime.h>
36 #include <linux/platform_data/mailbox-omap.h>
37 #include <linux/omap-mailbox.h>
38 #include <linux/mailbox_controller.h>
39 #include <linux/mailbox_client.h>
40
41 #include "mailbox.h"
42
43 #define MAILBOX_REVISION 0x000
44 #define MAILBOX_MESSAGE(m) (0x040 + 4 * (m))
45 #define MAILBOX_FIFOSTATUS(m) (0x080 + 4 * (m))
46 #define MAILBOX_MSGSTATUS(m) (0x0c0 + 4 * (m))
47
48 #define OMAP2_MAILBOX_IRQSTATUS(u) (0x100 + 8 * (u))
49 #define OMAP2_MAILBOX_IRQENABLE(u) (0x104 + 8 * (u))
50
51 #define OMAP4_MAILBOX_IRQSTATUS(u) (0x104 + 0x10 * (u))
52 #define OMAP4_MAILBOX_IRQENABLE(u) (0x108 + 0x10 * (u))
53 #define OMAP4_MAILBOX_IRQENABLE_CLR(u) (0x10c + 0x10 * (u))
54
55 #define MAILBOX_IRQSTATUS(type, u) (type ? OMAP4_MAILBOX_IRQSTATUS(u) : \
56 OMAP2_MAILBOX_IRQSTATUS(u))
57 #define MAILBOX_IRQENABLE(type, u) (type ? OMAP4_MAILBOX_IRQENABLE(u) : \
58 OMAP2_MAILBOX_IRQENABLE(u))
59 #define MAILBOX_IRQDISABLE(type, u) (type ? OMAP4_MAILBOX_IRQENABLE_CLR(u) \
60 : OMAP2_MAILBOX_IRQENABLE(u))
61
62 #define MAILBOX_IRQ_NEWMSG(m) (1 << (2 * (m)))
63 #define MAILBOX_IRQ_NOTFULL(m) (1 << (2 * (m) + 1))
64
65 #define MBOX_REG_SIZE 0x120
66
67 #define OMAP4_MBOX_REG_SIZE 0x130
68
69 #define MBOX_NR_REGS (MBOX_REG_SIZE / sizeof(u32))
70 #define OMAP4_MBOX_NR_REGS (OMAP4_MBOX_REG_SIZE / sizeof(u32))
71
72 struct omap_mbox_fifo {
73 unsigned long msg;
74 unsigned long fifo_stat;
75 unsigned long msg_stat;
76 unsigned long irqenable;
77 unsigned long irqstatus;
78 unsigned long irqdisable;
79 u32 intr_bit;
80 };
81
82 struct omap_mbox_queue {
83 spinlock_t lock;
84 struct kfifo fifo;
85 struct work_struct work;
86 struct omap_mbox *mbox;
87 bool full;
88 };
89
90 struct omap_mbox_device {
91 struct device *dev;
92 struct mutex cfg_lock;
93 void __iomem *mbox_base;
94 u32 num_users;
95 u32 num_fifos;
96 struct omap_mbox **mboxes;
97 struct mbox_controller controller;
98 struct list_head elem;
99 };
100
101 struct omap_mbox_fifo_info {
102 int tx_id;
103 int tx_usr;
104 int tx_irq;
105
106 int rx_id;
107 int rx_usr;
108 int rx_irq;
109
110 const char *name;
111 bool send_no_irq;
112 };
113
114 struct omap_mbox {
115 const char *name;
116 int irq;
117 struct omap_mbox_queue *rxq;
118 struct device *dev;
119 struct omap_mbox_device *parent;
120 struct omap_mbox_fifo tx_fifo;
121 struct omap_mbox_fifo rx_fifo;
122 u32 ctx[OMAP4_MBOX_NR_REGS];
123 u32 intr_type;
124 struct mbox_chan *chan;
125 bool send_no_irq;
126 };
127
128 /* global variables for the mailbox devices */
129 static DEFINE_MUTEX(omap_mbox_devices_lock);
130 static LIST_HEAD(omap_mbox_devices);
131
132 static unsigned int mbox_kfifo_size = CONFIG_OMAP_MBOX_KFIFO_SIZE;
133 module_param(mbox_kfifo_size, uint, S_IRUGO);
134 MODULE_PARM_DESC(mbox_kfifo_size, "Size of omap's mailbox kfifo (bytes)");
135
136 static struct omap_mbox *mbox_chan_to_omap_mbox(struct mbox_chan *chan)
137 {
138 if (!chan || !chan->con_priv)
139 return NULL;
140
141 return (struct omap_mbox *)chan->con_priv;
142 }
143
144 static inline
145 unsigned int mbox_read_reg(struct omap_mbox_device *mdev, size_t ofs)
146 {
147 return __raw_readl(mdev->mbox_base + ofs);
148 }
149
150 static inline
151 void mbox_write_reg(struct omap_mbox_device *mdev, u32 val, size_t ofs)
152 {
153 __raw_writel(val, mdev->mbox_base + ofs);
154 }
155
156 /* Mailbox FIFO handle functions */
157 static mbox_msg_t mbox_fifo_read(struct omap_mbox *mbox)
158 {
159 struct omap_mbox_fifo *fifo = &mbox->rx_fifo;
160 return (mbox_msg_t) mbox_read_reg(mbox->parent, fifo->msg);
161 }
162
163 static void mbox_fifo_write(struct omap_mbox *mbox, mbox_msg_t msg)
164 {
165 struct omap_mbox_fifo *fifo = &mbox->tx_fifo;
166 mbox_write_reg(mbox->parent, msg, fifo->msg);
167 }
168
169 static int mbox_fifo_empty(struct omap_mbox *mbox)
170 {
171 struct omap_mbox_fifo *fifo = &mbox->rx_fifo;
172 return (mbox_read_reg(mbox->parent, fifo->msg_stat) == 0);
173 }
174
175 static int mbox_fifo_full(struct omap_mbox *mbox)
176 {
177 struct omap_mbox_fifo *fifo = &mbox->tx_fifo;
178 return mbox_read_reg(mbox->parent, fifo->fifo_stat);
179 }
180
181 /* Mailbox IRQ handle functions */
182 static void ack_mbox_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
183 {
184 struct omap_mbox_fifo *fifo = (irq == IRQ_TX) ?
185 &mbox->tx_fifo : &mbox->rx_fifo;
186 u32 bit = fifo->intr_bit;
187 u32 irqstatus = fifo->irqstatus;
188
189 mbox_write_reg(mbox->parent, bit, irqstatus);
190
191 /* Flush posted write for irq status to avoid spurious interrupts */
192 mbox_read_reg(mbox->parent, irqstatus);
193 }
194
195 static int is_mbox_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
196 {
197 struct omap_mbox_fifo *fifo = (irq == IRQ_TX) ?
198 &mbox->tx_fifo : &mbox->rx_fifo;
199 u32 bit = fifo->intr_bit;
200 u32 irqenable = fifo->irqenable;
201 u32 irqstatus = fifo->irqstatus;
202
203 u32 enable = mbox_read_reg(mbox->parent, irqenable);
204 u32 status = mbox_read_reg(mbox->parent, irqstatus);
205
206 return (int)(enable & status & bit);
207 }
208
209 void omap_mbox_save_ctx(struct mbox_chan *chan)
210 {
211 int i;
212 int nr_regs;
213 struct omap_mbox *mbox = mbox_chan_to_omap_mbox(chan);
214
215 if (WARN_ON(!mbox))
216 return;
217
218 if (mbox->intr_type)
219 nr_regs = OMAP4_MBOX_NR_REGS;
220 else
221 nr_regs = MBOX_NR_REGS;
222 for (i = 0; i < nr_regs; i++) {
223 mbox->ctx[i] = mbox_read_reg(mbox->parent, i * sizeof(u32));
224
225 dev_dbg(mbox->dev, "%s: [%02x] %08x\n", __func__,
226 i, mbox->ctx[i]);
227 }
228 }
229 EXPORT_SYMBOL(omap_mbox_save_ctx);
230
231 void omap_mbox_restore_ctx(struct mbox_chan *chan)
232 {
233 int i;
234 int nr_regs;
235 struct omap_mbox *mbox = mbox_chan_to_omap_mbox(chan);
236
237 if (WARN_ON(!mbox))
238 return;
239
240 if (mbox->intr_type)
241 nr_regs = OMAP4_MBOX_NR_REGS;
242 else
243 nr_regs = MBOX_NR_REGS;
244 for (i = 0; i < nr_regs; i++) {
245 mbox_write_reg(mbox->parent, mbox->ctx[i], i * sizeof(u32));
246 dev_dbg(mbox->dev, "%s: [%02x] %08x\n", __func__,
247 i, mbox->ctx[i]);
248 }
249 }
250 EXPORT_SYMBOL(omap_mbox_restore_ctx);
251
252 static void _omap_mbox_enable_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
253 {
254 u32 l;
255 struct omap_mbox_fifo *fifo = (irq == IRQ_TX) ?
256 &mbox->tx_fifo : &mbox->rx_fifo;
257 u32 bit = fifo->intr_bit;
258 u32 irqenable = fifo->irqenable;
259
260 l = mbox_read_reg(mbox->parent, irqenable);
261 l |= bit;
262 mbox_write_reg(mbox->parent, l, irqenable);
263 }
264
265 static void _omap_mbox_disable_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
266 {
267 struct omap_mbox_fifo *fifo = (irq == IRQ_TX) ?
268 &mbox->tx_fifo : &mbox->rx_fifo;
269 u32 bit = fifo->intr_bit;
270 u32 irqdisable = fifo->irqdisable;
271
272 /*
273 * Read and update the interrupt configuration register for pre-OMAP4.
274 * OMAP4 and later SoCs have a dedicated interrupt disabling register.
275 */
276 if (!mbox->intr_type)
277 bit = mbox_read_reg(mbox->parent, irqdisable) & ~bit;
278
279 mbox_write_reg(mbox->parent, bit, irqdisable);
280 }
281
282 void omap_mbox_enable_irq(struct mbox_chan *chan, omap_mbox_irq_t irq)
283 {
284 struct omap_mbox *mbox = mbox_chan_to_omap_mbox(chan);
285
286 if (WARN_ON(!mbox))
287 return;
288
289 _omap_mbox_enable_irq(mbox, irq);
290 }
291 EXPORT_SYMBOL(omap_mbox_enable_irq);
292
293 void omap_mbox_disable_irq(struct mbox_chan *chan, omap_mbox_irq_t irq)
294 {
295 struct omap_mbox *mbox = mbox_chan_to_omap_mbox(chan);
296
297 if (WARN_ON(!mbox))
298 return;
299
300 _omap_mbox_disable_irq(mbox, irq);
301 }
302 EXPORT_SYMBOL(omap_mbox_disable_irq);
303
304 /*
305 * Message receiver(workqueue)
306 */
307 static void mbox_rx_work(struct work_struct *work)
308 {
309 struct omap_mbox_queue *mq =
310 container_of(work, struct omap_mbox_queue, work);
311 mbox_msg_t msg;
312 int len;
313
314 while (kfifo_len(&mq->fifo) >= sizeof(msg)) {
315 len = kfifo_out(&mq->fifo, (unsigned char *)&msg, sizeof(msg));
316 WARN_ON(len != sizeof(msg));
317
318 mbox_chan_received_data(mq->mbox->chan, (void *)msg);
319 spin_lock_irq(&mq->lock);
320 if (mq->full) {
321 mq->full = false;
322 _omap_mbox_enable_irq(mq->mbox, IRQ_RX);
323 }
324 spin_unlock_irq(&mq->lock);
325 }
326 }
327
328 /*
329 * Mailbox interrupt handler
330 */
331 static void __mbox_tx_interrupt(struct omap_mbox *mbox)
332 {
333 _omap_mbox_disable_irq(mbox, IRQ_TX);
334 ack_mbox_irq(mbox, IRQ_TX);
335 mbox_chan_txdone(mbox->chan, 0);
336 }
337
338 static void __mbox_rx_interrupt(struct omap_mbox *mbox)
339 {
340 struct omap_mbox_queue *mq = mbox->rxq;
341 mbox_msg_t msg;
342 int len;
343
344 while (!mbox_fifo_empty(mbox)) {
345 if (unlikely(kfifo_avail(&mq->fifo) < sizeof(msg))) {
346 _omap_mbox_disable_irq(mbox, IRQ_RX);
347 mq->full = true;
348 goto nomem;
349 }
350
351 msg = mbox_fifo_read(mbox);
352
353 len = kfifo_in(&mq->fifo, (unsigned char *)&msg, sizeof(msg));
354 WARN_ON(len != sizeof(msg));
355 }
356
357 /* no more messages in the fifo. clear IRQ source. */
358 ack_mbox_irq(mbox, IRQ_RX);
359 nomem:
360 schedule_work(&mbox->rxq->work);
361 }
362
363 static irqreturn_t mbox_interrupt(int irq, void *p)
364 {
365 struct omap_mbox *mbox = p;
366
367 if (is_mbox_irq(mbox, IRQ_TX))
368 __mbox_tx_interrupt(mbox);
369
370 if (is_mbox_irq(mbox, IRQ_RX))
371 __mbox_rx_interrupt(mbox);
372
373 return IRQ_HANDLED;
374 }
375
376 static struct omap_mbox_queue *mbox_queue_alloc(struct omap_mbox *mbox,
377 void (*work)(struct work_struct *))
378 {
379 struct omap_mbox_queue *mq;
380
381 if (!work)
382 return NULL;
383
384 mq = kzalloc(sizeof(struct omap_mbox_queue), GFP_KERNEL);
385 if (!mq)
386 return NULL;
387
388 spin_lock_init(&mq->lock);
389
390 if (kfifo_alloc(&mq->fifo, mbox_kfifo_size, GFP_KERNEL))
391 goto error;
392
393 INIT_WORK(&mq->work, work);
394 return mq;
395
396 error:
397 kfree(mq);
398 return NULL;
399 }
400
401 static void mbox_queue_free(struct omap_mbox_queue *q)
402 {
403 kfifo_free(&q->fifo);
404 kfree(q);
405 }
406
407 static int omap_mbox_startup(struct omap_mbox *mbox)
408 {
409 int ret = 0;
410 struct omap_mbox_queue *mq;
411
412 mq = mbox_queue_alloc(mbox, mbox_rx_work);
413 if (!mq)
414 return -ENOMEM;
415 mbox->rxq = mq;
416 mq->mbox = mbox;
417
418 ret = request_irq(mbox->irq, mbox_interrupt, IRQF_SHARED,
419 mbox->name, mbox);
420 if (unlikely(ret)) {
421 pr_err("failed to register mailbox interrupt:%d\n", ret);
422 goto fail_request_irq;
423 }
424
425 if (mbox->send_no_irq)
426 mbox->chan->txdone_method = TXDONE_BY_ACK;
427
428 _omap_mbox_enable_irq(mbox, IRQ_RX);
429
430 return 0;
431
432 fail_request_irq:
433 mbox_queue_free(mbox->rxq);
434 return ret;
435 }
436
437 static void omap_mbox_fini(struct omap_mbox *mbox)
438 {
439 _omap_mbox_disable_irq(mbox, IRQ_RX);
440 free_irq(mbox->irq, mbox);
441 flush_work(&mbox->rxq->work);
442 mbox_queue_free(mbox->rxq);
443 }
444
445 static struct omap_mbox *omap_mbox_device_find(struct omap_mbox_device *mdev,
446 const char *mbox_name)
447 {
448 struct omap_mbox *_mbox, *mbox = NULL;
449 struct omap_mbox **mboxes = mdev->mboxes;
450 int i;
451
452 if (!mboxes)
453 return NULL;
454
455 for (i = 0; (_mbox = mboxes[i]); i++) {
456 if (!strcmp(_mbox->name, mbox_name)) {
457 mbox = _mbox;
458 break;
459 }
460 }
461 return mbox;
462 }
463
464 struct mbox_chan *omap_mbox_request_channel(struct mbox_client *cl,
465 const char *chan_name)
466 {
467 struct device *dev = cl->dev;
468 struct omap_mbox *mbox = NULL;
469 struct omap_mbox_device *mdev;
470 struct mbox_chan *chan;
471 unsigned long flags;
472 int ret;
473
474 if (!dev)
475 return ERR_PTR(-ENODEV);
476
477 if (dev->of_node) {
478 pr_err("%s: please use mbox_request_channel(), this API is supported only for OMAP non-DT usage\n",
479 __func__);
480 return ERR_PTR(-ENODEV);
481 }
482
483 mutex_lock(&omap_mbox_devices_lock);
484 list_for_each_entry(mdev, &omap_mbox_devices, elem) {
485 mbox = omap_mbox_device_find(mdev, chan_name);
486 if (mbox)
487 break;
488 }
489 mutex_unlock(&omap_mbox_devices_lock);
490
491 if (!mbox || !mbox->chan)
492 return ERR_PTR(-ENOENT);
493
494 chan = mbox->chan;
495 spin_lock_irqsave(&chan->lock, flags);
496 chan->msg_free = 0;
497 chan->msg_count = 0;
498 chan->active_req = NULL;
499 chan->cl = cl;
500 init_completion(&chan->tx_complete);
501 spin_unlock_irqrestore(&chan->lock, flags);
502
503 ret = chan->mbox->ops->startup(chan);
504 if (ret) {
505 pr_err("Unable to startup the chan (%d)\n", ret);
506 mbox_free_channel(chan);
507 chan = ERR_PTR(ret);
508 }
509
510 return chan;
511 }
512 EXPORT_SYMBOL(omap_mbox_request_channel);
513
514 static struct class omap_mbox_class = { .name = "mbox", };
515
516 static int omap_mbox_register(struct omap_mbox_device *mdev)
517 {
518 int ret;
519 int i;
520 struct omap_mbox **mboxes;
521
522 if (!mdev || !mdev->mboxes)
523 return -EINVAL;
524
525 mboxes = mdev->mboxes;
526 for (i = 0; mboxes[i]; i++) {
527 struct omap_mbox *mbox = mboxes[i];
528 mbox->dev = device_create(&omap_mbox_class, mdev->dev,
529 0, mbox, "%s", mbox->name);
530 if (IS_ERR(mbox->dev)) {
531 ret = PTR_ERR(mbox->dev);
532 goto err_out;
533 }
534 }
535
536 mutex_lock(&omap_mbox_devices_lock);
537 list_add(&mdev->elem, &omap_mbox_devices);
538 mutex_unlock(&omap_mbox_devices_lock);
539
540 ret = mbox_controller_register(&mdev->controller);
541
542 err_out:
543 if (ret) {
544 while (i--)
545 device_unregister(mboxes[i]->dev);
546 }
547 return ret;
548 }
549
550 static int omap_mbox_unregister(struct omap_mbox_device *mdev)
551 {
552 int i;
553 struct omap_mbox **mboxes;
554
555 if (!mdev || !mdev->mboxes)
556 return -EINVAL;
557
558 mutex_lock(&omap_mbox_devices_lock);
559 list_del(&mdev->elem);
560 mutex_unlock(&omap_mbox_devices_lock);
561
562 mbox_controller_unregister(&mdev->controller);
563
564 mboxes = mdev->mboxes;
565 for (i = 0; mboxes[i]; i++)
566 device_unregister(mboxes[i]->dev);
567 return 0;
568 }
569
570 static int omap_mbox_chan_startup(struct mbox_chan *chan)
571 {
572 struct omap_mbox *mbox = mbox_chan_to_omap_mbox(chan);
573 struct omap_mbox_device *mdev = mbox->parent;
574 int ret = 0;
575
576 mutex_lock(&mdev->cfg_lock);
577 pm_runtime_get_sync(mdev->dev);
578 ret = omap_mbox_startup(mbox);
579 if (ret)
580 pm_runtime_put_sync(mdev->dev);
581 mutex_unlock(&mdev->cfg_lock);
582 return ret;
583 }
584
585 static void omap_mbox_chan_shutdown(struct mbox_chan *chan)
586 {
587 struct omap_mbox *mbox = mbox_chan_to_omap_mbox(chan);
588 struct omap_mbox_device *mdev = mbox->parent;
589
590 mutex_lock(&mdev->cfg_lock);
591 omap_mbox_fini(mbox);
592 pm_runtime_put_sync(mdev->dev);
593 mutex_unlock(&mdev->cfg_lock);
594 }
595
596 static int omap_mbox_chan_send_noirq(struct omap_mbox *mbox, void *data)
597 {
598 int ret = -EBUSY;
599
600 if (!mbox_fifo_full(mbox)) {
601 _omap_mbox_enable_irq(mbox, IRQ_RX);
602 mbox_fifo_write(mbox, (mbox_msg_t)data);
603 ret = 0;
604 _omap_mbox_disable_irq(mbox, IRQ_RX);
605
606 /* we must read and ack the interrupt directly from here */
607 mbox_fifo_read(mbox);
608 ack_mbox_irq(mbox, IRQ_RX);
609 }
610
611 return ret;
612 }
613
614 static int omap_mbox_chan_send(struct omap_mbox *mbox, void *data)
615 {
616 int ret = -EBUSY;
617
618 if (!mbox_fifo_full(mbox)) {
619 mbox_fifo_write(mbox, (mbox_msg_t)data);
620 ret = 0;
621 }
622
623 /* always enable the interrupt */
624 _omap_mbox_enable_irq(mbox, IRQ_TX);
625 return ret;
626 }
627
628 static int omap_mbox_chan_send_data(struct mbox_chan *chan, void *data)
629 {
630 struct omap_mbox *mbox = mbox_chan_to_omap_mbox(chan);
631 int ret;
632
633 if (!mbox)
634 return -EINVAL;
635
636 if (mbox->send_no_irq)
637 ret = omap_mbox_chan_send_noirq(mbox, data);
638 else
639 ret = omap_mbox_chan_send(mbox, data);
640
641 return ret;
642 }
643
644 static const struct mbox_chan_ops omap_mbox_chan_ops = {
645 .startup = omap_mbox_chan_startup,
646 .send_data = omap_mbox_chan_send_data,
647 .shutdown = omap_mbox_chan_shutdown,
648 };
649
650 static const struct of_device_id omap_mailbox_of_match[] = {
651 {
652 .compatible = "ti,omap2-mailbox",
653 .data = (void *)MBOX_INTR_CFG_TYPE1,
654 },
655 {
656 .compatible = "ti,omap3-mailbox",
657 .data = (void *)MBOX_INTR_CFG_TYPE1,
658 },
659 {
660 .compatible = "ti,omap4-mailbox",
661 .data = (void *)MBOX_INTR_CFG_TYPE2,
662 },
663 {
664 /* end */
665 },
666 };
667 MODULE_DEVICE_TABLE(of, omap_mailbox_of_match);
668
669 static struct mbox_chan *omap_mbox_of_xlate(struct mbox_controller *controller,
670 const struct of_phandle_args *sp)
671 {
672 phandle phandle = sp->args[0];
673 struct device_node *node;
674 struct omap_mbox_device *mdev;
675 struct omap_mbox *mbox;
676
677 mdev = container_of(controller, struct omap_mbox_device, controller);
678 if (WARN_ON(!mdev))
679 return ERR_PTR(-EINVAL);
680
681 node = of_find_node_by_phandle(phandle);
682 if (!node) {
683 pr_err("%s: could not find node phandle 0x%x\n",
684 __func__, phandle);
685 return ERR_PTR(-ENODEV);
686 }
687
688 mbox = omap_mbox_device_find(mdev, node->name);
689 of_node_put(node);
690 return mbox ? mbox->chan : ERR_PTR(-ENOENT);
691 }
692
693 static int omap_mbox_probe(struct platform_device *pdev)
694 {
695 struct resource *mem;
696 int ret;
697 struct mbox_chan *chnls;
698 struct omap_mbox **list, *mbox, *mboxblk;
699 struct omap_mbox_pdata *pdata = pdev->dev.platform_data;
700 struct omap_mbox_dev_info *info = NULL;
701 struct omap_mbox_fifo_info *finfo, *finfoblk;
702 struct omap_mbox_device *mdev;
703 struct omap_mbox_fifo *fifo;
704 struct device_node *node = pdev->dev.of_node;
705 struct device_node *child;
706 const struct of_device_id *match;
707 u32 intr_type, info_count;
708 u32 num_users, num_fifos;
709 u32 tmp[3];
710 u32 l;
711 int i;
712
713 if (!node && (!pdata || !pdata->info_cnt || !pdata->info)) {
714 pr_err("%s: platform not supported\n", __func__);
715 return -ENODEV;
716 }
717
718 if (node) {
719 match = of_match_device(omap_mailbox_of_match, &pdev->dev);
720 if (!match)
721 return -ENODEV;
722 intr_type = (u32)match->data;
723
724 if (of_property_read_u32(node, "ti,mbox-num-users",
725 &num_users))
726 return -ENODEV;
727
728 if (of_property_read_u32(node, "ti,mbox-num-fifos",
729 &num_fifos))
730 return -ENODEV;
731
732 info_count = of_get_available_child_count(node);
733 if (!info_count) {
734 dev_err(&pdev->dev, "no available mbox devices found\n");
735 return -ENODEV;
736 }
737 } else { /* non-DT device creation */
738 info_count = pdata->info_cnt;
739 info = pdata->info;
740 intr_type = pdata->intr_type;
741 num_users = pdata->num_users;
742 num_fifos = pdata->num_fifos;
743 }
744
745 finfoblk = devm_kzalloc(&pdev->dev, info_count * sizeof(*finfoblk),
746 GFP_KERNEL);
747 if (!finfoblk)
748 return -ENOMEM;
749
750 finfo = finfoblk;
751 child = NULL;
752 for (i = 0; i < info_count; i++, finfo++) {
753 if (node) {
754 child = of_get_next_available_child(node, child);
755 ret = of_property_read_u32_array(child, "ti,mbox-tx",
756 tmp, ARRAY_SIZE(tmp));
757 if (ret)
758 return ret;
759 finfo->tx_id = tmp[0];
760 finfo->tx_irq = tmp[1];
761 finfo->tx_usr = tmp[2];
762
763 ret = of_property_read_u32_array(child, "ti,mbox-rx",
764 tmp, ARRAY_SIZE(tmp));
765 if (ret)
766 return ret;
767 finfo->rx_id = tmp[0];
768 finfo->rx_irq = tmp[1];
769 finfo->rx_usr = tmp[2];
770
771 finfo->name = child->name;
772
773 if (of_find_property(child, "ti,mbox-send-noirq", NULL))
774 finfo->send_no_irq = true;
775 } else {
776 finfo->tx_id = info->tx_id;
777 finfo->rx_id = info->rx_id;
778 finfo->tx_usr = info->usr_id;
779 finfo->tx_irq = info->irq_id;
780 finfo->rx_usr = info->usr_id;
781 finfo->rx_irq = info->irq_id;
782 finfo->name = info->name;
783 info++;
784 }
785 if (finfo->tx_id >= num_fifos || finfo->rx_id >= num_fifos ||
786 finfo->tx_usr >= num_users || finfo->rx_usr >= num_users)
787 return -EINVAL;
788 }
789
790 mdev = devm_kzalloc(&pdev->dev, sizeof(*mdev), GFP_KERNEL);
791 if (!mdev)
792 return -ENOMEM;
793
794 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
795 mdev->mbox_base = devm_ioremap_resource(&pdev->dev, mem);
796 if (IS_ERR(mdev->mbox_base))
797 return PTR_ERR(mdev->mbox_base);
798
799 /* allocate one extra for marking end of list */
800 list = devm_kzalloc(&pdev->dev, (info_count + 1) * sizeof(*list),
801 GFP_KERNEL);
802 if (!list)
803 return -ENOMEM;
804
805 chnls = devm_kzalloc(&pdev->dev, (info_count + 1) * sizeof(*chnls),
806 GFP_KERNEL);
807 if (!chnls)
808 return -ENOMEM;
809
810 mboxblk = devm_kzalloc(&pdev->dev, info_count * sizeof(*mbox),
811 GFP_KERNEL);
812 if (!mboxblk)
813 return -ENOMEM;
814
815 mbox = mboxblk;
816 finfo = finfoblk;
817 for (i = 0; i < info_count; i++, finfo++) {
818 fifo = &mbox->tx_fifo;
819 fifo->msg = MAILBOX_MESSAGE(finfo->tx_id);
820 fifo->fifo_stat = MAILBOX_FIFOSTATUS(finfo->tx_id);
821 fifo->intr_bit = MAILBOX_IRQ_NOTFULL(finfo->tx_id);
822 fifo->irqenable = MAILBOX_IRQENABLE(intr_type, finfo->tx_usr);
823 fifo->irqstatus = MAILBOX_IRQSTATUS(intr_type, finfo->tx_usr);
824 fifo->irqdisable = MAILBOX_IRQDISABLE(intr_type, finfo->tx_usr);
825
826 fifo = &mbox->rx_fifo;
827 fifo->msg = MAILBOX_MESSAGE(finfo->rx_id);
828 fifo->msg_stat = MAILBOX_MSGSTATUS(finfo->rx_id);
829 fifo->intr_bit = MAILBOX_IRQ_NEWMSG(finfo->rx_id);
830 fifo->irqenable = MAILBOX_IRQENABLE(intr_type, finfo->rx_usr);
831 fifo->irqstatus = MAILBOX_IRQSTATUS(intr_type, finfo->rx_usr);
832 fifo->irqdisable = MAILBOX_IRQDISABLE(intr_type, finfo->rx_usr);
833
834 mbox->send_no_irq = finfo->send_no_irq;
835 mbox->intr_type = intr_type;
836
837 mbox->parent = mdev;
838 mbox->name = finfo->name;
839 mbox->irq = platform_get_irq(pdev, finfo->tx_irq);
840 if (mbox->irq < 0)
841 return mbox->irq;
842 mbox->chan = &chnls[i];
843 chnls[i].con_priv = mbox;
844 list[i] = mbox++;
845 }
846
847 mutex_init(&mdev->cfg_lock);
848 mdev->dev = &pdev->dev;
849 mdev->num_users = num_users;
850 mdev->num_fifos = num_fifos;
851 mdev->mboxes = list;
852
853 /* OMAP does not have a Tx-Done IRQ, but rather a Tx-Ready IRQ */
854 mdev->controller.txdone_irq = true;
855 mdev->controller.dev = mdev->dev;
856 mdev->controller.ops = &omap_mbox_chan_ops;
857 mdev->controller.chans = chnls;
858 mdev->controller.num_chans = info_count;
859 mdev->controller.of_xlate = omap_mbox_of_xlate;
860 ret = omap_mbox_register(mdev);
861 if (ret)
862 return ret;
863
864 platform_set_drvdata(pdev, mdev);
865 pm_runtime_enable(mdev->dev);
866
867 ret = pm_runtime_get_sync(mdev->dev);
868 if (ret < 0) {
869 pm_runtime_put_noidle(mdev->dev);
870 goto unregister;
871 }
872
873 /*
874 * just print the raw revision register, the format is not
875 * uniform across all SoCs
876 */
877 l = mbox_read_reg(mdev, MAILBOX_REVISION);
878 dev_info(mdev->dev, "omap mailbox rev 0x%x\n", l);
879
880 ret = pm_runtime_put_sync(mdev->dev);
881 if (ret < 0)
882 goto unregister;
883
884 devm_kfree(&pdev->dev, finfoblk);
885 return 0;
886
887 unregister:
888 pm_runtime_disable(mdev->dev);
889 omap_mbox_unregister(mdev);
890 return ret;
891 }
892
893 static int omap_mbox_remove(struct platform_device *pdev)
894 {
895 struct omap_mbox_device *mdev = platform_get_drvdata(pdev);
896
897 pm_runtime_disable(mdev->dev);
898 omap_mbox_unregister(mdev);
899
900 return 0;
901 }
902
903 static struct platform_driver omap_mbox_driver = {
904 .probe = omap_mbox_probe,
905 .remove = omap_mbox_remove,
906 .driver = {
907 .name = "omap-mailbox",
908 .of_match_table = of_match_ptr(omap_mailbox_of_match),
909 },
910 };
911
912 static int __init omap_mbox_init(void)
913 {
914 int err;
915
916 err = class_register(&omap_mbox_class);
917 if (err)
918 return err;
919
920 /* kfifo size sanity check: alignment and minimal size */
921 mbox_kfifo_size = ALIGN(mbox_kfifo_size, sizeof(mbox_msg_t));
922 mbox_kfifo_size = max_t(unsigned int, mbox_kfifo_size,
923 sizeof(mbox_msg_t));
924
925 return platform_driver_register(&omap_mbox_driver);
926 }
927 subsys_initcall(omap_mbox_init);
928
929 static void __exit omap_mbox_exit(void)
930 {
931 platform_driver_unregister(&omap_mbox_driver);
932 class_unregister(&omap_mbox_class);
933 }
934 module_exit(omap_mbox_exit);
935
936 MODULE_LICENSE("GPL v2");
937 MODULE_DESCRIPTION("omap mailbox: interrupt driven messaging");
938 MODULE_AUTHOR("Toshihiro Kobayashi");
939 MODULE_AUTHOR("Hiroshi DOYU");
Linux with added FPC-III support