2 Driver for Silicon Labs Si2161 DVB-T and Si2165 DVB-C/-T Demodulator
4 Copyright (C) 2013-2014 Matthias Schwarzott <zzam@gentoo.org>
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
17 http://www.silabs.com/Support%20Documents/TechnicalDocs/Si2165-short.pdf
20 #include <linux/delay.h>
21 #include <linux/errno.h>
22 #include <linux/init.h>
23 #include <linux/kernel.h>
24 #include <linux/module.h>
25 #include <linux/string.h>
26 #include <linux/slab.h>
27 #include <linux/firmware.h>
29 #include "dvb_frontend.h"
31 #include "si2165_priv.h"
34 /* Hauppauge WinTV-HVR-930C-HD B130 / PCTV QuatroStick 521e 1113xx
37 /* Hauppauge WinTV-HVR-930C-HD B131 / PCTV QuatroStick 522e 1114xx
38 * uses 24 MHz clock provided by tuner */
41 struct i2c_adapter
*i2c
;
43 struct dvb_frontend frontend
;
45 struct si2165_config config
;
50 /* calculated by xtal and div settings */
60 #define DEBUG_OTHER 0x01
61 #define DEBUG_I2C_WRITE 0x02
62 #define DEBUG_I2C_READ 0x04
63 #define DEBUG_REG_READ 0x08
64 #define DEBUG_REG_WRITE 0x10
65 #define DEBUG_FW_LOAD 0x20
67 static int debug
= 0x00;
69 #define dprintk(args...) \
71 if (debug & DEBUG_OTHER) \
72 printk(KERN_DEBUG "si2165: " args); \
75 #define deb_i2c_write(args...) \
77 if (debug & DEBUG_I2C_WRITE) \
78 printk(KERN_DEBUG "si2165: i2c write: " args); \
81 #define deb_i2c_read(args...) \
83 if (debug & DEBUG_I2C_READ) \
84 printk(KERN_DEBUG "si2165: i2c read: " args); \
87 #define deb_readreg(args...) \
89 if (debug & DEBUG_REG_READ) \
90 printk(KERN_DEBUG "si2165: reg read: " args); \
93 #define deb_writereg(args...) \
95 if (debug & DEBUG_REG_WRITE) \
96 printk(KERN_DEBUG "si2165: reg write: " args); \
99 #define deb_fw_load(args...) \
101 if (debug & DEBUG_FW_LOAD) \
102 printk(KERN_DEBUG "si2165: fw load: " args); \
105 static int si2165_write(struct si2165_state
*state
, const u16 reg
,
106 const u8
*src
, const int count
)
110 u8 buf
[2 + 4]; /* write a maximum of 4 bytes of data */
112 if (count
+ 2 > sizeof(buf
)) {
113 dev_warn(&state
->i2c
->dev
,
114 "%s: i2c wr reg=%04x: count=%d is too big!\n",
115 KBUILD_MODNAME
, reg
, count
);
120 memcpy(buf
+ 2, src
, count
);
122 msg
.addr
= state
->config
.i2c_addr
;
127 if (debug
& DEBUG_I2C_WRITE
)
128 deb_i2c_write("reg: 0x%04x, data: %*ph\n", reg
, count
, src
);
130 ret
= i2c_transfer(state
->i2c
, &msg
, 1);
133 dev_err(&state
->i2c
->dev
, "%s: ret == %d\n", __func__
, ret
);
143 static int si2165_read(struct si2165_state
*state
,
144 const u16 reg
, u8
*val
, const int count
)
147 u8 reg_buf
[] = { reg
>> 8, reg
& 0xff };
148 struct i2c_msg msg
[] = {
149 { .addr
= state
->config
.i2c_addr
,
150 .flags
= 0, .buf
= reg_buf
, .len
= 2 },
151 { .addr
= state
->config
.i2c_addr
,
152 .flags
= I2C_M_RD
, .buf
= val
, .len
= count
},
155 ret
= i2c_transfer(state
->i2c
, msg
, 2);
158 dev_err(&state
->i2c
->dev
, "%s: error (addr %02x reg %04x error (ret == %i)\n",
159 __func__
, state
->config
.i2c_addr
, reg
, ret
);
166 if (debug
& DEBUG_I2C_READ
)
167 deb_i2c_read("reg: 0x%04x, data: %*ph\n", reg
, count
, val
);
172 static int si2165_readreg8(struct si2165_state
*state
,
173 const u16 reg
, u8
*val
)
177 ret
= si2165_read(state
, reg
, val
, 1);
178 deb_readreg("R(0x%04x)=0x%02x\n", reg
, *val
);
182 static int si2165_readreg16(struct si2165_state
*state
,
183 const u16 reg
, u16
*val
)
187 int ret
= si2165_read(state
, reg
, buf
, 2);
188 *val
= buf
[0] | buf
[1] << 8;
189 deb_readreg("R(0x%04x)=0x%04x\n", reg
, *val
);
193 static int si2165_writereg8(struct si2165_state
*state
, const u16 reg
, u8 val
)
195 return si2165_write(state
, reg
, &val
, 1);
198 static int si2165_writereg16(struct si2165_state
*state
, const u16 reg
, u16 val
)
200 u8 buf
[2] = { val
& 0xff, (val
>> 8) & 0xff };
202 return si2165_write(state
, reg
, buf
, 2);
205 static int si2165_writereg24(struct si2165_state
*state
, const u16 reg
, u32 val
)
207 u8 buf
[3] = { val
& 0xff, (val
>> 8) & 0xff, (val
>> 16) & 0xff };
209 return si2165_write(state
, reg
, buf
, 3);
212 static int si2165_writereg32(struct si2165_state
*state
, const u16 reg
, u32 val
)
220 return si2165_write(state
, reg
, buf
, 4);
223 static int si2165_writereg_mask8(struct si2165_state
*state
, const u16 reg
,
230 ret
= si2165_readreg8(state
, reg
, &tmp
);
239 ret
= si2165_writereg8(state
, reg
, val
);
244 static int si2165_get_tune_settings(struct dvb_frontend
*fe
,
245 struct dvb_frontend_tune_settings
*s
)
247 s
->min_delay_ms
= 1000;
251 static int si2165_init_pll(struct si2165_state
*state
)
253 u32 ref_freq_Hz
= state
->config
.ref_freq_Hz
;
254 u8 divr
= 1; /* 1..7 */
255 u8 divp
= 1; /* only 1 or 4 */
256 u8 divn
= 56; /* 1..63 */
261 /* hardcoded values can be deleted if calculation is verified
262 * or it yields the same values as the windows driver */
263 switch (ref_freq_Hz
) {
273 /* ref_freq / divr must be between 4 and 16 MHz */
274 if (ref_freq_Hz
> 16000000u)
277 /* now select divn and divp such that
278 * fvco is in 1624..1824 MHz */
279 if (1624000000u * divr
> ref_freq_Hz
* 2u * 63u)
282 /* is this already correct regarding rounding? */
283 divn
= 1624000000u * divr
/ (ref_freq_Hz
* 2u * divp
);
287 /* adc_clk and sys_clk depend on xtal and pll settings */
288 state
->fvco_hz
= ref_freq_Hz
/ divr
290 state
->adc_clk
= state
->fvco_hz
/ (divm
* 4u);
291 state
->sys_clk
= state
->fvco_hz
/ (divl
* 2u);
293 /* write pll registers 0x00a0..0x00a3 at once */
296 buf
[2] = (divn
& 0x3f) | ((divp
== 1) ? 0x40 : 0x00) | 0x80;
298 return si2165_write(state
, 0x00a0, buf
, 4);
301 static int si2165_adjust_pll_divl(struct si2165_state
*state
, u8 divl
)
303 state
->sys_clk
= state
->fvco_hz
/ (divl
* 2u);
304 return si2165_writereg8(state
, 0x00a0, divl
); /* pll_divl */
307 static u32
si2165_get_fe_clk(struct si2165_state
*state
)
309 /* assume Oversampling mode Ovr4 is used */
310 return state
->adc_clk
;
313 static int si2165_wait_init_done(struct si2165_state
*state
)
319 for (i
= 0; i
< 3; ++i
) {
320 si2165_readreg8(state
, 0x0054, &val
);
323 usleep_range(1000, 50000);
325 dev_err(&state
->i2c
->dev
, "%s: init_done was not set\n",
330 static int si2165_upload_firmware_block(struct si2165_state
*state
,
331 const u8
*data
, u32 len
, u32
*poffset
, u32 block_count
)
334 u8 buf_ctrl
[4] = { 0x00, 0x00, 0x00, 0xc0 };
337 u32 offset
= poffset
? *poffset
: 0;
344 deb_fw_load("si2165_upload_firmware_block called with len=0x%x offset=0x%x blockcount=0x%x\n",
345 len
, offset
, block_count
);
346 while (offset
+12 <= len
&& cur_block
< block_count
) {
347 deb_fw_load("si2165_upload_firmware_block in while len=0x%x offset=0x%x cur_block=0x%x blockcount=0x%x\n",
348 len
, offset
, cur_block
, block_count
);
349 wordcount
= data
[offset
];
350 if (wordcount
< 1 || data
[offset
+1] ||
351 data
[offset
+2] || data
[offset
+3]) {
352 dev_warn(&state
->i2c
->dev
,
353 "%s: bad fw data[0..3] = %*ph\n",
354 KBUILD_MODNAME
, 4, data
);
358 if (offset
+ 8 + wordcount
* 4 > len
) {
359 dev_warn(&state
->i2c
->dev
,
360 "%s: len is too small for block len=%d, wordcount=%d\n",
361 KBUILD_MODNAME
, len
, wordcount
);
365 buf_ctrl
[0] = wordcount
- 1;
367 ret
= si2165_write(state
, 0x0364, buf_ctrl
, 4);
370 ret
= si2165_write(state
, 0x0368, data
+offset
+4, 4);
376 while (wordcount
> 0) {
377 ret
= si2165_write(state
, 0x36c, data
+offset
, 4);
386 deb_fw_load("si2165_upload_firmware_block after while len=0x%x offset=0x%x cur_block=0x%x blockcount=0x%x\n",
387 len
, offset
, cur_block
, block_count
);
392 deb_fw_load("si2165_upload_firmware_block returned offset=0x%x\n",
400 static int si2165_upload_firmware(struct si2165_state
*state
)
407 const struct firmware
*fw
= NULL
;
416 switch (state
->chip_revcode
) {
417 case 0x03: /* revision D */
418 fw_file
= SI2165_FIRMWARE_REV_D
;
421 dev_info(&state
->i2c
->dev
, "%s: no firmware file for revision=%d\n",
422 KBUILD_MODNAME
, state
->chip_revcode
);
426 /* request the firmware, this will block and timeout */
427 ret
= request_firmware(&fw
, fw_file
, state
->i2c
->dev
.parent
);
429 dev_warn(&state
->i2c
->dev
, "%s: firmware file '%s' not found\n",
430 KBUILD_MODNAME
, fw_file
);
437 dev_info(&state
->i2c
->dev
, "%s: downloading firmware from file '%s' size=%d\n",
438 KBUILD_MODNAME
, fw_file
, len
);
441 dev_warn(&state
->i2c
->dev
, "%s: firmware size is not multiple of 4\n",
447 /* check header (8 bytes) */
449 dev_warn(&state
->i2c
->dev
, "%s: firmware header is missing\n",
455 if (data
[0] != 1 || data
[1] != 0) {
456 dev_warn(&state
->i2c
->dev
, "%s: firmware file version is wrong\n",
462 patch_version
= data
[2];
463 block_count
= data
[4];
464 crc_expected
= data
[7] << 8 | data
[6];
466 /* start uploading fw */
467 /* boot/wdog status */
468 ret
= si2165_writereg8(state
, 0x0341, 0x00);
472 ret
= si2165_writereg8(state
, 0x00c0, 0x00);
475 /* boot/wdog status */
476 ret
= si2165_readreg8(state
, 0x0341, val
);
480 /* enable reset on error */
481 ret
= si2165_readreg8(state
, 0x035c, val
);
484 ret
= si2165_readreg8(state
, 0x035c, val
);
487 ret
= si2165_writereg8(state
, 0x035c, 0x02);
491 /* start right after the header */
494 dev_info(&state
->i2c
->dev
, "%s: si2165_upload_firmware extracted patch_version=0x%02x, block_count=0x%02x, crc_expected=0x%04x\n",
495 KBUILD_MODNAME
, patch_version
, block_count
, crc_expected
);
497 ret
= si2165_upload_firmware_block(state
, data
, len
, &offset
, 1);
501 ret
= si2165_writereg8(state
, 0x0344, patch_version
);
506 ret
= si2165_writereg8(state
, 0x0379, 0x01);
510 ret
= si2165_upload_firmware_block(state
, data
, len
,
511 &offset
, block_count
);
513 dev_err(&state
->i2c
->dev
,
514 "%s: firmare could not be uploaded\n",
520 ret
= si2165_readreg16(state
, 0x037a, &val16
);
524 if (val16
!= crc_expected
) {
525 dev_err(&state
->i2c
->dev
,
526 "%s: firmware crc mismatch %04x != %04x\n",
527 KBUILD_MODNAME
, val16
, crc_expected
);
532 ret
= si2165_upload_firmware_block(state
, data
, len
, &offset
, 5);
537 dev_err(&state
->i2c
->dev
,
538 "%s: firmare len mismatch %04x != %04x\n",
539 KBUILD_MODNAME
, len
, offset
);
544 /* reset watchdog error register */
545 ret
= si2165_writereg_mask8(state
, 0x0341, 0x02, 0x02);
549 /* enable reset on error */
550 ret
= si2165_writereg_mask8(state
, 0x035c, 0x01, 0x01);
554 dev_info(&state
->i2c
->dev
, "%s: fw load finished\n", KBUILD_MODNAME
);
557 state
->firmware_loaded
= true;
560 release_firmware(fw
);
567 static int si2165_init(struct dvb_frontend
*fe
)
570 struct si2165_state
*state
= fe
->demodulator_priv
;
572 u8 patch_version
= 0x00;
574 dprintk("%s: called\n", __func__
);
577 ret
= si2165_writereg8(state
, 0x0000, state
->config
.chip_mode
);
580 /* dsp_clock_enable */
581 ret
= si2165_writereg8(state
, 0x0104, 0x01);
584 ret
= si2165_readreg8(state
, 0x0000, &val
); /* verify chip_mode */
587 if (val
!= state
->config
.chip_mode
) {
588 dev_err(&state
->i2c
->dev
, "%s: could not set chip_mode\n",
594 ret
= si2165_writereg8(state
, 0x018b, 0x00);
597 ret
= si2165_writereg8(state
, 0x0190, 0x01);
600 ret
= si2165_writereg8(state
, 0x0170, 0x00);
603 ret
= si2165_writereg8(state
, 0x0171, 0x07);
607 ret
= si2165_writereg8(state
, 0x0646, 0x00);
610 ret
= si2165_writereg8(state
, 0x0641, 0x00);
614 ret
= si2165_init_pll(state
);
618 /* enable chip_init */
619 ret
= si2165_writereg8(state
, 0x0050, 0x01);
623 ret
= si2165_writereg8(state
, 0x0096, 0x01);
626 ret
= si2165_wait_init_done(state
);
630 /* disable chip_init */
631 ret
= si2165_writereg8(state
, 0x0050, 0x00);
636 ret
= si2165_writereg16(state
, 0x0470 , 0x7530);
640 ret
= si2165_readreg8(state
, 0x0344, &patch_version
);
644 ret
= si2165_writereg8(state
, 0x00cb, 0x00);
649 ret
= si2165_writereg32(state
, 0x0348, 0xf4000000);
652 /* boot/wdog status */
653 ret
= si2165_readreg8(state
, 0x0341, &val
);
657 if (patch_version
== 0x00) {
658 ret
= si2165_upload_firmware(state
);
663 /* write adc values after each reset*/
664 ret
= si2165_writereg8(state
, 0x012a, 0x46);
667 ret
= si2165_writereg8(state
, 0x012c, 0x00);
670 ret
= si2165_writereg8(state
, 0x012e, 0x0a);
673 ret
= si2165_writereg8(state
, 0x012f, 0xff);
676 ret
= si2165_writereg8(state
, 0x0123, 0x70);
685 static int si2165_sleep(struct dvb_frontend
*fe
)
688 struct si2165_state
*state
= fe
->demodulator_priv
;
690 /* dsp clock disable */
691 ret
= si2165_writereg8(state
, 0x0104, 0x00);
695 ret
= si2165_writereg8(state
, 0x0000, SI2165_MODE_OFF
);
701 static int si2165_read_status(struct dvb_frontend
*fe
, enum fe_status
*status
)
705 struct si2165_state
*state
= fe
->demodulator_priv
;
707 if (!state
->has_dvbt
)
711 ret
= si2165_readreg8(state
, 0x4e0, &fec_lock
);
715 if (fec_lock
& 0x01) {
716 *status
|= FE_HAS_SIGNAL
;
717 *status
|= FE_HAS_CARRIER
;
718 *status
|= FE_HAS_VITERBI
;
719 *status
|= FE_HAS_SYNC
;
720 *status
|= FE_HAS_LOCK
;
726 static int si2165_set_oversamp(struct si2165_state
*state
, u32 dvb_rate
)
731 oversamp
= si2165_get_fe_clk(state
);
733 do_div(oversamp
, dvb_rate
);
734 reg_value
= oversamp
& 0x3fffffff;
736 /* oversamp, usbdump contained 0x03100000; */
737 return si2165_writereg32(state
, 0x00e4, reg_value
);
740 static int si2165_set_if_freq_shift(struct si2165_state
*state
, u32 IF
)
744 u32 fe_clk
= si2165_get_fe_clk(state
);
747 if_freq_shift
<<= 29;
749 do_div(if_freq_shift
, fe_clk
);
750 reg_value
= (s32
)if_freq_shift
;
752 if (state
->config
.inversion
)
753 reg_value
= -reg_value
;
755 reg_value
= reg_value
& 0x1fffffff;
757 /* if_freq_shift, usbdump contained 0x023ee08f; */
758 return si2165_writereg32(state
, 0x00e8, reg_value
);
761 static int si2165_set_parameters(struct dvb_frontend
*fe
)
764 struct dtv_frontend_properties
*p
= &fe
->dtv_property_cache
;
765 struct si2165_state
*state
= fe
->demodulator_priv
;
771 dprintk("%s: called\n", __func__
);
773 if (!fe
->ops
.tuner_ops
.get_if_frequency
) {
774 dev_err(&state
->i2c
->dev
,
775 "%s: Error: get_if_frequency() not defined at tuner. Can't work without it!\n",
780 if (!state
->has_dvbt
)
783 if (p
->bandwidth_hz
> 0) {
784 dvb_rate
= p
->bandwidth_hz
* 8 / 7;
785 bw10k
= p
->bandwidth_hz
/ 10000;
787 dvb_rate
= 8 * 8 / 7;
791 /* standard = DVB-T */
792 ret
= si2165_writereg8(state
, 0x00ec, 0x01);
795 ret
= si2165_adjust_pll_divl(state
, 12);
799 fe
->ops
.tuner_ops
.get_if_frequency(fe
, &IF
);
800 ret
= si2165_set_if_freq_shift(state
, IF
);
803 ret
= si2165_writereg8(state
, 0x08f8, 0x00);
806 /* ts output config */
807 ret
= si2165_writereg8(state
, 0x04e4, 0x20);
810 ret
= si2165_writereg16(state
, 0x04ef, 0x00fe);
813 ret
= si2165_writereg24(state
, 0x04f4, 0x555555);
816 ret
= si2165_writereg8(state
, 0x04e5, 0x01);
819 /* bandwidth in 10KHz steps */
820 ret
= si2165_writereg16(state
, 0x0308, bw10k
);
823 ret
= si2165_set_oversamp(state
, dvb_rate
);
826 /* impulsive_noise_remover */
827 ret
= si2165_writereg8(state
, 0x031c, 0x01);
830 ret
= si2165_writereg8(state
, 0x00cb, 0x00);
834 ret
= si2165_writereg8(state
, 0x016e, 0x41);
837 ret
= si2165_writereg8(state
, 0x016c, 0x0e);
840 ret
= si2165_writereg8(state
, 0x016d, 0x10);
844 ret
= si2165_writereg8(state
, 0x015b, 0x03);
847 ret
= si2165_writereg8(state
, 0x0150, 0x78);
851 ret
= si2165_writereg8(state
, 0x01a0, 0x78);
854 ret
= si2165_writereg8(state
, 0x01c8, 0x68);
857 /* freq_sync_range */
858 ret
= si2165_writereg16(state
, 0x030c, 0x0064);
862 ret
= si2165_readreg8(state
, 0x0387, val
);
865 ret
= si2165_writereg8(state
, 0x0387, 0x00);
869 ret
= si2165_writereg32(state
, 0x0348, 0xf4000000);
873 if (fe
->ops
.tuner_ops
.set_params
)
874 fe
->ops
.tuner_ops
.set_params(fe
);
876 /* recalc if_freq_shift if IF might has changed */
877 fe
->ops
.tuner_ops
.get_if_frequency(fe
, &IF
);
878 ret
= si2165_set_if_freq_shift(state
, IF
);
882 /* boot/wdog status */
883 ret
= si2165_readreg8(state
, 0x0341, val
);
886 ret
= si2165_writereg8(state
, 0x0341, 0x00);
890 ret
= si2165_writereg8(state
, 0x00c0, 0x00);
894 ret
= si2165_writereg32(state
, 0x0384, 0x00000000);
898 ret
= si2165_writereg8(state
, 0x02e0, 0x01);
901 /* boot/wdog status */
902 ret
= si2165_readreg8(state
, 0x0341, val
);
909 static void si2165_release(struct dvb_frontend
*fe
)
911 struct si2165_state
*state
= fe
->demodulator_priv
;
913 dprintk("%s: called\n", __func__
);
917 static struct dvb_frontend_ops si2165_ops
= {
919 .name
= "Silicon Labs ",
920 .caps
= FE_CAN_FEC_1_2
|
933 FE_CAN_TRANSMISSION_MODE_AUTO
|
934 FE_CAN_GUARD_INTERVAL_AUTO
|
935 FE_CAN_HIERARCHY_AUTO
|
937 FE_CAN_TRANSMISSION_MODE_AUTO
|
941 .get_tune_settings
= si2165_get_tune_settings
,
944 .sleep
= si2165_sleep
,
946 .set_frontend
= si2165_set_parameters
,
947 .read_status
= si2165_read_status
,
949 .release
= si2165_release
,
952 struct dvb_frontend
*si2165_attach(const struct si2165_config
*config
,
953 struct i2c_adapter
*i2c
)
955 struct si2165_state
*state
= NULL
;
960 const char *chip_name
;
962 if (config
== NULL
|| i2c
== NULL
)
965 /* allocate memory for the internal state */
966 state
= kzalloc(sizeof(struct si2165_state
), GFP_KERNEL
);
970 /* setup the state */
972 state
->config
= *config
;
974 if (state
->config
.ref_freq_Hz
< 4000000
975 || state
->config
.ref_freq_Hz
> 27000000) {
976 dev_err(&state
->i2c
->dev
, "%s: ref_freq of %d Hz not supported by this driver\n",
977 KBUILD_MODNAME
, state
->config
.ref_freq_Hz
);
981 /* create dvb_frontend */
982 memcpy(&state
->frontend
.ops
, &si2165_ops
,
983 sizeof(struct dvb_frontend_ops
));
984 state
->frontend
.demodulator_priv
= state
;
987 io_ret
= si2165_writereg8(state
, 0x0000, state
->config
.chip_mode
);
991 io_ret
= si2165_readreg8(state
, 0x0000, &val
);
994 if (val
!= state
->config
.chip_mode
)
997 io_ret
= si2165_readreg8(state
, 0x0023, &state
->chip_revcode
);
1001 io_ret
= si2165_readreg8(state
, 0x0118, &state
->chip_type
);
1006 io_ret
= si2165_writereg8(state
, 0x0000, SI2165_MODE_OFF
);
1010 if (state
->chip_revcode
< 26)
1011 rev_char
= 'A' + state
->chip_revcode
;
1015 switch (state
->chip_type
) {
1017 chip_name
= "Si2161";
1018 state
->has_dvbt
= true;
1021 chip_name
= "Si2165";
1022 state
->has_dvbt
= true;
1023 state
->has_dvbc
= true;
1026 dev_err(&state
->i2c
->dev
, "%s: Unsupported Silicon Labs chip (type %d, rev %d)\n",
1027 KBUILD_MODNAME
, state
->chip_type
, state
->chip_revcode
);
1031 dev_info(&state
->i2c
->dev
,
1032 "%s: Detected Silicon Labs %s-%c (type %d, rev %d)\n",
1033 KBUILD_MODNAME
, chip_name
, rev_char
, state
->chip_type
,
1034 state
->chip_revcode
);
1036 strlcat(state
->frontend
.ops
.info
.name
, chip_name
,
1037 sizeof(state
->frontend
.ops
.info
.name
));
1040 if (state
->has_dvbt
) {
1041 state
->frontend
.ops
.delsys
[n
++] = SYS_DVBT
;
1042 strlcat(state
->frontend
.ops
.info
.name
, " DVB-T",
1043 sizeof(state
->frontend
.ops
.info
.name
));
1045 if (state
->has_dvbc
)
1046 dev_warn(&state
->i2c
->dev
, "%s: DVB-C is not yet supported.\n",
1049 return &state
->frontend
;
1055 EXPORT_SYMBOL(si2165_attach
);
1057 module_param(debug
, int, 0644);
1058 MODULE_PARM_DESC(debug
, "Turn on/off frontend debugging (default:off).");
1060 MODULE_DESCRIPTION("Silicon Labs Si2165 DVB-C/-T Demodulator driver");
1061 MODULE_AUTHOR("Matthias Schwarzott <zzam@gentoo.org>");
1062 MODULE_LICENSE("GPL");
1063 MODULE_FIRMWARE(SI2165_FIRMWARE_REV_D
);