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powerpc/powernv: Report size of OPAL memcons log
[linux/fpc-iii.git] / arch / powerpc / platforms / powermac / low_i2c.c
blobf627c9fd7b485284c00f971daaa4f97e6dfc2615
1 /*
2 * arch/powerpc/platforms/powermac/low_i2c.c
3 *
4 * Copyright (C) 2003-2005 Ben. Herrenschmidt (benh@kernel.crashing.org)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 *
11 * The linux i2c layer isn't completely suitable for our needs for various
12 * reasons ranging from too late initialisation to semantics not perfectly
13 * matching some requirements of the apple platform functions etc...
14 *
15 * This file thus provides a simple low level unified i2c interface for
16 * powermac that covers the various types of i2c busses used in Apple machines.
17 * For now, keywest, PMU and SMU, though we could add Cuda, or other bit
18 * banging busses found on older chipsets in earlier machines if we ever need
19 * one of them.
20 *
21 * The drivers in this file are synchronous/blocking. In addition, the
22 * keywest one is fairly slow due to the use of msleep instead of interrupts
23 * as the interrupt is currently used by i2c-keywest. In the long run, we
24 * might want to get rid of those high-level interfaces to linux i2c layer
25 * either completely (converting all drivers) or replacing them all with a
26 * single stub driver on top of this one. Once done, the interrupt will be
27 * available for our use.
28 */
29
30 #undef DEBUG
31 #undef DEBUG_LOW
32
33 #include <linux/types.h>
34 #include <linux/sched.h>
35 #include <linux/init.h>
36 #include <linux/export.h>
37 #include <linux/adb.h>
38 #include <linux/pmu.h>
39 #include <linux/delay.h>
40 #include <linux/completion.h>
41 #include <linux/platform_device.h>
42 #include <linux/interrupt.h>
43 #include <linux/timer.h>
44 #include <linux/mutex.h>
45 #include <linux/i2c.h>
46 #include <linux/slab.h>
47 #include <asm/keylargo.h>
48 #include <asm/uninorth.h>
49 #include <asm/io.h>
50 #include <asm/prom.h>
51 #include <asm/machdep.h>
52 #include <asm/smu.h>
53 #include <asm/pmac_pfunc.h>
54 #include <asm/pmac_low_i2c.h>
55
56 #ifdef DEBUG
57 #define DBG(x...) do {\
58 printk(KERN_DEBUG "low_i2c:" x); \
59 } while(0)
60 #else
61 #define DBG(x...)
62 #endif
63
64 #ifdef DEBUG_LOW
65 #define DBG_LOW(x...) do {\
66 printk(KERN_DEBUG "low_i2c:" x); \
67 } while(0)
68 #else
69 #define DBG_LOW(x...)
70 #endif
71
72
73 static int pmac_i2c_force_poll = 1;
74
75 /*
76 * A bus structure. Each bus in the system has such a structure associated.
77 */
78 struct pmac_i2c_bus
79 {
80 struct list_head link;
81 struct device_node *controller;
82 struct device_node *busnode;
83 int type;
84 int flags;
85 struct i2c_adapter adapter;
86 void *hostdata;
87 int channel; /* some hosts have multiple */
88 int mode; /* current mode */
89 struct mutex mutex;
90 int opened;
91 int polled; /* open mode */
92 struct platform_device *platform_dev;
93 struct lock_class_key lock_key;
94
95 /* ops */
96 int (*open)(struct pmac_i2c_bus *bus);
97 void (*close)(struct pmac_i2c_bus *bus);
98 int (*xfer)(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
99 u32 subaddr, u8 *data, int len);
100 };
101
102 static LIST_HEAD(pmac_i2c_busses);
103
104 /*
105 * Keywest implementation
106 */
107
108 struct pmac_i2c_host_kw
109 {
110 struct mutex mutex; /* Access mutex for use by
111 * i2c-keywest */
112 void __iomem *base; /* register base address */
113 int bsteps; /* register stepping */
114 int speed; /* speed */
115 int irq;
116 u8 *data;
117 unsigned len;
118 int state;
119 int rw;
120 int polled;
121 int result;
122 struct completion complete;
123 spinlock_t lock;
124 struct timer_list timeout_timer;
125 };
126
127 /* Register indices */
128 typedef enum {
129 reg_mode = 0,
130 reg_control,
131 reg_status,
132 reg_isr,
133 reg_ier,
134 reg_addr,
135 reg_subaddr,
136 reg_data
137 } reg_t;
138
139 /* The Tumbler audio equalizer can be really slow sometimes */
140 #define KW_POLL_TIMEOUT (2*HZ)
141
142 /* Mode register */
143 #define KW_I2C_MODE_100KHZ 0x00
144 #define KW_I2C_MODE_50KHZ 0x01
145 #define KW_I2C_MODE_25KHZ 0x02
146 #define KW_I2C_MODE_DUMB 0x00
147 #define KW_I2C_MODE_STANDARD 0x04
148 #define KW_I2C_MODE_STANDARDSUB 0x08
149 #define KW_I2C_MODE_COMBINED 0x0C
150 #define KW_I2C_MODE_MODE_MASK 0x0C
151 #define KW_I2C_MODE_CHAN_MASK 0xF0
152
153 /* Control register */
154 #define KW_I2C_CTL_AAK 0x01
155 #define KW_I2C_CTL_XADDR 0x02
156 #define KW_I2C_CTL_STOP 0x04
157 #define KW_I2C_CTL_START 0x08
158
159 /* Status register */
160 #define KW_I2C_STAT_BUSY 0x01
161 #define KW_I2C_STAT_LAST_AAK 0x02
162 #define KW_I2C_STAT_LAST_RW 0x04
163 #define KW_I2C_STAT_SDA 0x08
164 #define KW_I2C_STAT_SCL 0x10
165
166 /* IER & ISR registers */
167 #define KW_I2C_IRQ_DATA 0x01
168 #define KW_I2C_IRQ_ADDR 0x02
169 #define KW_I2C_IRQ_STOP 0x04
170 #define KW_I2C_IRQ_START 0x08
171 #define KW_I2C_IRQ_MASK 0x0F
172
173 /* State machine states */
174 enum {
175 state_idle,
176 state_addr,
177 state_read,
178 state_write,
179 state_stop,
180 state_dead
181 };
182
183 #define WRONG_STATE(name) do {\
184 printk(KERN_DEBUG "KW: wrong state. Got %s, state: %s " \
185 "(isr: %02x)\n", \
186 name, __kw_state_names[host->state], isr); \
187 } while(0)
188
189 static const char *__kw_state_names[] = {
190 "state_idle",
191 "state_addr",
192 "state_read",
193 "state_write",
194 "state_stop",
195 "state_dead"
196 };
197
198 static inline u8 __kw_read_reg(struct pmac_i2c_host_kw *host, reg_t reg)
199 {
200 return readb(host->base + (((unsigned int)reg) << host->bsteps));
201 }
202
203 static inline void __kw_write_reg(struct pmac_i2c_host_kw *host,
204 reg_t reg, u8 val)
205 {
206 writeb(val, host->base + (((unsigned)reg) << host->bsteps));
207 (void)__kw_read_reg(host, reg_subaddr);
208 }
209
210 #define kw_write_reg(reg, val) __kw_write_reg(host, reg, val)
211 #define kw_read_reg(reg) __kw_read_reg(host, reg)
212
213 static u8 kw_i2c_wait_interrupt(struct pmac_i2c_host_kw *host)
214 {
215 int i, j;
216 u8 isr;
217
218 for (i = 0; i < 1000; i++) {
219 isr = kw_read_reg(reg_isr) & KW_I2C_IRQ_MASK;
220 if (isr != 0)
221 return isr;
222
223 /* This code is used with the timebase frozen, we cannot rely
224 * on udelay nor schedule when in polled mode !
225 * For now, just use a bogus loop....
226 */
227 if (host->polled) {
228 for (j = 1; j < 100000; j++)
229 mb();
230 } else
231 msleep(1);
232 }
233 return isr;
234 }
235
236 static void kw_i2c_do_stop(struct pmac_i2c_host_kw *host, int result)
237 {
238 kw_write_reg(reg_control, KW_I2C_CTL_STOP);
239 host->state = state_stop;
240 host->result = result;
241 }
242
243
244 static void kw_i2c_handle_interrupt(struct pmac_i2c_host_kw *host, u8 isr)
245 {
246 u8 ack;
247
248 DBG_LOW("kw_handle_interrupt(%s, isr: %x)\n",
249 __kw_state_names[host->state], isr);
250
251 if (host->state == state_idle) {
252 printk(KERN_WARNING "low_i2c: Keywest got an out of state"
253 " interrupt, ignoring\n");
254 kw_write_reg(reg_isr, isr);
255 return;
256 }
257
258 if (isr == 0) {
259 printk(KERN_WARNING "low_i2c: Timeout in i2c transfer"
260 " on keywest !\n");
261 if (host->state != state_stop) {
262 kw_i2c_do_stop(host, -EIO);
263 return;
264 }
265 ack = kw_read_reg(reg_status);
266 if (ack & KW_I2C_STAT_BUSY)
267 kw_write_reg(reg_status, 0);
268 host->state = state_idle;
269 kw_write_reg(reg_ier, 0x00);
270 if (!host->polled)
271 complete(&host->complete);
272 return;
273 }
274
275 if (isr & KW_I2C_IRQ_ADDR) {
276 ack = kw_read_reg(reg_status);
277 if (host->state != state_addr) {
278 WRONG_STATE("KW_I2C_IRQ_ADDR");
279 kw_i2c_do_stop(host, -EIO);
280 }
281 if ((ack & KW_I2C_STAT_LAST_AAK) == 0) {
282 host->result = -ENXIO;
283 host->state = state_stop;
284 DBG_LOW("KW: NAK on address\n");
285 } else {
286 if (host->len == 0)
287 kw_i2c_do_stop(host, 0);
288 else if (host->rw) {
289 host->state = state_read;
290 if (host->len > 1)
291 kw_write_reg(reg_control,
292 KW_I2C_CTL_AAK);
293 } else {
294 host->state = state_write;
295 kw_write_reg(reg_data, *(host->data++));
296 host->len--;
297 }
298 }
299 kw_write_reg(reg_isr, KW_I2C_IRQ_ADDR);
300 }
301
302 if (isr & KW_I2C_IRQ_DATA) {
303 if (host->state == state_read) {
304 *(host->data++) = kw_read_reg(reg_data);
305 host->len--;
306 kw_write_reg(reg_isr, KW_I2C_IRQ_DATA);
307 if (host->len == 0)
308 host->state = state_stop;
309 else if (host->len == 1)
310 kw_write_reg(reg_control, 0);
311 } else if (host->state == state_write) {
312 ack = kw_read_reg(reg_status);
313 if ((ack & KW_I2C_STAT_LAST_AAK) == 0) {
314 DBG_LOW("KW: nack on data write\n");
315 host->result = -EFBIG;
316 host->state = state_stop;
317 } else if (host->len) {
318 kw_write_reg(reg_data, *(host->data++));
319 host->len--;
320 } else
321 kw_i2c_do_stop(host, 0);
322 } else {
323 WRONG_STATE("KW_I2C_IRQ_DATA");
324 if (host->state != state_stop)
325 kw_i2c_do_stop(host, -EIO);
326 }
327 kw_write_reg(reg_isr, KW_I2C_IRQ_DATA);
328 }
329
330 if (isr & KW_I2C_IRQ_STOP) {
331 kw_write_reg(reg_isr, KW_I2C_IRQ_STOP);
332 if (host->state != state_stop) {
333 WRONG_STATE("KW_I2C_IRQ_STOP");
334 host->result = -EIO;
335 }
336 host->state = state_idle;
337 if (!host->polled)
338 complete(&host->complete);
339 }
340
341 /* Below should only happen in manual mode which we don't use ... */
342 if (isr & KW_I2C_IRQ_START)
343 kw_write_reg(reg_isr, KW_I2C_IRQ_START);
344
345 }
346
347 /* Interrupt handler */
348 static irqreturn_t kw_i2c_irq(int irq, void *dev_id)
349 {
350 struct pmac_i2c_host_kw *host = dev_id;
351 unsigned long flags;
352
353 spin_lock_irqsave(&host->lock, flags);
354 del_timer(&host->timeout_timer);
355 kw_i2c_handle_interrupt(host, kw_read_reg(reg_isr));
356 if (host->state != state_idle) {
357 host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT;
358 add_timer(&host->timeout_timer);
359 }
360 spin_unlock_irqrestore(&host->lock, flags);
361 return IRQ_HANDLED;
362 }
363
364 static void kw_i2c_timeout(unsigned long data)
365 {
366 struct pmac_i2c_host_kw *host = (struct pmac_i2c_host_kw *)data;
367 unsigned long flags;
368
369 spin_lock_irqsave(&host->lock, flags);
370
371 /*
372 * If the timer is pending, that means we raced with the
373 * irq, in which case we just return
374 */
375 if (timer_pending(&host->timeout_timer))
376 goto skip;
377
378 kw_i2c_handle_interrupt(host, kw_read_reg(reg_isr));
379 if (host->state != state_idle) {
380 host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT;
381 add_timer(&host->timeout_timer);
382 }
383 skip:
384 spin_unlock_irqrestore(&host->lock, flags);
385 }
386
387 static int kw_i2c_open(struct pmac_i2c_bus *bus)
388 {
389 struct pmac_i2c_host_kw *host = bus->hostdata;
390 mutex_lock(&host->mutex);
391 return 0;
392 }
393
394 static void kw_i2c_close(struct pmac_i2c_bus *bus)
395 {
396 struct pmac_i2c_host_kw *host = bus->hostdata;
397 mutex_unlock(&host->mutex);
398 }
399
400 static int kw_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
401 u32 subaddr, u8 *data, int len)
402 {
403 struct pmac_i2c_host_kw *host = bus->hostdata;
404 u8 mode_reg = host->speed;
405 int use_irq = host->irq && !bus->polled;
406
407 /* Setup mode & subaddress if any */
408 switch(bus->mode) {
409 case pmac_i2c_mode_dumb:
410 return -EINVAL;
411 case pmac_i2c_mode_std:
412 mode_reg |= KW_I2C_MODE_STANDARD;
413 if (subsize != 0)
414 return -EINVAL;
415 break;
416 case pmac_i2c_mode_stdsub:
417 mode_reg |= KW_I2C_MODE_STANDARDSUB;
418 if (subsize != 1)
419 return -EINVAL;
420 break;
421 case pmac_i2c_mode_combined:
422 mode_reg |= KW_I2C_MODE_COMBINED;
423 if (subsize != 1)
424 return -EINVAL;
425 break;
426 }
427
428 /* Setup channel & clear pending irqs */
429 kw_write_reg(reg_isr, kw_read_reg(reg_isr));
430 kw_write_reg(reg_mode, mode_reg | (bus->channel << 4));
431 kw_write_reg(reg_status, 0);
432
433 /* Set up address and r/w bit, strip possible stale bus number from
434 * address top bits
435 */
436 kw_write_reg(reg_addr, addrdir & 0xff);
437
438 /* Set up the sub address */
439 if ((mode_reg & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_STANDARDSUB
440 || (mode_reg & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_COMBINED)
441 kw_write_reg(reg_subaddr, subaddr);
442
443 /* Prepare for async operations */
444 host->data = data;
445 host->len = len;
446 host->state = state_addr;
447 host->result = 0;
448 host->rw = (addrdir & 1);
449 host->polled = bus->polled;
450
451 /* Enable interrupt if not using polled mode and interrupt is
452 * available
453 */
454 if (use_irq) {
455 /* Clear completion */
456 reinit_completion(&host->complete);
457 /* Ack stale interrupts */
458 kw_write_reg(reg_isr, kw_read_reg(reg_isr));
459 /* Arm timeout */
460 host->timeout_timer.expires = jiffies + KW_POLL_TIMEOUT;
461 add_timer(&host->timeout_timer);
462 /* Enable emission */
463 kw_write_reg(reg_ier, KW_I2C_IRQ_MASK);
464 }
465
466 /* Start sending address */
467 kw_write_reg(reg_control, KW_I2C_CTL_XADDR);
468
469 /* Wait for completion */
470 if (use_irq)
471 wait_for_completion(&host->complete);
472 else {
473 while(host->state != state_idle) {
474 unsigned long flags;
475
476 u8 isr = kw_i2c_wait_interrupt(host);
477 spin_lock_irqsave(&host->lock, flags);
478 kw_i2c_handle_interrupt(host, isr);
479 spin_unlock_irqrestore(&host->lock, flags);
480 }
481 }
482
483 /* Disable emission */
484 kw_write_reg(reg_ier, 0);
485
486 return host->result;
487 }
488
489 static struct pmac_i2c_host_kw *__init kw_i2c_host_init(struct device_node *np)
490 {
491 struct pmac_i2c_host_kw *host;
492 const u32 *psteps, *prate, *addrp;
493 u32 steps;
494
495 host = kzalloc(sizeof(struct pmac_i2c_host_kw), GFP_KERNEL);
496 if (host == NULL) {
497 printk(KERN_ERR "low_i2c: Can't allocate host for %s\n",
498 np->full_name);
499 return NULL;
500 }
501
502 /* Apple is kind enough to provide a valid AAPL,address property
503 * on all i2c keywest nodes so far ... we would have to fallback
504 * to macio parsing if that wasn't the case
505 */
506 addrp = of_get_property(np, "AAPL,address", NULL);
507 if (addrp == NULL) {
508 printk(KERN_ERR "low_i2c: Can't find address for %s\n",
509 np->full_name);
510 kfree(host);
511 return NULL;
512 }
513 mutex_init(&host->mutex);
514 init_completion(&host->complete);
515 spin_lock_init(&host->lock);
516 init_timer(&host->timeout_timer);
517 host->timeout_timer.function = kw_i2c_timeout;
518 host->timeout_timer.data = (unsigned long)host;
519
520 psteps = of_get_property(np, "AAPL,address-step", NULL);
521 steps = psteps ? (*psteps) : 0x10;
522 for (host->bsteps = 0; (steps & 0x01) == 0; host->bsteps++)
523 steps >>= 1;
524 /* Select interface rate */
525 host->speed = KW_I2C_MODE_25KHZ;
526 prate = of_get_property(np, "AAPL,i2c-rate", NULL);
527 if (prate) switch(*prate) {
528 case 100:
529 host->speed = KW_I2C_MODE_100KHZ;
530 break;
531 case 50:
532 host->speed = KW_I2C_MODE_50KHZ;
533 break;
534 case 25:
535 host->speed = KW_I2C_MODE_25KHZ;
536 break;
537 }
538 host->irq = irq_of_parse_and_map(np, 0);
539 if (!host->irq)
540 printk(KERN_WARNING
541 "low_i2c: Failed to map interrupt for %s\n",
542 np->full_name);
543
544 host->base = ioremap((*addrp), 0x1000);
545 if (host->base == NULL) {
546 printk(KERN_ERR "low_i2c: Can't map registers for %s\n",
547 np->full_name);
548 kfree(host);
549 return NULL;
550 }
551
552 /* Make sure IRQ is disabled */
553 kw_write_reg(reg_ier, 0);
554
555 /* Request chip interrupt. We set IRQF_NO_SUSPEND because we don't
556 * want that interrupt disabled between the 2 passes of driver
557 * suspend or we'll have issues running the pfuncs
558 */
559 if (request_irq(host->irq, kw_i2c_irq, IRQF_NO_SUSPEND,
560 "keywest i2c", host))
561 host->irq = 0;
562
563 printk(KERN_INFO "KeyWest i2c @0x%08x irq %d %s\n",
564 *addrp, host->irq, np->full_name);
565
566 return host;
567 }
568
569
570 static void __init kw_i2c_add(struct pmac_i2c_host_kw *host,
571 struct device_node *controller,
572 struct device_node *busnode,
573 int channel)
574 {
575 struct pmac_i2c_bus *bus;
576
577 bus = kzalloc(sizeof(struct pmac_i2c_bus), GFP_KERNEL);
578 if (bus == NULL)
579 return;
580
581 bus->controller = of_node_get(controller);
582 bus->busnode = of_node_get(busnode);
583 bus->type = pmac_i2c_bus_keywest;
584 bus->hostdata = host;
585 bus->channel = channel;
586 bus->mode = pmac_i2c_mode_std;
587 bus->open = kw_i2c_open;
588 bus->close = kw_i2c_close;
589 bus->xfer = kw_i2c_xfer;
590 mutex_init(&bus->mutex);
591 lockdep_set_class(&bus->mutex, &bus->lock_key);
592 if (controller == busnode)
593 bus->flags = pmac_i2c_multibus;
594 list_add(&bus->link, &pmac_i2c_busses);
595
596 printk(KERN_INFO " channel %d bus %s\n", channel,
597 (controller == busnode) ? "<multibus>" : busnode->full_name);
598 }
599
600 static void __init kw_i2c_probe(void)
601 {
602 struct device_node *np, *child, *parent;
603
604 /* Probe keywest-i2c busses */
605 for_each_compatible_node(np, "i2c","keywest-i2c") {
606 struct pmac_i2c_host_kw *host;
607 int multibus;
608
609 /* Found one, init a host structure */
610 host = kw_i2c_host_init(np);
611 if (host == NULL)
612 continue;
613
614 /* Now check if we have a multibus setup (old style) or if we
615 * have proper bus nodes. Note that the "new" way (proper bus
616 * nodes) might cause us to not create some busses that are
617 * kept hidden in the device-tree. In the future, we might
618 * want to work around that by creating busses without a node
619 * but not for now
620 */
621 child = of_get_next_child(np, NULL);
622 multibus = !child || strcmp(child->name, "i2c-bus");
623 of_node_put(child);
624
625 /* For a multibus setup, we get the bus count based on the
626 * parent type
627 */
628 if (multibus) {
629 int chans, i;
630
631 parent = of_get_parent(np);
632 if (parent == NULL)
633 continue;
634 chans = parent->name[0] == 'u' ? 2 : 1;
635 for (i = 0; i < chans; i++)
636 kw_i2c_add(host, np, np, i);
637 } else {
638 for (child = NULL;
639 (child = of_get_next_child(np, child)) != NULL;) {
640 const u32 *reg = of_get_property(child,
641 "reg", NULL);
642 if (reg == NULL)
643 continue;
644 kw_i2c_add(host, np, child, *reg);
645 }
646 }
647 }
648 }
649
650
651 /*
652 *
653 * PMU implementation
654 *
655 */
656
657 #ifdef CONFIG_ADB_PMU
658
659 /*
660 * i2c command block to the PMU
661 */
662 struct pmu_i2c_hdr {
663 u8 bus;
664 u8 mode;
665 u8 bus2;
666 u8 address;
667 u8 sub_addr;
668 u8 comb_addr;
669 u8 count;
670 u8 data[];
671 };
672
673 static void pmu_i2c_complete(struct adb_request *req)
674 {
675 complete(req->arg);
676 }
677
678 static int pmu_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
679 u32 subaddr, u8 *data, int len)
680 {
681 struct adb_request *req = bus->hostdata;
682 struct pmu_i2c_hdr *hdr = (struct pmu_i2c_hdr *)&req->data[1];
683 struct completion comp;
684 int read = addrdir & 1;
685 int retry;
686 int rc = 0;
687
688 /* For now, limit ourselves to 16 bytes transfers */
689 if (len > 16)
690 return -EINVAL;
691
692 init_completion(&comp);
693
694 for (retry = 0; retry < 16; retry++) {
695 memset(req, 0, sizeof(struct adb_request));
696 hdr->bus = bus->channel;
697 hdr->count = len;
698
699 switch(bus->mode) {
700 case pmac_i2c_mode_std:
701 if (subsize != 0)
702 return -EINVAL;
703 hdr->address = addrdir;
704 hdr->mode = PMU_I2C_MODE_SIMPLE;
705 break;
706 case pmac_i2c_mode_stdsub:
707 case pmac_i2c_mode_combined:
708 if (subsize != 1)
709 return -EINVAL;
710 hdr->address = addrdir & 0xfe;
711 hdr->comb_addr = addrdir;
712 hdr->sub_addr = subaddr;
713 if (bus->mode == pmac_i2c_mode_stdsub)
714 hdr->mode = PMU_I2C_MODE_STDSUB;
715 else
716 hdr->mode = PMU_I2C_MODE_COMBINED;
717 break;
718 default:
719 return -EINVAL;
720 }
721
722 reinit_completion(&comp);
723 req->data[0] = PMU_I2C_CMD;
724 req->reply[0] = 0xff;
725 req->nbytes = sizeof(struct pmu_i2c_hdr) + 1;
726 req->done = pmu_i2c_complete;
727 req->arg = &comp;
728 if (!read && len) {
729 memcpy(hdr->data, data, len);
730 req->nbytes += len;
731 }
732 rc = pmu_queue_request(req);
733 if (rc)
734 return rc;
735 wait_for_completion(&comp);
736 if (req->reply[0] == PMU_I2C_STATUS_OK)
737 break;
738 msleep(15);
739 }
740 if (req->reply[0] != PMU_I2C_STATUS_OK)
741 return -EIO;
742
743 for (retry = 0; retry < 16; retry++) {
744 memset(req, 0, sizeof(struct adb_request));
745
746 /* I know that looks like a lot, slow as hell, but darwin
747 * does it so let's be on the safe side for now
748 */
749 msleep(15);
750
751 hdr->bus = PMU_I2C_BUS_STATUS;
752
753 reinit_completion(&comp);
754 req->data[0] = PMU_I2C_CMD;
755 req->reply[0] = 0xff;
756 req->nbytes = 2;
757 req->done = pmu_i2c_complete;
758 req->arg = &comp;
759 rc = pmu_queue_request(req);
760 if (rc)
761 return rc;
762 wait_for_completion(&comp);
763
764 if (req->reply[0] == PMU_I2C_STATUS_OK && !read)
765 return 0;
766 if (req->reply[0] == PMU_I2C_STATUS_DATAREAD && read) {
767 int rlen = req->reply_len - 1;
768
769 if (rlen != len) {
770 printk(KERN_WARNING "low_i2c: PMU returned %d"
771 " bytes, expected %d !\n", rlen, len);
772 return -EIO;
773 }
774 if (len)
775 memcpy(data, &req->reply[1], len);
776 return 0;
777 }
778 }
779 return -EIO;
780 }
781
782 static void __init pmu_i2c_probe(void)
783 {
784 struct pmac_i2c_bus *bus;
785 struct device_node *busnode;
786 int channel, sz;
787
788 if (!pmu_present())
789 return;
790
791 /* There might or might not be a "pmu-i2c" node, we use that
792 * or via-pmu itself, whatever we find. I haven't seen a machine
793 * with separate bus nodes, so we assume a multibus setup
794 */
795 busnode = of_find_node_by_name(NULL, "pmu-i2c");
796 if (busnode == NULL)
797 busnode = of_find_node_by_name(NULL, "via-pmu");
798 if (busnode == NULL)
799 return;
800
801 printk(KERN_INFO "PMU i2c %s\n", busnode->full_name);
802
803 /*
804 * We add bus 1 and 2 only for now, bus 0 is "special"
805 */
806 for (channel = 1; channel <= 2; channel++) {
807 sz = sizeof(struct pmac_i2c_bus) + sizeof(struct adb_request);
808 bus = kzalloc(sz, GFP_KERNEL);
809 if (bus == NULL)
810 return;
811
812 bus->controller = busnode;
813 bus->busnode = busnode;
814 bus->type = pmac_i2c_bus_pmu;
815 bus->channel = channel;
816 bus->mode = pmac_i2c_mode_std;
817 bus->hostdata = bus + 1;
818 bus->xfer = pmu_i2c_xfer;
819 mutex_init(&bus->mutex);
820 lockdep_set_class(&bus->mutex, &bus->lock_key);
821 bus->flags = pmac_i2c_multibus;
822 list_add(&bus->link, &pmac_i2c_busses);
823
824 printk(KERN_INFO " channel %d bus <multibus>\n", channel);
825 }
826 }
827
828 #endif /* CONFIG_ADB_PMU */
829
830
831 /*
832 *
833 * SMU implementation
834 *
835 */
836
837 #ifdef CONFIG_PMAC_SMU
838
839 static void smu_i2c_complete(struct smu_i2c_cmd *cmd, void *misc)
840 {
841 complete(misc);
842 }
843
844 static int smu_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
845 u32 subaddr, u8 *data, int len)
846 {
847 struct smu_i2c_cmd *cmd = bus->hostdata;
848 struct completion comp;
849 int read = addrdir & 1;
850 int rc = 0;
851
852 if ((read && len > SMU_I2C_READ_MAX) ||
853 ((!read) && len > SMU_I2C_WRITE_MAX))
854 return -EINVAL;
855
856 memset(cmd, 0, sizeof(struct smu_i2c_cmd));
857 cmd->info.bus = bus->channel;
858 cmd->info.devaddr = addrdir;
859 cmd->info.datalen = len;
860
861 switch(bus->mode) {
862 case pmac_i2c_mode_std:
863 if (subsize != 0)
864 return -EINVAL;
865 cmd->info.type = SMU_I2C_TRANSFER_SIMPLE;
866 break;
867 case pmac_i2c_mode_stdsub:
868 case pmac_i2c_mode_combined:
869 if (subsize > 3 || subsize < 1)
870 return -EINVAL;
871 cmd->info.sublen = subsize;
872 /* that's big-endian only but heh ! */
873 memcpy(&cmd->info.subaddr, ((char *)&subaddr) + (4 - subsize),
874 subsize);
875 if (bus->mode == pmac_i2c_mode_stdsub)
876 cmd->info.type = SMU_I2C_TRANSFER_STDSUB;
877 else
878 cmd->info.type = SMU_I2C_TRANSFER_COMBINED;
879 break;
880 default:
881 return -EINVAL;
882 }
883 if (!read && len)
884 memcpy(cmd->info.data, data, len);
885
886 init_completion(&comp);
887 cmd->done = smu_i2c_complete;
888 cmd->misc = &comp;
889 rc = smu_queue_i2c(cmd);
890 if (rc < 0)
891 return rc;
892 wait_for_completion(&comp);
893 rc = cmd->status;
894
895 if (read && len)
896 memcpy(data, cmd->info.data, len);
897 return rc < 0 ? rc : 0;
898 }
899
900 static void __init smu_i2c_probe(void)
901 {
902 struct device_node *controller, *busnode;
903 struct pmac_i2c_bus *bus;
904 const u32 *reg;
905 int sz;
906
907 if (!smu_present())
908 return;
909
910 controller = of_find_node_by_name(NULL, "smu-i2c-control");
911 if (controller == NULL)
912 controller = of_find_node_by_name(NULL, "smu");
913 if (controller == NULL)
914 return;
915
916 printk(KERN_INFO "SMU i2c %s\n", controller->full_name);
917
918 /* Look for childs, note that they might not be of the right
919 * type as older device trees mix i2c busses and other things
920 * at the same level
921 */
922 for (busnode = NULL;
923 (busnode = of_get_next_child(controller, busnode)) != NULL;) {
924 if (strcmp(busnode->type, "i2c") &&
925 strcmp(busnode->type, "i2c-bus"))
926 continue;
927 reg = of_get_property(busnode, "reg", NULL);
928 if (reg == NULL)
929 continue;
930
931 sz = sizeof(struct pmac_i2c_bus) + sizeof(struct smu_i2c_cmd);
932 bus = kzalloc(sz, GFP_KERNEL);
933 if (bus == NULL)
934 return;
935
936 bus->controller = controller;
937 bus->busnode = of_node_get(busnode);
938 bus->type = pmac_i2c_bus_smu;
939 bus->channel = *reg;
940 bus->mode = pmac_i2c_mode_std;
941 bus->hostdata = bus + 1;
942 bus->xfer = smu_i2c_xfer;
943 mutex_init(&bus->mutex);
944 lockdep_set_class(&bus->mutex, &bus->lock_key);
945 bus->flags = 0;
946 list_add(&bus->link, &pmac_i2c_busses);
947
948 printk(KERN_INFO " channel %x bus %s\n",
949 bus->channel, busnode->full_name);
950 }
951 }
952
953 #endif /* CONFIG_PMAC_SMU */
954
955 /*
956 *
957 * Core code
958 *
959 */
960
961
962 struct pmac_i2c_bus *pmac_i2c_find_bus(struct device_node *node)
963 {
964 struct device_node *p = of_node_get(node);
965 struct device_node *prev = NULL;
966 struct pmac_i2c_bus *bus;
967
968 while(p) {
969 list_for_each_entry(bus, &pmac_i2c_busses, link) {
970 if (p == bus->busnode) {
971 if (prev && bus->flags & pmac_i2c_multibus) {
972 const u32 *reg;
973 reg = of_get_property(prev, "reg",
974 NULL);
975 if (!reg)
976 continue;
977 if (((*reg) >> 8) != bus->channel)
978 continue;
979 }
980 of_node_put(p);
981 of_node_put(prev);
982 return bus;
983 }
984 }
985 of_node_put(prev);
986 prev = p;
987 p = of_get_parent(p);
988 }
989 return NULL;
990 }
991 EXPORT_SYMBOL_GPL(pmac_i2c_find_bus);
992
993 u8 pmac_i2c_get_dev_addr(struct device_node *device)
994 {
995 const u32 *reg = of_get_property(device, "reg", NULL);
996
997 if (reg == NULL)
998 return 0;
999
1000 return (*reg) & 0xff;
1001 }
1002 EXPORT_SYMBOL_GPL(pmac_i2c_get_dev_addr);
1003
1004 struct device_node *pmac_i2c_get_controller(struct pmac_i2c_bus *bus)
1005 {
1006 return bus->controller;
1007 }
1008 EXPORT_SYMBOL_GPL(pmac_i2c_get_controller);
1009
1010 struct device_node *pmac_i2c_get_bus_node(struct pmac_i2c_bus *bus)
1011 {
1012 return bus->busnode;
1013 }
1014 EXPORT_SYMBOL_GPL(pmac_i2c_get_bus_node);
1015
1016 int pmac_i2c_get_type(struct pmac_i2c_bus *bus)
1017 {
1018 return bus->type;
1019 }
1020 EXPORT_SYMBOL_GPL(pmac_i2c_get_type);
1021
1022 int pmac_i2c_get_flags(struct pmac_i2c_bus *bus)
1023 {
1024 return bus->flags;
1025 }
1026 EXPORT_SYMBOL_GPL(pmac_i2c_get_flags);
1027
1028 int pmac_i2c_get_channel(struct pmac_i2c_bus *bus)
1029 {
1030 return bus->channel;
1031 }
1032 EXPORT_SYMBOL_GPL(pmac_i2c_get_channel);
1033
1034
1035 struct i2c_adapter *pmac_i2c_get_adapter(struct pmac_i2c_bus *bus)
1036 {
1037 return &bus->adapter;
1038 }
1039 EXPORT_SYMBOL_GPL(pmac_i2c_get_adapter);
1040
1041 struct pmac_i2c_bus *pmac_i2c_adapter_to_bus(struct i2c_adapter *adapter)
1042 {
1043 struct pmac_i2c_bus *bus;
1044
1045 list_for_each_entry(bus, &pmac_i2c_busses, link)
1046 if (&bus->adapter == adapter)
1047 return bus;
1048 return NULL;
1049 }
1050 EXPORT_SYMBOL_GPL(pmac_i2c_adapter_to_bus);
1051
1052 int pmac_i2c_match_adapter(struct device_node *dev, struct i2c_adapter *adapter)
1053 {
1054 struct pmac_i2c_bus *bus = pmac_i2c_find_bus(dev);
1055
1056 if (bus == NULL)
1057 return 0;
1058 return (&bus->adapter == adapter);
1059 }
1060 EXPORT_SYMBOL_GPL(pmac_i2c_match_adapter);
1061
1062 int pmac_low_i2c_lock(struct device_node *np)
1063 {
1064 struct pmac_i2c_bus *bus, *found = NULL;
1065
1066 list_for_each_entry(bus, &pmac_i2c_busses, link) {
1067 if (np == bus->controller) {
1068 found = bus;
1069 break;
1070 }
1071 }
1072 if (!found)
1073 return -ENODEV;
1074 return pmac_i2c_open(bus, 0);
1075 }
1076 EXPORT_SYMBOL_GPL(pmac_low_i2c_lock);
1077
1078 int pmac_low_i2c_unlock(struct device_node *np)
1079 {
1080 struct pmac_i2c_bus *bus, *found = NULL;
1081
1082 list_for_each_entry(bus, &pmac_i2c_busses, link) {
1083 if (np == bus->controller) {
1084 found = bus;
1085 break;
1086 }
1087 }
1088 if (!found)
1089 return -ENODEV;
1090 pmac_i2c_close(bus);
1091 return 0;
1092 }
1093 EXPORT_SYMBOL_GPL(pmac_low_i2c_unlock);
1094
1095
1096 int pmac_i2c_open(struct pmac_i2c_bus *bus, int polled)
1097 {
1098 int rc;
1099
1100 mutex_lock(&bus->mutex);
1101 bus->polled = polled || pmac_i2c_force_poll;
1102 bus->opened = 1;
1103 bus->mode = pmac_i2c_mode_std;
1104 if (bus->open && (rc = bus->open(bus)) != 0) {
1105 bus->opened = 0;
1106 mutex_unlock(&bus->mutex);
1107 return rc;
1108 }
1109 return 0;
1110 }
1111 EXPORT_SYMBOL_GPL(pmac_i2c_open);
1112
1113 void pmac_i2c_close(struct pmac_i2c_bus *bus)
1114 {
1115 WARN_ON(!bus->opened);
1116 if (bus->close)
1117 bus->close(bus);
1118 bus->opened = 0;
1119 mutex_unlock(&bus->mutex);
1120 }
1121 EXPORT_SYMBOL_GPL(pmac_i2c_close);
1122
1123 int pmac_i2c_setmode(struct pmac_i2c_bus *bus, int mode)
1124 {
1125 WARN_ON(!bus->opened);
1126
1127 /* Report me if you see the error below as there might be a new
1128 * "combined4" mode that I need to implement for the SMU bus
1129 */
1130 if (mode < pmac_i2c_mode_dumb || mode > pmac_i2c_mode_combined) {
1131 printk(KERN_ERR "low_i2c: Invalid mode %d requested on"
1132 " bus %s !\n", mode, bus->busnode->full_name);
1133 return -EINVAL;
1134 }
1135 bus->mode = mode;
1136
1137 return 0;
1138 }
1139 EXPORT_SYMBOL_GPL(pmac_i2c_setmode);
1140
1141 int pmac_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize,
1142 u32 subaddr, u8 *data, int len)
1143 {
1144 int rc;
1145
1146 WARN_ON(!bus->opened);
1147
1148 DBG("xfer() chan=%d, addrdir=0x%x, mode=%d, subsize=%d, subaddr=0x%x,"
1149 " %d bytes, bus %s\n", bus->channel, addrdir, bus->mode, subsize,
1150 subaddr, len, bus->busnode->full_name);
1151
1152 rc = bus->xfer(bus, addrdir, subsize, subaddr, data, len);
1153
1154 #ifdef DEBUG
1155 if (rc)
1156 DBG("xfer error %d\n", rc);
1157 #endif
1158 return rc;
1159 }
1160 EXPORT_SYMBOL_GPL(pmac_i2c_xfer);
1161
1162 /* some quirks for platform function decoding */
1163 enum {
1164 pmac_i2c_quirk_invmask = 0x00000001u,
1165 pmac_i2c_quirk_skip = 0x00000002u,
1166 };
1167
1168 static void pmac_i2c_devscan(void (*callback)(struct device_node *dev,
1169 int quirks))
1170 {
1171 struct pmac_i2c_bus *bus;
1172 struct device_node *np;
1173 static struct whitelist_ent {
1174 char *name;
1175 char *compatible;
1176 int quirks;
1177 } whitelist[] = {
1178 /* XXX Study device-tree's & apple drivers are get the quirks
1179 * right !
1180 */
1181 /* Workaround: It seems that running the clockspreading
1182 * properties on the eMac will cause lockups during boot.
1183 * The machine seems to work fine without that. So for now,
1184 * let's make sure i2c-hwclock doesn't match about "imic"
1185 * clocks and we'll figure out if we really need to do
1186 * something special about those later.
1187 */
1188 { "i2c-hwclock", "imic5002", pmac_i2c_quirk_skip },
1189 { "i2c-hwclock", "imic5003", pmac_i2c_quirk_skip },
1190 { "i2c-hwclock", NULL, pmac_i2c_quirk_invmask },
1191 { "i2c-cpu-voltage", NULL, 0},
1192 { "temp-monitor", NULL, 0 },
1193 { "supply-monitor", NULL, 0 },
1194 { NULL, NULL, 0 },
1195 };
1196
1197 /* Only some devices need to have platform functions instanciated
1198 * here. For now, we have a table. Others, like 9554 i2c GPIOs used
1199 * on Xserve, if we ever do a driver for them, will use their own
1200 * platform function instance
1201 */
1202 list_for_each_entry(bus, &pmac_i2c_busses, link) {
1203 for (np = NULL;
1204 (np = of_get_next_child(bus->busnode, np)) != NULL;) {
1205 struct whitelist_ent *p;
1206 /* If multibus, check if device is on that bus */
1207 if (bus->flags & pmac_i2c_multibus)
1208 if (bus != pmac_i2c_find_bus(np))
1209 continue;
1210 for (p = whitelist; p->name != NULL; p++) {
1211 if (strcmp(np->name, p->name))
1212 continue;
1213 if (p->compatible &&
1214 !of_device_is_compatible(np, p->compatible))
1215 continue;
1216 if (p->quirks & pmac_i2c_quirk_skip)
1217 break;
1218 callback(np, p->quirks);
1219 break;
1220 }
1221 }
1222 }
1223 }
1224
1225 #define MAX_I2C_DATA 64
1226
1227 struct pmac_i2c_pf_inst
1228 {
1229 struct pmac_i2c_bus *bus;
1230 u8 addr;
1231 u8 buffer[MAX_I2C_DATA];
1232 u8 scratch[MAX_I2C_DATA];
1233 int bytes;
1234 int quirks;
1235 };
1236
1237 static void* pmac_i2c_do_begin(struct pmf_function *func, struct pmf_args *args)
1238 {
1239 struct pmac_i2c_pf_inst *inst;
1240 struct pmac_i2c_bus *bus;
1241
1242 bus = pmac_i2c_find_bus(func->node);
1243 if (bus == NULL) {
1244 printk(KERN_ERR "low_i2c: Can't find bus for %s (pfunc)\n",
1245 func->node->full_name);
1246 return NULL;
1247 }
1248 if (pmac_i2c_open(bus, 0)) {
1249 printk(KERN_ERR "low_i2c: Can't open i2c bus for %s (pfunc)\n",
1250 func->node->full_name);
1251 return NULL;
1252 }
1253
1254 /* XXX might need GFP_ATOMIC when called during the suspend process,
1255 * but then, there are already lots of issues with suspending when
1256 * near OOM that need to be resolved, the allocator itself should
1257 * probably make GFP_NOIO implicit during suspend
1258 */
1259 inst = kzalloc(sizeof(struct pmac_i2c_pf_inst), GFP_KERNEL);
1260 if (inst == NULL) {
1261 pmac_i2c_close(bus);
1262 return NULL;
1263 }
1264 inst->bus = bus;
1265 inst->addr = pmac_i2c_get_dev_addr(func->node);
1266 inst->quirks = (int)(long)func->driver_data;
1267 return inst;
1268 }
1269
1270 static void pmac_i2c_do_end(struct pmf_function *func, void *instdata)
1271 {
1272 struct pmac_i2c_pf_inst *inst = instdata;
1273
1274 if (inst == NULL)
1275 return;
1276 pmac_i2c_close(inst->bus);
1277 kfree(inst);
1278 }
1279
1280 static int pmac_i2c_do_read(PMF_STD_ARGS, u32 len)
1281 {
1282 struct pmac_i2c_pf_inst *inst = instdata;
1283
1284 inst->bytes = len;
1285 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_read, 0, 0,
1286 inst->buffer, len);
1287 }
1288
1289 static int pmac_i2c_do_write(PMF_STD_ARGS, u32 len, const u8 *data)
1290 {
1291 struct pmac_i2c_pf_inst *inst = instdata;
1292
1293 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 0, 0,
1294 (u8 *)data, len);
1295 }
1296
1297 /* This function is used to do the masking & OR'ing for the "rmw" type
1298 * callbacks. Ze should apply the mask and OR in the values in the
1299 * buffer before writing back. The problem is that it seems that
1300 * various darwin drivers implement the mask/or differently, thus
1301 * we need to check the quirks first
1302 */
1303 static void pmac_i2c_do_apply_rmw(struct pmac_i2c_pf_inst *inst,
1304 u32 len, const u8 *mask, const u8 *val)
1305 {
1306 int i;
1307
1308 if (inst->quirks & pmac_i2c_quirk_invmask) {
1309 for (i = 0; i < len; i ++)
1310 inst->scratch[i] = (inst->buffer[i] & mask[i]) | val[i];
1311 } else {
1312 for (i = 0; i < len; i ++)
1313 inst->scratch[i] = (inst->buffer[i] & ~mask[i])
1314 | (val[i] & mask[i]);
1315 }
1316 }
1317
1318 static int pmac_i2c_do_rmw(PMF_STD_ARGS, u32 masklen, u32 valuelen,
1319 u32 totallen, const u8 *maskdata,
1320 const u8 *valuedata)
1321 {
1322 struct pmac_i2c_pf_inst *inst = instdata;
1323
1324 if (masklen > inst->bytes || valuelen > inst->bytes ||
1325 totallen > inst->bytes || valuelen > masklen)
1326 return -EINVAL;
1327
1328 pmac_i2c_do_apply_rmw(inst, masklen, maskdata, valuedata);
1329
1330 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 0, 0,
1331 inst->scratch, totallen);
1332 }
1333
1334 static int pmac_i2c_do_read_sub(PMF_STD_ARGS, u8 subaddr, u32 len)
1335 {
1336 struct pmac_i2c_pf_inst *inst = instdata;
1337
1338 inst->bytes = len;
1339 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_read, 1, subaddr,
1340 inst->buffer, len);
1341 }
1342
1343 static int pmac_i2c_do_write_sub(PMF_STD_ARGS, u8 subaddr, u32 len,
1344 const u8 *data)
1345 {
1346 struct pmac_i2c_pf_inst *inst = instdata;
1347
1348 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 1,
1349 subaddr, (u8 *)data, len);
1350 }
1351
1352 static int pmac_i2c_do_set_mode(PMF_STD_ARGS, int mode)
1353 {
1354 struct pmac_i2c_pf_inst *inst = instdata;
1355
1356 return pmac_i2c_setmode(inst->bus, mode);
1357 }
1358
1359 static int pmac_i2c_do_rmw_sub(PMF_STD_ARGS, u8 subaddr, u32 masklen,
1360 u32 valuelen, u32 totallen, const u8 *maskdata,
1361 const u8 *valuedata)
1362 {
1363 struct pmac_i2c_pf_inst *inst = instdata;
1364
1365 if (masklen > inst->bytes || valuelen > inst->bytes ||
1366 totallen > inst->bytes || valuelen > masklen)
1367 return -EINVAL;
1368
1369 pmac_i2c_do_apply_rmw(inst, masklen, maskdata, valuedata);
1370
1371 return pmac_i2c_xfer(inst->bus, inst->addr | pmac_i2c_write, 1,
1372 subaddr, inst->scratch, totallen);
1373 }
1374
1375 static int pmac_i2c_do_mask_and_comp(PMF_STD_ARGS, u32 len,
1376 const u8 *maskdata,
1377 const u8 *valuedata)
1378 {
1379 struct pmac_i2c_pf_inst *inst = instdata;
1380 int i, match;
1381
1382 /* Get return value pointer, it's assumed to be a u32 */
1383 if (!args || !args->count || !args->u[0].p)
1384 return -EINVAL;
1385
1386 /* Check buffer */
1387 if (len > inst->bytes)
1388 return -EINVAL;
1389
1390 for (i = 0, match = 1; match && i < len; i ++)
1391 if ((inst->buffer[i] & maskdata[i]) != valuedata[i])
1392 match = 0;
1393 *args->u[0].p = match;
1394 return 0;
1395 }
1396
1397 static int pmac_i2c_do_delay(PMF_STD_ARGS, u32 duration)
1398 {
1399 msleep((duration + 999) / 1000);
1400 return 0;
1401 }
1402
1403
1404 static struct pmf_handlers pmac_i2c_pfunc_handlers = {
1405 .begin = pmac_i2c_do_begin,
1406 .end = pmac_i2c_do_end,
1407 .read_i2c = pmac_i2c_do_read,
1408 .write_i2c = pmac_i2c_do_write,
1409 .rmw_i2c = pmac_i2c_do_rmw,
1410 .read_i2c_sub = pmac_i2c_do_read_sub,
1411 .write_i2c_sub = pmac_i2c_do_write_sub,
1412 .rmw_i2c_sub = pmac_i2c_do_rmw_sub,
1413 .set_i2c_mode = pmac_i2c_do_set_mode,
1414 .mask_and_compare = pmac_i2c_do_mask_and_comp,
1415 .delay = pmac_i2c_do_delay,
1416 };
1417
1418 static void __init pmac_i2c_dev_create(struct device_node *np, int quirks)
1419 {
1420 DBG("dev_create(%s)\n", np->full_name);
1421
1422 pmf_register_driver(np, &pmac_i2c_pfunc_handlers,
1423 (void *)(long)quirks);
1424 }
1425
1426 static void __init pmac_i2c_dev_init(struct device_node *np, int quirks)
1427 {
1428 DBG("dev_create(%s)\n", np->full_name);
1429
1430 pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_INIT, NULL);
1431 }
1432
1433 static void pmac_i2c_dev_suspend(struct device_node *np, int quirks)
1434 {
1435 DBG("dev_suspend(%s)\n", np->full_name);
1436 pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_SLEEP, NULL);
1437 }
1438
1439 static void pmac_i2c_dev_resume(struct device_node *np, int quirks)
1440 {
1441 DBG("dev_resume(%s)\n", np->full_name);
1442 pmf_do_functions(np, NULL, 0, PMF_FLAGS_ON_WAKE, NULL);
1443 }
1444
1445 void pmac_pfunc_i2c_suspend(void)
1446 {
1447 pmac_i2c_devscan(pmac_i2c_dev_suspend);
1448 }
1449
1450 void pmac_pfunc_i2c_resume(void)
1451 {
1452 pmac_i2c_devscan(pmac_i2c_dev_resume);
1453 }
1454
1455 /*
1456 * Initialize us: probe all i2c busses on the machine, instantiate
1457 * busses and platform functions as needed.
1458 */
1459 /* This is non-static as it might be called early by smp code */
1460 int __init pmac_i2c_init(void)
1461 {
1462 static int i2c_inited;
1463
1464 if (i2c_inited)
1465 return 0;
1466 i2c_inited = 1;
1467
1468 /* Probe keywest-i2c busses */
1469 kw_i2c_probe();
1470
1471 #ifdef CONFIG_ADB_PMU
1472 /* Probe PMU i2c busses */
1473 pmu_i2c_probe();
1474 #endif
1475
1476 #ifdef CONFIG_PMAC_SMU
1477 /* Probe SMU i2c busses */
1478 smu_i2c_probe();
1479 #endif
1480
1481 /* Now add plaform functions for some known devices */
1482 pmac_i2c_devscan(pmac_i2c_dev_create);
1483
1484 return 0;
1485 }
1486 machine_arch_initcall(powermac, pmac_i2c_init);
1487
1488 /* Since pmac_i2c_init can be called too early for the platform device
1489 * registration, we need to do it at a later time. In our case, subsys
1490 * happens to fit well, though I agree it's a bit of a hack...
1491 */
1492 static int __init pmac_i2c_create_platform_devices(void)
1493 {
1494 struct pmac_i2c_bus *bus;
1495 int i = 0;
1496
1497 /* In the case where we are initialized from smp_init(), we must
1498 * not use the timer (and thus the irq). It's safe from now on
1499 * though
1500 */
1501 pmac_i2c_force_poll = 0;
1502
1503 /* Create platform devices */
1504 list_for_each_entry(bus, &pmac_i2c_busses, link) {
1505 bus->platform_dev =
1506 platform_device_alloc("i2c-powermac", i++);
1507 if (bus->platform_dev == NULL)
1508 return -ENOMEM;
1509 bus->platform_dev->dev.platform_data = bus;
1510 bus->platform_dev->dev.of_node = bus->busnode;
1511 platform_device_add(bus->platform_dev);
1512 }
1513
1514 /* Now call platform "init" functions */
1515 pmac_i2c_devscan(pmac_i2c_dev_init);
1516
1517 return 0;
1518 }
1519 machine_subsys_initcall(powermac, pmac_i2c_create_platform_devices);
Linux with added FPC-III support