| blob | ee9f1a508d2f7fdabae06088b901be47cac23400 |
1 /*
2 * Copyright (C) 2015 Freescale Semiconductor, Inc.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 */
10 #ifndef __DT_BINDINGS_CLOCK_IMX6UL_H
11 #define __DT_BINDINGS_CLOCK_IMX6UL_H
13 #define IMX6UL_CLK_DUMMY 0
14 #define IMX6UL_CLK_CKIL 1
15 #define IMX6UL_CLK_CKIH 2
16 #define IMX6UL_CLK_OSC 3
17 #define IMX6UL_PLL1_BYPASS_SRC 4
18 #define IMX6UL_PLL2_BYPASS_SRC 5
19 #define IMX6UL_PLL3_BYPASS_SRC 6
20 #define IMX6UL_PLL4_BYPASS_SRC 7
21 #define IMX6UL_PLL5_BYPASS_SRC 8
22 #define IMX6UL_PLL6_BYPASS_SRC 9
23 #define IMX6UL_PLL7_BYPASS_SRC 10
24 #define IMX6UL_CLK_PLL1 11
25 #define IMX6UL_CLK_PLL2 12
26 #define IMX6UL_CLK_PLL3 13
27 #define IMX6UL_CLK_PLL4 14
28 #define IMX6UL_CLK_PLL5 15
29 #define IMX6UL_CLK_PLL6 16
30 #define IMX6UL_CLK_PLL7 17
31 #define IMX6UL_PLL1_BYPASS 18
32 #define IMX6UL_PLL2_BYPASS 19
33 #define IMX6UL_PLL3_BYPASS 20
34 #define IMX6UL_PLL4_BYPASS 21
35 #define IMX6UL_PLL5_BYPASS 22
36 #define IMX6UL_PLL6_BYPASS 23
37 #define IMX6UL_PLL7_BYPASS 24
38 #define IMX6UL_CLK_PLL1_SYS 25
39 #define IMX6UL_CLK_PLL2_BUS 26
40 #define IMX6UL_CLK_PLL3_USB_OTG 27
41 #define IMX6UL_CLK_PLL4_AUDIO 28
42 #define IMX6UL_CLK_PLL5_VIDEO 29
43 #define IMX6UL_CLK_PLL6_ENET 30
44 #define IMX6UL_CLK_PLL7_USB_HOST 31
45 #define IMX6UL_CLK_USBPHY1 32
46 #define IMX6UL_CLK_USBPHY2 33
47 #define IMX6UL_CLK_USBPHY1_GATE 34
48 #define IMX6UL_CLK_USBPHY2_GATE 35
49 #define IMX6UL_CLK_PLL2_PFD0 36
50 #define IMX6UL_CLK_PLL2_PFD1 37
51 #define IMX6UL_CLK_PLL2_PFD2 38
52 #define IMX6UL_CLK_PLL2_PFD3 39
53 #define IMX6UL_CLK_PLL3_PFD0 40
54 #define IMX6UL_CLK_PLL3_PFD1 41
55 #define IMX6UL_CLK_PLL3_PFD2 42
56 #define IMX6UL_CLK_PLL3_PFD3 43
57 #define IMX6UL_CLK_ENET_REF 44
58 #define IMX6UL_CLK_ENET2_REF 45
59 #define IMX6UL_CLK_ENET2_REF_125M 46
60 #define IMX6UL_CLK_ENET_PTP_REF 47
61 #define IMX6UL_CLK_ENET_PTP 48
62 #define IMX6UL_CLK_PLL4_POST_DIV 49
63 #define IMX6UL_CLK_PLL4_AUDIO_DIV 50
64 #define IMX6UL_CLK_PLL5_POST_DIV 51
65 #define IMX6UL_CLK_PLL5_VIDEO_DIV 52
66 #define IMX6UL_CLK_PLL2_198M 53
67 #define IMX6UL_CLK_PLL3_80M 54
68 #define IMX6UL_CLK_PLL3_60M 55
69 #define IMX6UL_CLK_STEP 56
70 #define IMX6UL_CLK_PLL1_SW 57
71 #define IMX6UL_CLK_AXI_ALT_SEL 58
72 #define IMX6UL_CLK_AXI_SEL 59
73 #define IMX6UL_CLK_PERIPH_PRE 60
74 #define IMX6UL_CLK_PERIPH2_PRE 61
75 #define IMX6UL_CLK_PERIPH_CLK2_SEL 62
76 #define IMX6UL_CLK_PERIPH2_CLK2_SEL 63
77 #define IMX6UL_CLK_USDHC1_SEL 64
78 #define IMX6UL_CLK_USDHC2_SEL 65
79 #define IMX6UL_CLK_BCH_SEL 66
80 #define IMX6UL_CLK_GPMI_SEL 67
81 #define IMX6UL_CLK_EIM_SLOW_SEL 68
82 #define IMX6UL_CLK_SPDIF_SEL 69
83 #define IMX6UL_CLK_SAI1_SEL 70
84 #define IMX6UL_CLK_SAI2_SEL 71
85 #define IMX6UL_CLK_SAI3_SEL 72
86 #define IMX6UL_CLK_LCDIF_PRE_SEL 73
87 #define IMX6UL_CLK_SIM_PRE_SEL 74
88 #define IMX6UL_CLK_LDB_DI0_SEL 75
89 #define IMX6UL_CLK_LDB_DI1_SEL 76
90 #define IMX6UL_CLK_ENFC_SEL 77
91 #define IMX6UL_CLK_CAN_SEL 78
92 #define IMX6UL_CLK_ECSPI_SEL 79
93 #define IMX6UL_CLK_UART_SEL 80
94 #define IMX6UL_CLK_QSPI1_SEL 81
95 #define IMX6UL_CLK_PERCLK_SEL 82
96 #define IMX6UL_CLK_LCDIF_SEL 83
97 #define IMX6UL_CLK_SIM_SEL 84
98 #define IMX6UL_CLK_PERIPH 85
99 #define IMX6UL_CLK_PERIPH2 86
100 #define IMX6UL_CLK_LDB_DI0_DIV_3_5 87
101 #define IMX6UL_CLK_LDB_DI0_DIV_7 88
102 #define IMX6UL_CLK_LDB_DI1_DIV_3_5 89
103 #define IMX6UL_CLK_LDB_DI1_DIV_7 90
104 #define IMX6UL_CLK_LDB_DI0_DIV_SEL 91
105 #define IMX6UL_CLK_LDB_DI1_DIV_SEL 92
106 #define IMX6UL_CLK_ARM 93
107 #define IMX6UL_CLK_PERIPH_CLK2 94
108 #define IMX6UL_CLK_PERIPH2_CLK2 95
109 #define IMX6UL_CLK_AHB 96
110 #define IMX6UL_CLK_MMDC_PODF 97
111 #define IMX6UL_CLK_AXI_PODF 98
112 #define IMX6UL_CLK_PERCLK 99
113 #define IMX6UL_CLK_IPG 100
114 #define IMX6UL_CLK_USDHC1_PODF 101
115 #define IMX6UL_CLK_USDHC2_PODF 102
116 #define IMX6UL_CLK_BCH_PODF 103
117 #define IMX6UL_CLK_GPMI_PODF 104
118 #define IMX6UL_CLK_EIM_SLOW_PODF 105
119 #define IMX6UL_CLK_SPDIF_PRED 106
120 #define IMX6UL_CLK_SPDIF_PODF 107
121 #define IMX6UL_CLK_SAI1_PRED 108
122 #define IMX6UL_CLK_SAI1_PODF 109
123 #define IMX6UL_CLK_SAI2_PRED 110
124 #define IMX6UL_CLK_SAI2_PODF 111
125 #define IMX6UL_CLK_SAI3_PRED 112
126 #define IMX6UL_CLK_SAI3_PODF 113
127 #define IMX6UL_CLK_LCDIF_PRED 114
128 #define IMX6UL_CLK_LCDIF_PODF 115
129 #define IMX6UL_CLK_SIM_PODF 116
130 #define IMX6UL_CLK_QSPI1_PDOF 117
131 #define IMX6UL_CLK_ENFC_PRED 118
132 #define IMX6UL_CLK_ENFC_PODF 119
133 #define IMX6UL_CLK_CAN_PODF 120
134 #define IMX6UL_CLK_ECSPI_PODF 121
135 #define IMX6UL_CLK_UART_PODF 122
136 #define IMX6UL_CLK_ADC1 123
137 #define IMX6UL_CLK_ADC2 124
138 #define IMX6UL_CLK_AIPSTZ1 125
139 #define IMX6UL_CLK_AIPSTZ2 126
140 #define IMX6UL_CLK_AIPSTZ3 127
141 #define IMX6UL_CLK_APBHDMA 128
142 #define IMX6UL_CLK_ASRC_IPG 129
143 #define IMX6UL_CLK_ASRC_MEM 130
144 #define IMX6UL_CLK_GPMI_BCH_APB 131
145 #define IMX6UL_CLK_GPMI_BCH 132
146 #define IMX6UL_CLK_GPMI_IO 133
147 #define IMX6UL_CLK_GPMI_APB 134
148 #define IMX6UL_CLK_CAAM_MEM 135
149 #define IMX6UL_CLK_CAAM_ACLK 136
150 #define IMX6UL_CLK_CAAM_IPG 137
151 #define IMX6UL_CLK_CSI 138
152 #define IMX6UL_CLK_ECSPI1 139
153 #define IMX6UL_CLK_ECSPI2 140
154 #define IMX6UL_CLK_ECSPI3 141
155 #define IMX6UL_CLK_ECSPI4 142
156 #define IMX6UL_CLK_EIM 143
157 #define IMX6UL_CLK_ENET 144
158 #define IMX6UL_CLK_ENET_AHB 145
159 #define IMX6UL_CLK_EPIT1 146
160 #define IMX6UL_CLK_EPIT2 147
161 #define IMX6UL_CLK_CAN1_IPG 148
162 #define IMX6UL_CLK_CAN1_SERIAL 149
163 #define IMX6UL_CLK_CAN2_IPG 150
164 #define IMX6UL_CLK_CAN2_SERIAL 151
165 #define IMX6UL_CLK_GPT1_BUS 152
166 #define IMX6UL_CLK_GPT1_SERIAL 153
167 #define IMX6UL_CLK_GPT2_BUS 154
168 #define IMX6UL_CLK_GPT2_SERIAL 155
169 #define IMX6UL_CLK_I2C1 156
170 #define IMX6UL_CLK_I2C2 157
171 #define IMX6UL_CLK_I2C3 158
172 #define IMX6UL_CLK_I2C4 159
173 #define IMX6UL_CLK_IOMUXC 160
174 #define IMX6UL_CLK_LCDIF_APB 161
175 #define IMX6UL_CLK_LCDIF_PIX 162
176 #define IMX6UL_CLK_MMDC_P0_FAST 163
177 #define IMX6UL_CLK_MMDC_P0_IPG 164
178 #define IMX6UL_CLK_OCOTP 165
179 #define IMX6UL_CLK_OCRAM 166
180 #define IMX6UL_CLK_PWM1 167
181 #define IMX6UL_CLK_PWM2 168
182 #define IMX6UL_CLK_PWM3 169
183 #define IMX6UL_CLK_PWM4 170
184 #define IMX6UL_CLK_PWM5 171
185 #define IMX6UL_CLK_PWM6 172
186 #define IMX6UL_CLK_PWM7 173
187 #define IMX6UL_CLK_PWM8 174
188 #define IMX6UL_CLK_PXP 175
189 #define IMX6UL_CLK_QSPI 176
190 #define IMX6UL_CLK_ROM 177
191 #define IMX6UL_CLK_SAI1 178
192 #define IMX6UL_CLK_SAI1_IPG 179
193 #define IMX6UL_CLK_SAI2 180
194 #define IMX6UL_CLK_SAI2_IPG 181
195 #define IMX6UL_CLK_SAI3 182
196 #define IMX6UL_CLK_SAI3_IPG 183
197 #define IMX6UL_CLK_SDMA 184
198 #define IMX6UL_CLK_SIM 185
199 #define IMX6UL_CLK_SIM_S 186
200 #define IMX6UL_CLK_SPBA 187
201 #define IMX6UL_CLK_SPDIF 188
202 #define IMX6UL_CLK_UART1_IPG 189
203 #define IMX6UL_CLK_UART1_SERIAL 190
204 #define IMX6UL_CLK_UART2_IPG 191
205 #define IMX6UL_CLK_UART2_SERIAL 192
206 #define IMX6UL_CLK_UART3_IPG 193
207 #define IMX6UL_CLK_UART3_SERIAL 194
208 #define IMX6UL_CLK_UART4_IPG 195
209 #define IMX6UL_CLK_UART4_SERIAL 196
210 #define IMX6UL_CLK_UART5_IPG 197
211 #define IMX6UL_CLK_UART5_SERIAL 198
212 #define IMX6UL_CLK_UART6_IPG 199
213 #define IMX6UL_CLK_UART6_SERIAL 200
214 #define IMX6UL_CLK_UART7_IPG 201
215 #define IMX6UL_CLK_UART7_SERIAL 202
216 #define IMX6UL_CLK_UART8_IPG 203
217 #define IMX6UL_CLK_UART8_SERIAL 204
218 #define IMX6UL_CLK_USBOH3 205
219 #define IMX6UL_CLK_USDHC1 206
220 #define IMX6UL_CLK_USDHC2 207
221 #define IMX6UL_CLK_WDOG1 208
222 #define IMX6UL_CLK_WDOG2 209
223 #define IMX6UL_CLK_WDOG3 210
224 #define IMX6UL_CLK_LDB_DI0 211
225 #define IMX6UL_CLK_AXI 212
226 #define IMX6UL_CLK_SPDIF_GCLK 213
227 #define IMX6UL_CLK_GPT_3M 214
228 #define IMX6UL_CLK_SIM2 215
229 #define IMX6UL_CLK_SIM1 216
230 #define IMX6UL_CLK_IPP_DI0 217
231 #define IMX6UL_CLK_IPP_DI1 218
232 #define IMX6UL_CA7_SECONDARY_SEL 219
233 #define IMX6UL_CLK_PER_BCH 220
234 #define IMX6UL_CLK_CSI_SEL 221
235 #define IMX6UL_CLK_CSI_PODF 222
236 #define IMX6UL_CLK_PLL3_120M 223
237 #define IMX6UL_CLK_KPP 224
239 /* For i.MX6ULL */
240 #define IMX6ULL_CLK_ESAI_PRED 225
241 #define IMX6ULL_CLK_ESAI_PODF 226
242 #define IMX6ULL_CLK_ESAI_EXTAL 227
243 #define IMX6ULL_CLK_ESAI_MEM 228
244 #define IMX6ULL_CLK_ESAI_IPG 229
245 #define IMX6ULL_CLK_DCP_CLK 230
246 #define IMX6ULL_CLK_EPDC_PRE_SEL 231
247 #define IMX6ULL_CLK_EPDC_SEL 232
248 #define IMX6ULL_CLK_EPDC_PODF 233
249 #define IMX6ULL_CLK_EPDC_ACLK 234
250 #define IMX6ULL_CLK_EPDC_PIX 235
251 #define IMX6ULL_CLK_ESAI_SEL 236
252 #define IMX6UL_CLK_END 237