2 * DMA Engine test module
4 * Copyright (C) 2007 Atmel Corporation
5 * Copyright (C) 2013 Intel Corporation
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
13 #include <linux/delay.h>
14 #include <linux/dma-mapping.h>
15 #include <linux/dmaengine.h>
16 #include <linux/freezer.h>
17 #include <linux/init.h>
18 #include <linux/kthread.h>
19 #include <linux/module.h>
20 #include <linux/moduleparam.h>
21 #include <linux/random.h>
22 #include <linux/slab.h>
23 #include <linux/wait.h>
25 static unsigned int test_buf_size
= 16384;
26 module_param(test_buf_size
, uint
, S_IRUGO
| S_IWUSR
);
27 MODULE_PARM_DESC(test_buf_size
, "Size of the memcpy test buffer");
29 static char test_channel
[20];
30 module_param_string(channel
, test_channel
, sizeof(test_channel
),
32 MODULE_PARM_DESC(channel
, "Bus ID of the channel to test (default: any)");
34 static char test_device
[32];
35 module_param_string(device
, test_device
, sizeof(test_device
),
37 MODULE_PARM_DESC(device
, "Bus ID of the DMA Engine to test (default: any)");
39 static unsigned int threads_per_chan
= 1;
40 module_param(threads_per_chan
, uint
, S_IRUGO
| S_IWUSR
);
41 MODULE_PARM_DESC(threads_per_chan
,
42 "Number of threads to start per channel (default: 1)");
44 static unsigned int max_channels
;
45 module_param(max_channels
, uint
, S_IRUGO
| S_IWUSR
);
46 MODULE_PARM_DESC(max_channels
,
47 "Maximum number of channels to use (default: all)");
49 static unsigned int iterations
;
50 module_param(iterations
, uint
, S_IRUGO
| S_IWUSR
);
51 MODULE_PARM_DESC(iterations
,
52 "Iterations before stopping test (default: infinite)");
54 static unsigned int sg_buffers
= 1;
55 module_param(sg_buffers
, uint
, S_IRUGO
| S_IWUSR
);
56 MODULE_PARM_DESC(sg_buffers
,
57 "Number of scatter gather buffers (default: 1)");
59 static unsigned int dmatest
;
60 module_param(dmatest
, uint
, S_IRUGO
| S_IWUSR
);
61 MODULE_PARM_DESC(dmatest
,
62 "dmatest 0-memcpy 1-slave_sg (default: 0)");
64 static unsigned int xor_sources
= 3;
65 module_param(xor_sources
, uint
, S_IRUGO
| S_IWUSR
);
66 MODULE_PARM_DESC(xor_sources
,
67 "Number of xor source buffers (default: 3)");
69 static unsigned int pq_sources
= 3;
70 module_param(pq_sources
, uint
, S_IRUGO
| S_IWUSR
);
71 MODULE_PARM_DESC(pq_sources
,
72 "Number of p+q source buffers (default: 3)");
74 static int timeout
= 3000;
75 module_param(timeout
, uint
, S_IRUGO
| S_IWUSR
);
76 MODULE_PARM_DESC(timeout
, "Transfer Timeout in msec (default: 3000), "
77 "Pass -1 for infinite timeout");
80 module_param(noverify
, bool, S_IRUGO
| S_IWUSR
);
81 MODULE_PARM_DESC(noverify
, "Disable random data setup and verification");
84 module_param(verbose
, bool, S_IRUGO
| S_IWUSR
);
85 MODULE_PARM_DESC(verbose
, "Enable \"success\" result messages (default: off)");
88 * struct dmatest_params - test parameters.
89 * @buf_size: size of the memcpy test buffer
90 * @channel: bus ID of the channel to test
91 * @device: bus ID of the DMA Engine to test
92 * @threads_per_chan: number of threads to start per channel
93 * @max_channels: maximum number of channels to use
94 * @iterations: iterations before stopping test
95 * @xor_sources: number of xor source buffers
96 * @pq_sources: number of p+q source buffers
97 * @timeout: transfer timeout in msec, -1 for infinite timeout
99 struct dmatest_params
{
100 unsigned int buf_size
;
103 unsigned int threads_per_chan
;
104 unsigned int max_channels
;
105 unsigned int iterations
;
106 unsigned int xor_sources
;
107 unsigned int pq_sources
;
113 * struct dmatest_info - test information.
114 * @params: test parameters
115 * @lock: access protection to the fields of this structure
117 static struct dmatest_info
{
118 /* Test parameters */
119 struct dmatest_params params
;
122 struct list_head channels
;
123 unsigned int nr_channels
;
127 .channels
= LIST_HEAD_INIT(test_info
.channels
),
128 .lock
= __MUTEX_INITIALIZER(test_info
.lock
),
131 static int dmatest_run_set(const char *val
, const struct kernel_param
*kp
);
132 static int dmatest_run_get(char *val
, const struct kernel_param
*kp
);
133 static const struct kernel_param_ops run_ops
= {
134 .set
= dmatest_run_set
,
135 .get
= dmatest_run_get
,
137 static bool dmatest_run
;
138 module_param_cb(run
, &run_ops
, &dmatest_run
, S_IRUGO
| S_IWUSR
);
139 MODULE_PARM_DESC(run
, "Run the test (default: false)");
141 /* Maximum amount of mismatched bytes in buffer to print */
142 #define MAX_ERROR_COUNT 32
145 * Initialization patterns. All bytes in the source buffer has bit 7
146 * set, all bytes in the destination buffer has bit 7 cleared.
148 * Bit 6 is set for all bytes which are to be copied by the DMA
149 * engine. Bit 5 is set for all bytes which are to be overwritten by
152 * The remaining bits are the inverse of a counter which increments by
153 * one for each byte address.
155 #define PATTERN_SRC 0x80
156 #define PATTERN_DST 0x00
157 #define PATTERN_COPY 0x40
158 #define PATTERN_OVERWRITE 0x20
159 #define PATTERN_COUNT_MASK 0x1f
161 /* poor man's completion - we want to use wait_event_freezable() on it */
162 struct dmatest_done
{
164 wait_queue_head_t
*wait
;
167 struct dmatest_thread
{
168 struct list_head node
;
169 struct dmatest_info
*info
;
170 struct task_struct
*task
;
171 struct dma_chan
*chan
;
174 enum dma_transaction_type type
;
175 wait_queue_head_t done_wait
;
176 struct dmatest_done test_done
;
180 struct dmatest_chan
{
181 struct list_head node
;
182 struct dma_chan
*chan
;
183 struct list_head threads
;
186 static DECLARE_WAIT_QUEUE_HEAD(thread_wait
);
189 static bool is_threaded_test_run(struct dmatest_info
*info
)
191 struct dmatest_chan
*dtc
;
193 list_for_each_entry(dtc
, &info
->channels
, node
) {
194 struct dmatest_thread
*thread
;
196 list_for_each_entry(thread
, &dtc
->threads
, node
) {
205 static int dmatest_wait_get(char *val
, const struct kernel_param
*kp
)
207 struct dmatest_info
*info
= &test_info
;
208 struct dmatest_params
*params
= &info
->params
;
210 if (params
->iterations
)
211 wait_event(thread_wait
, !is_threaded_test_run(info
));
213 return param_get_bool(val
, kp
);
216 static const struct kernel_param_ops wait_ops
= {
217 .get
= dmatest_wait_get
,
218 .set
= param_set_bool
,
220 module_param_cb(wait
, &wait_ops
, &wait
, S_IRUGO
);
221 MODULE_PARM_DESC(wait
, "Wait for tests to complete (default: false)");
223 static bool dmatest_match_channel(struct dmatest_params
*params
,
224 struct dma_chan
*chan
)
226 if (params
->channel
[0] == '\0')
228 return strcmp(dma_chan_name(chan
), params
->channel
) == 0;
231 static bool dmatest_match_device(struct dmatest_params
*params
,
232 struct dma_device
*device
)
234 if (params
->device
[0] == '\0')
236 return strcmp(dev_name(device
->dev
), params
->device
) == 0;
239 static unsigned long dmatest_random(void)
243 prandom_bytes(&buf
, sizeof(buf
));
247 static void dmatest_init_srcs(u8
**bufs
, unsigned int start
, unsigned int len
,
248 unsigned int buf_size
)
253 for (; (buf
= *bufs
); bufs
++) {
254 for (i
= 0; i
< start
; i
++)
255 buf
[i
] = PATTERN_SRC
| (~i
& PATTERN_COUNT_MASK
);
256 for ( ; i
< start
+ len
; i
++)
257 buf
[i
] = PATTERN_SRC
| PATTERN_COPY
258 | (~i
& PATTERN_COUNT_MASK
);
259 for ( ; i
< buf_size
; i
++)
260 buf
[i
] = PATTERN_SRC
| (~i
& PATTERN_COUNT_MASK
);
265 static void dmatest_init_dsts(u8
**bufs
, unsigned int start
, unsigned int len
,
266 unsigned int buf_size
)
271 for (; (buf
= *bufs
); bufs
++) {
272 for (i
= 0; i
< start
; i
++)
273 buf
[i
] = PATTERN_DST
| (~i
& PATTERN_COUNT_MASK
);
274 for ( ; i
< start
+ len
; i
++)
275 buf
[i
] = PATTERN_DST
| PATTERN_OVERWRITE
276 | (~i
& PATTERN_COUNT_MASK
);
277 for ( ; i
< buf_size
; i
++)
278 buf
[i
] = PATTERN_DST
| (~i
& PATTERN_COUNT_MASK
);
282 static void dmatest_mismatch(u8 actual
, u8 pattern
, unsigned int index
,
283 unsigned int counter
, bool is_srcbuf
)
285 u8 diff
= actual
^ pattern
;
286 u8 expected
= pattern
| (~counter
& PATTERN_COUNT_MASK
);
287 const char *thread_name
= current
->comm
;
290 pr_warn("%s: srcbuf[0x%x] overwritten! Expected %02x, got %02x\n",
291 thread_name
, index
, expected
, actual
);
292 else if ((pattern
& PATTERN_COPY
)
293 && (diff
& (PATTERN_COPY
| PATTERN_OVERWRITE
)))
294 pr_warn("%s: dstbuf[0x%x] not copied! Expected %02x, got %02x\n",
295 thread_name
, index
, expected
, actual
);
296 else if (diff
& PATTERN_SRC
)
297 pr_warn("%s: dstbuf[0x%x] was copied! Expected %02x, got %02x\n",
298 thread_name
, index
, expected
, actual
);
300 pr_warn("%s: dstbuf[0x%x] mismatch! Expected %02x, got %02x\n",
301 thread_name
, index
, expected
, actual
);
304 static unsigned int dmatest_verify(u8
**bufs
, unsigned int start
,
305 unsigned int end
, unsigned int counter
, u8 pattern
,
309 unsigned int error_count
= 0;
313 unsigned int counter_orig
= counter
;
315 for (; (buf
= *bufs
); bufs
++) {
316 counter
= counter_orig
;
317 for (i
= start
; i
< end
; i
++) {
319 expected
= pattern
| (~counter
& PATTERN_COUNT_MASK
);
320 if (actual
!= expected
) {
321 if (error_count
< MAX_ERROR_COUNT
)
322 dmatest_mismatch(actual
, pattern
, i
,
330 if (error_count
> MAX_ERROR_COUNT
)
331 pr_warn("%s: %u errors suppressed\n",
332 current
->comm
, error_count
- MAX_ERROR_COUNT
);
338 static void dmatest_callback(void *arg
)
340 struct dmatest_done
*done
= arg
;
341 struct dmatest_thread
*thread
=
342 container_of(done
, struct dmatest_thread
, test_done
);
345 wake_up_all(done
->wait
);
348 * If thread->done, it means that this callback occurred
349 * after the parent thread has cleaned up. This can
350 * happen in the case that driver doesn't implement
351 * the terminate_all() functionality and a dma operation
352 * did not occur within the timeout period
354 WARN(1, "dmatest: Kernel memory may be corrupted!!\n");
358 static unsigned int min_odd(unsigned int x
, unsigned int y
)
360 unsigned int val
= min(x
, y
);
362 return val
% 2 ? val
: val
- 1;
365 static void result(const char *err
, unsigned int n
, unsigned int src_off
,
366 unsigned int dst_off
, unsigned int len
, unsigned long data
)
368 pr_info("%s: result #%u: '%s' with src_off=0x%x dst_off=0x%x len=0x%x (%lu)\n",
369 current
->comm
, n
, err
, src_off
, dst_off
, len
, data
);
372 static void dbg_result(const char *err
, unsigned int n
, unsigned int src_off
,
373 unsigned int dst_off
, unsigned int len
,
376 pr_debug("%s: result #%u: '%s' with src_off=0x%x dst_off=0x%x len=0x%x (%lu)\n",
377 current
->comm
, n
, err
, src_off
, dst_off
, len
, data
);
380 #define verbose_result(err, n, src_off, dst_off, len, data) ({ \
382 result(err, n, src_off, dst_off, len, data); \
384 dbg_result(err, n, src_off, dst_off, len, data);\
387 static unsigned long long dmatest_persec(s64 runtime
, unsigned int val
)
389 unsigned long long per_sec
= 1000000;
394 /* drop precision until runtime is 32-bits */
395 while (runtime
> UINT_MAX
) {
401 do_div(per_sec
, runtime
);
405 static unsigned long long dmatest_KBs(s64 runtime
, unsigned long long len
)
407 return dmatest_persec(runtime
, len
>> 10);
411 * This function repeatedly tests DMA transfers of various lengths and
412 * offsets for a given operation type until it is told to exit by
413 * kthread_stop(). There may be multiple threads running this function
414 * in parallel for a single channel, and there may be multiple channels
415 * being tested in parallel.
417 * Before each test, the source and destination buffer is initialized
418 * with a known pattern. This pattern is different depending on
419 * whether it's in an area which is supposed to be copied or
420 * overwritten, and different in the source and destination buffers.
421 * So if the DMA engine doesn't copy exactly what we tell it to copy,
424 static int dmatest_func(void *data
)
426 struct dmatest_thread
*thread
= data
;
427 struct dmatest_done
*done
= &thread
->test_done
;
428 struct dmatest_info
*info
;
429 struct dmatest_params
*params
;
430 struct dma_chan
*chan
;
431 struct dma_device
*dev
;
432 unsigned int error_count
;
433 unsigned int failed_tests
= 0;
434 unsigned int total_tests
= 0;
436 enum dma_status status
;
437 enum dma_ctrl_flags flags
;
443 ktime_t ktime
, start
, diff
;
444 ktime_t filltime
= ktime_set(0, 0);
445 ktime_t comparetime
= ktime_set(0, 0);
447 unsigned long long total_len
= 0;
455 params
= &info
->params
;
458 if (thread
->type
== DMA_MEMCPY
)
459 src_cnt
= dst_cnt
= 1;
460 else if (thread
->type
== DMA_SG
)
461 src_cnt
= dst_cnt
= sg_buffers
;
462 else if (thread
->type
== DMA_XOR
) {
463 /* force odd to ensure dst = src */
464 src_cnt
= min_odd(params
->xor_sources
| 1, dev
->max_xor
);
466 } else if (thread
->type
== DMA_PQ
) {
467 /* force odd to ensure dst = src */
468 src_cnt
= min_odd(params
->pq_sources
| 1, dma_maxpq(dev
, 0));
471 pq_coefs
= kmalloc(params
->pq_sources
+1, GFP_KERNEL
);
473 goto err_thread_type
;
475 for (i
= 0; i
< src_cnt
; i
++)
478 goto err_thread_type
;
480 thread
->srcs
= kcalloc(src_cnt
+1, sizeof(u8
*), GFP_KERNEL
);
483 for (i
= 0; i
< src_cnt
; i
++) {
484 thread
->srcs
[i
] = kmalloc(params
->buf_size
, GFP_KERNEL
);
485 if (!thread
->srcs
[i
])
488 thread
->srcs
[i
] = NULL
;
490 thread
->dsts
= kcalloc(dst_cnt
+1, sizeof(u8
*), GFP_KERNEL
);
493 for (i
= 0; i
< dst_cnt
; i
++) {
494 thread
->dsts
[i
] = kmalloc(params
->buf_size
, GFP_KERNEL
);
495 if (!thread
->dsts
[i
])
498 thread
->dsts
[i
] = NULL
;
500 set_user_nice(current
, 10);
503 * src and dst buffers are freed by ourselves below
505 flags
= DMA_CTRL_ACK
| DMA_PREP_INTERRUPT
;
508 while (!kthread_should_stop()
509 && !(params
->iterations
&& total_tests
>= params
->iterations
)) {
510 struct dma_async_tx_descriptor
*tx
= NULL
;
511 struct dmaengine_unmap_data
*um
;
512 dma_addr_t srcs
[src_cnt
];
514 unsigned int src_off
, dst_off
, len
;
516 struct scatterlist tx_sg
[src_cnt
];
517 struct scatterlist rx_sg
[src_cnt
];
521 /* honor alignment restrictions */
522 if (thread
->type
== DMA_MEMCPY
|| thread
->type
== DMA_SG
)
523 align
= dev
->copy_align
;
524 else if (thread
->type
== DMA_XOR
)
525 align
= dev
->xor_align
;
526 else if (thread
->type
== DMA_PQ
)
527 align
= dev
->pq_align
;
529 if (1 << align
> params
->buf_size
) {
530 pr_err("%u-byte buffer too small for %d-byte alignment\n",
531 params
->buf_size
, 1 << align
);
535 if (params
->noverify
)
536 len
= params
->buf_size
;
538 len
= dmatest_random() % params
->buf_size
+ 1;
540 len
= (len
>> align
) << align
;
546 if (params
->noverify
) {
551 src_off
= dmatest_random() % (params
->buf_size
- len
+ 1);
552 dst_off
= dmatest_random() % (params
->buf_size
- len
+ 1);
554 src_off
= (src_off
>> align
) << align
;
555 dst_off
= (dst_off
>> align
) << align
;
557 dmatest_init_srcs(thread
->srcs
, src_off
, len
,
559 dmatest_init_dsts(thread
->dsts
, dst_off
, len
,
562 diff
= ktime_sub(ktime_get(), start
);
563 filltime
= ktime_add(filltime
, diff
);
566 um
= dmaengine_get_unmap_data(dev
->dev
, src_cnt
+dst_cnt
,
570 result("unmap data NULL", total_tests
,
571 src_off
, dst_off
, len
, ret
);
575 um
->len
= params
->buf_size
;
576 for (i
= 0; i
< src_cnt
; i
++) {
577 void *buf
= thread
->srcs
[i
];
578 struct page
*pg
= virt_to_page(buf
);
579 unsigned pg_off
= (unsigned long) buf
& ~PAGE_MASK
;
581 um
->addr
[i
] = dma_map_page(dev
->dev
, pg
, pg_off
,
582 um
->len
, DMA_TO_DEVICE
);
583 srcs
[i
] = um
->addr
[i
] + src_off
;
584 ret
= dma_mapping_error(dev
->dev
, um
->addr
[i
]);
586 dmaengine_unmap_put(um
);
587 result("src mapping error", total_tests
,
588 src_off
, dst_off
, len
, ret
);
594 /* map with DMA_BIDIRECTIONAL to force writeback/invalidate */
595 dsts
= &um
->addr
[src_cnt
];
596 for (i
= 0; i
< dst_cnt
; i
++) {
597 void *buf
= thread
->dsts
[i
];
598 struct page
*pg
= virt_to_page(buf
);
599 unsigned pg_off
= (unsigned long) buf
& ~PAGE_MASK
;
601 dsts
[i
] = dma_map_page(dev
->dev
, pg
, pg_off
, um
->len
,
603 ret
= dma_mapping_error(dev
->dev
, dsts
[i
]);
605 dmaengine_unmap_put(um
);
606 result("dst mapping error", total_tests
,
607 src_off
, dst_off
, len
, ret
);
614 sg_init_table(tx_sg
, src_cnt
);
615 sg_init_table(rx_sg
, src_cnt
);
616 for (i
= 0; i
< src_cnt
; i
++) {
617 sg_dma_address(&rx_sg
[i
]) = srcs
[i
];
618 sg_dma_address(&tx_sg
[i
]) = dsts
[i
] + dst_off
;
619 sg_dma_len(&tx_sg
[i
]) = len
;
620 sg_dma_len(&rx_sg
[i
]) = len
;
623 if (thread
->type
== DMA_MEMCPY
)
624 tx
= dev
->device_prep_dma_memcpy(chan
,
626 srcs
[0], len
, flags
);
627 else if (thread
->type
== DMA_SG
)
628 tx
= dev
->device_prep_dma_sg(chan
, tx_sg
, src_cnt
,
629 rx_sg
, src_cnt
, flags
);
630 else if (thread
->type
== DMA_XOR
)
631 tx
= dev
->device_prep_dma_xor(chan
,
635 else if (thread
->type
== DMA_PQ
) {
636 dma_addr_t dma_pq
[dst_cnt
];
638 for (i
= 0; i
< dst_cnt
; i
++)
639 dma_pq
[i
] = dsts
[i
] + dst_off
;
640 tx
= dev
->device_prep_dma_pq(chan
, dma_pq
, srcs
,
646 dmaengine_unmap_put(um
);
647 result("prep error", total_tests
, src_off
,
655 tx
->callback
= dmatest_callback
;
656 tx
->callback_param
= done
;
657 cookie
= tx
->tx_submit(tx
);
659 if (dma_submit_error(cookie
)) {
660 dmaengine_unmap_put(um
);
661 result("submit error", total_tests
, src_off
,
667 dma_async_issue_pending(chan
);
669 wait_event_freezable_timeout(thread
->done_wait
, done
->done
,
670 msecs_to_jiffies(params
->timeout
));
672 status
= dma_async_is_tx_complete(chan
, cookie
, NULL
, NULL
);
675 dmaengine_unmap_put(um
);
676 result("test timed out", total_tests
, src_off
, dst_off
,
680 } else if (status
!= DMA_COMPLETE
) {
681 dmaengine_unmap_put(um
);
682 result(status
== DMA_ERROR
?
683 "completion error status" :
684 "completion busy status", total_tests
, src_off
,
690 dmaengine_unmap_put(um
);
692 if (params
->noverify
) {
693 verbose_result("test passed", total_tests
, src_off
,
699 pr_debug("%s: verifying source buffer...\n", current
->comm
);
700 error_count
= dmatest_verify(thread
->srcs
, 0, src_off
,
701 0, PATTERN_SRC
, true);
702 error_count
+= dmatest_verify(thread
->srcs
, src_off
,
703 src_off
+ len
, src_off
,
704 PATTERN_SRC
| PATTERN_COPY
, true);
705 error_count
+= dmatest_verify(thread
->srcs
, src_off
+ len
,
706 params
->buf_size
, src_off
+ len
,
709 pr_debug("%s: verifying dest buffer...\n", current
->comm
);
710 error_count
+= dmatest_verify(thread
->dsts
, 0, dst_off
,
711 0, PATTERN_DST
, false);
712 error_count
+= dmatest_verify(thread
->dsts
, dst_off
,
713 dst_off
+ len
, src_off
,
714 PATTERN_SRC
| PATTERN_COPY
, false);
715 error_count
+= dmatest_verify(thread
->dsts
, dst_off
+ len
,
716 params
->buf_size
, dst_off
+ len
,
719 diff
= ktime_sub(ktime_get(), start
);
720 comparetime
= ktime_add(comparetime
, diff
);
723 result("data error", total_tests
, src_off
, dst_off
,
727 verbose_result("test passed", total_tests
, src_off
,
731 ktime
= ktime_sub(ktime_get(), ktime
);
732 ktime
= ktime_sub(ktime
, comparetime
);
733 ktime
= ktime_sub(ktime
, filltime
);
734 runtime
= ktime_to_us(ktime
);
738 for (i
= 0; thread
->dsts
[i
]; i
++)
739 kfree(thread
->dsts
[i
]);
743 for (i
= 0; thread
->srcs
[i
]; i
++)
744 kfree(thread
->srcs
[i
]);
749 pr_info("%s: summary %u tests, %u failures %llu iops %llu KB/s (%d)\n",
750 current
->comm
, total_tests
, failed_tests
,
751 dmatest_persec(runtime
, total_tests
),
752 dmatest_KBs(runtime
, total_len
), ret
);
754 /* terminate all transfers on specified channels */
755 if (ret
|| failed_tests
)
756 dmaengine_terminate_all(chan
);
759 wake_up(&thread_wait
);
764 static void dmatest_cleanup_channel(struct dmatest_chan
*dtc
)
766 struct dmatest_thread
*thread
;
767 struct dmatest_thread
*_thread
;
770 list_for_each_entry_safe(thread
, _thread
, &dtc
->threads
, node
) {
771 ret
= kthread_stop(thread
->task
);
772 pr_debug("thread %s exited with status %d\n",
773 thread
->task
->comm
, ret
);
774 list_del(&thread
->node
);
775 put_task_struct(thread
->task
);
779 /* terminate all transfers on specified channels */
780 dmaengine_terminate_all(dtc
->chan
);
785 static int dmatest_add_threads(struct dmatest_info
*info
,
786 struct dmatest_chan
*dtc
, enum dma_transaction_type type
)
788 struct dmatest_params
*params
= &info
->params
;
789 struct dmatest_thread
*thread
;
790 struct dma_chan
*chan
= dtc
->chan
;
794 if (type
== DMA_MEMCPY
)
796 else if (type
== DMA_SG
)
798 else if (type
== DMA_XOR
)
800 else if (type
== DMA_PQ
)
805 for (i
= 0; i
< params
->threads_per_chan
; i
++) {
806 thread
= kzalloc(sizeof(struct dmatest_thread
), GFP_KERNEL
);
808 pr_warn("No memory for %s-%s%u\n",
809 dma_chan_name(chan
), op
, i
);
813 thread
->chan
= dtc
->chan
;
815 thread
->test_done
.wait
= &thread
->done_wait
;
816 init_waitqueue_head(&thread
->done_wait
);
818 thread
->task
= kthread_create(dmatest_func
, thread
, "%s-%s%u",
819 dma_chan_name(chan
), op
, i
);
820 if (IS_ERR(thread
->task
)) {
821 pr_warn("Failed to create thread %s-%s%u\n",
822 dma_chan_name(chan
), op
, i
);
827 /* srcbuf and dstbuf are allocated by the thread itself */
828 get_task_struct(thread
->task
);
829 list_add_tail(&thread
->node
, &dtc
->threads
);
830 wake_up_process(thread
->task
);
836 static int dmatest_add_channel(struct dmatest_info
*info
,
837 struct dma_chan
*chan
)
839 struct dmatest_chan
*dtc
;
840 struct dma_device
*dma_dev
= chan
->device
;
841 unsigned int thread_count
= 0;
844 dtc
= kmalloc(sizeof(struct dmatest_chan
), GFP_KERNEL
);
846 pr_warn("No memory for %s\n", dma_chan_name(chan
));
851 INIT_LIST_HEAD(&dtc
->threads
);
853 if (dma_has_cap(DMA_MEMCPY
, dma_dev
->cap_mask
)) {
855 cnt
= dmatest_add_threads(info
, dtc
, DMA_MEMCPY
);
856 thread_count
+= cnt
> 0 ? cnt
: 0;
860 if (dma_has_cap(DMA_SG
, dma_dev
->cap_mask
)) {
862 cnt
= dmatest_add_threads(info
, dtc
, DMA_SG
);
863 thread_count
+= cnt
> 0 ? cnt
: 0;
867 if (dma_has_cap(DMA_XOR
, dma_dev
->cap_mask
)) {
868 cnt
= dmatest_add_threads(info
, dtc
, DMA_XOR
);
869 thread_count
+= cnt
> 0 ? cnt
: 0;
871 if (dma_has_cap(DMA_PQ
, dma_dev
->cap_mask
)) {
872 cnt
= dmatest_add_threads(info
, dtc
, DMA_PQ
);
873 thread_count
+= cnt
> 0 ? cnt
: 0;
876 pr_info("Started %u threads using %s\n",
877 thread_count
, dma_chan_name(chan
));
879 list_add_tail(&dtc
->node
, &info
->channels
);
885 static bool filter(struct dma_chan
*chan
, void *param
)
887 struct dmatest_params
*params
= param
;
889 if (!dmatest_match_channel(params
, chan
) ||
890 !dmatest_match_device(params
, chan
->device
))
896 static void request_channels(struct dmatest_info
*info
,
897 enum dma_transaction_type type
)
902 dma_cap_set(type
, mask
);
904 struct dmatest_params
*params
= &info
->params
;
905 struct dma_chan
*chan
;
907 chan
= dma_request_channel(mask
, filter
, params
);
909 if (dmatest_add_channel(info
, chan
)) {
910 dma_release_channel(chan
);
911 break; /* add_channel failed, punt */
914 break; /* no more channels available */
915 if (params
->max_channels
&&
916 info
->nr_channels
>= params
->max_channels
)
917 break; /* we have all we need */
921 static void run_threaded_test(struct dmatest_info
*info
)
923 struct dmatest_params
*params
= &info
->params
;
925 /* Copy test parameters */
926 params
->buf_size
= test_buf_size
;
927 strlcpy(params
->channel
, strim(test_channel
), sizeof(params
->channel
));
928 strlcpy(params
->device
, strim(test_device
), sizeof(params
->device
));
929 params
->threads_per_chan
= threads_per_chan
;
930 params
->max_channels
= max_channels
;
931 params
->iterations
= iterations
;
932 params
->xor_sources
= xor_sources
;
933 params
->pq_sources
= pq_sources
;
934 params
->timeout
= timeout
;
935 params
->noverify
= noverify
;
937 request_channels(info
, DMA_MEMCPY
);
938 request_channels(info
, DMA_XOR
);
939 request_channels(info
, DMA_SG
);
940 request_channels(info
, DMA_PQ
);
943 static void stop_threaded_test(struct dmatest_info
*info
)
945 struct dmatest_chan
*dtc
, *_dtc
;
946 struct dma_chan
*chan
;
948 list_for_each_entry_safe(dtc
, _dtc
, &info
->channels
, node
) {
949 list_del(&dtc
->node
);
951 dmatest_cleanup_channel(dtc
);
952 pr_debug("dropped channel %s\n", dma_chan_name(chan
));
953 dma_release_channel(chan
);
956 info
->nr_channels
= 0;
959 static void restart_threaded_test(struct dmatest_info
*info
, bool run
)
961 /* we might be called early to set run=, defer running until all
962 * parameters have been evaluated
967 /* Stop any running test first */
968 stop_threaded_test(info
);
970 /* Run test with new parameters */
971 run_threaded_test(info
);
974 static int dmatest_run_get(char *val
, const struct kernel_param
*kp
)
976 struct dmatest_info
*info
= &test_info
;
978 mutex_lock(&info
->lock
);
979 if (is_threaded_test_run(info
)) {
982 stop_threaded_test(info
);
985 mutex_unlock(&info
->lock
);
987 return param_get_bool(val
, kp
);
990 static int dmatest_run_set(const char *val
, const struct kernel_param
*kp
)
992 struct dmatest_info
*info
= &test_info
;
995 mutex_lock(&info
->lock
);
996 ret
= param_set_bool(val
, kp
);
998 mutex_unlock(&info
->lock
);
1002 if (is_threaded_test_run(info
))
1004 else if (dmatest_run
)
1005 restart_threaded_test(info
, dmatest_run
);
1007 mutex_unlock(&info
->lock
);
1012 static int __init
dmatest_init(void)
1014 struct dmatest_info
*info
= &test_info
;
1015 struct dmatest_params
*params
= &info
->params
;
1018 mutex_lock(&info
->lock
);
1019 run_threaded_test(info
);
1020 mutex_unlock(&info
->lock
);
1023 if (params
->iterations
&& wait
)
1024 wait_event(thread_wait
, !is_threaded_test_run(info
));
1026 /* module parameters are stable, inittime tests are started,
1027 * let userspace take over 'run' control
1029 info
->did_init
= true;
1033 /* when compiled-in wait for drivers to load first */
1034 late_initcall(dmatest_init
);
1036 static void __exit
dmatest_exit(void)
1038 struct dmatest_info
*info
= &test_info
;
1040 mutex_lock(&info
->lock
);
1041 stop_threaded_test(info
);
1042 mutex_unlock(&info
->lock
);
1044 module_exit(dmatest_exit
);
1046 MODULE_AUTHOR("Haavard Skinnemoen (Atmel)");
1047 MODULE_LICENSE("GPL v2");