drivers/hwmon/jc42.c

   1 /*
   2  * jc42.c - driver for Jedec JC42.4 compliant temperature sensors
   3  *
   4  * Copyright (c) 2010  Ericsson AB.
   5  *
   6  * Derived from lm77.c by Andras BALI <drewie@freemail.hu>.
   7  *
   8  * JC42.4 compliant temperature sensors are typically used on memory modules.
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License as published by
  12  * the Free Software Foundation; either version 2 of the License, or
  13  * (at your option) any later version.
  14  *
  15  * This program is distributed in the hope that it will be useful,
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18  * GNU General Public License for more details.
  19  *
  20  * You should have received a copy of the GNU General Public License
  21  * along with this program; if not, write to the Free Software
  22  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  23  */
  24
  25 #include <linux/bitops.h>
  26 #include <linux/module.h>
  27 #include <linux/init.h>
  28 #include <linux/slab.h>
  29 #include <linux/jiffies.h>
  30 #include <linux/i2c.h>
  31 #include <linux/hwmon.h>
  32 #include <linux/err.h>
  33 #include <linux/mutex.h>
  34 #include <linux/of.h>
  35
  36 /* Addresses to scan */
  37 static const unsigned short normal_i2c[] = {
  38         0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f, I2C_CLIENT_END };
  39
  40 /* JC42 registers. All registers are 16 bit. */
  41 #define JC42_REG_CAP            0x00
  42 #define JC42_REG_CONFIG         0x01
  43 #define JC42_REG_TEMP_UPPER     0x02
  44 #define JC42_REG_TEMP_LOWER     0x03
  45 #define JC42_REG_TEMP_CRITICAL  0x04
  46 #define JC42_REG_TEMP           0x05
  47 #define JC42_REG_MANID          0x06
  48 #define JC42_REG_DEVICEID       0x07
  49 #define JC42_REG_SMBUS          0x22 /* NXP and Atmel, possibly others? */
  50
  51 /* Status bits in temperature register */
  52 #define JC42_ALARM_CRIT_BIT     15
  53 #define JC42_ALARM_MAX_BIT      14
  54 #define JC42_ALARM_MIN_BIT      13
  55
  56 /* Configuration register defines */
  57 #define JC42_CFG_CRIT_ONLY      (1 << 2)
  58 #define JC42_CFG_TCRIT_LOCK     (1 << 6)
  59 #define JC42_CFG_EVENT_LOCK     (1 << 7)
  60 #define JC42_CFG_SHUTDOWN       (1 << 8)
  61 #define JC42_CFG_HYST_SHIFT     9
  62 #define JC42_CFG_HYST_MASK      (0x03 << 9)
  63
  64 /* Capabilities */
  65 #define JC42_CAP_RANGE          (1 << 2)
  66
  67 /* Manufacturer IDs */
  68 #define ADT_MANID               0x11d4  /* Analog Devices */
  69 #define ATMEL_MANID             0x001f  /* Atmel */
  70 #define ATMEL_MANID2            0x1114  /* Atmel */
  71 #define MAX_MANID               0x004d  /* Maxim */
  72 #define IDT_MANID               0x00b3  /* IDT */
  73 #define MCP_MANID               0x0054  /* Microchip */
  74 #define NXP_MANID               0x1131  /* NXP Semiconductors */
  75 #define ONS_MANID               0x1b09  /* ON Semiconductor */
  76 #define STM_MANID               0x104a  /* ST Microelectronics */
  77
  78 /* SMBUS register */
  79 #define SMBUS_STMOUT            BIT(7)  /* SMBus time-out, active low */
  80
  81 /* Supported chips */
  82
  83 /* Analog Devices */
  84 #define ADT7408_DEVID           0x0801
  85 #define ADT7408_DEVID_MASK      0xffff
  86
  87 /* Atmel */
  88 #define AT30TS00_DEVID          0x8201
  89 #define AT30TS00_DEVID_MASK     0xffff
  90
  91 #define AT30TSE004_DEVID        0x2200
  92 #define AT30TSE004_DEVID_MASK   0xffff
  93
  94 /* IDT */
  95 #define TSE2004_DEVID           0x2200
  96 #define TSE2004_DEVID_MASK      0xff00
  97
  98 #define TS3000_DEVID            0x2900  /* Also matches TSE2002 */
  99 #define TS3000_DEVID_MASK       0xff00
 100
 101 #define TS3001_DEVID            0x3000
 102 #define TS3001_DEVID_MASK       0xff00
 103
 104 /* Maxim */
 105 #define MAX6604_DEVID           0x3e00
 106 #define MAX6604_DEVID_MASK      0xffff
 107
 108 /* Microchip */
 109 #define MCP9804_DEVID           0x0200
 110 #define MCP9804_DEVID_MASK      0xfffc
 111
 112 #define MCP9808_DEVID           0x0400
 113 #define MCP9808_DEVID_MASK      0xfffc
 114
 115 #define MCP98242_DEVID          0x2000
 116 #define MCP98242_DEVID_MASK     0xfffc
 117
 118 #define MCP98243_DEVID          0x2100
 119 #define MCP98243_DEVID_MASK     0xfffc
 120
 121 #define MCP98244_DEVID          0x2200
 122 #define MCP98244_DEVID_MASK     0xfffc
 123
 124 #define MCP9843_DEVID           0x0000  /* Also matches mcp9805 */
 125 #define MCP9843_DEVID_MASK      0xfffe
 126
 127 /* NXP */
 128 #define SE97_DEVID              0xa200
 129 #define SE97_DEVID_MASK         0xfffc
 130
 131 #define SE98_DEVID              0xa100
 132 #define SE98_DEVID_MASK         0xfffc
 133
 134 /* ON Semiconductor */
 135 #define CAT6095_DEVID           0x0800  /* Also matches CAT34TS02 */
 136 #define CAT6095_DEVID_MASK      0xffe0
 137
 138 /* ST Microelectronics */
 139 #define STTS424_DEVID           0x0101
 140 #define STTS424_DEVID_MASK      0xffff
 141
 142 #define STTS424E_DEVID          0x0000
 143 #define STTS424E_DEVID_MASK     0xfffe
 144
 145 #define STTS2002_DEVID          0x0300
 146 #define STTS2002_DEVID_MASK     0xffff
 147
 148 #define STTS2004_DEVID          0x2201
 149 #define STTS2004_DEVID_MASK     0xffff
 150
 151 #define STTS3000_DEVID          0x0200
 152 #define STTS3000_DEVID_MASK     0xffff
 153
 154 static u16 jc42_hysteresis[] = { 0, 1500, 3000, 6000 };
 155
 156 struct jc42_chips {
 157         u16 manid;
 158         u16 devid;
 159         u16 devid_mask;
 160 };
 161
 162 static struct jc42_chips jc42_chips[] = {
 163         { ADT_MANID, ADT7408_DEVID, ADT7408_DEVID_MASK },
 164         { ATMEL_MANID, AT30TS00_DEVID, AT30TS00_DEVID_MASK },
 165         { ATMEL_MANID2, AT30TSE004_DEVID, AT30TSE004_DEVID_MASK },
 166         { IDT_MANID, TSE2004_DEVID, TSE2004_DEVID_MASK },
 167         { IDT_MANID, TS3000_DEVID, TS3000_DEVID_MASK },
 168         { IDT_MANID, TS3001_DEVID, TS3001_DEVID_MASK },
 169         { MAX_MANID, MAX6604_DEVID, MAX6604_DEVID_MASK },
 170         { MCP_MANID, MCP9804_DEVID, MCP9804_DEVID_MASK },
 171         { MCP_MANID, MCP9808_DEVID, MCP9808_DEVID_MASK },
 172         { MCP_MANID, MCP98242_DEVID, MCP98242_DEVID_MASK },
 173         { MCP_MANID, MCP98243_DEVID, MCP98243_DEVID_MASK },
 174         { MCP_MANID, MCP98244_DEVID, MCP98244_DEVID_MASK },
 175         { MCP_MANID, MCP9843_DEVID, MCP9843_DEVID_MASK },
 176         { NXP_MANID, SE97_DEVID, SE97_DEVID_MASK },
 177         { ONS_MANID, CAT6095_DEVID, CAT6095_DEVID_MASK },
 178         { NXP_MANID, SE98_DEVID, SE98_DEVID_MASK },
 179         { STM_MANID, STTS424_DEVID, STTS424_DEVID_MASK },
 180         { STM_MANID, STTS424E_DEVID, STTS424E_DEVID_MASK },
 181         { STM_MANID, STTS2002_DEVID, STTS2002_DEVID_MASK },
 182         { STM_MANID, STTS2004_DEVID, STTS2004_DEVID_MASK },
 183         { STM_MANID, STTS3000_DEVID, STTS3000_DEVID_MASK },
 184 };
 185
 186 enum temp_index {
 187         t_input = 0,
 188         t_crit,
 189         t_min,
 190         t_max,
 191         t_num_temp
 192 };
 193
 194 static const u8 temp_regs[t_num_temp] = {
 195         [t_input] = JC42_REG_TEMP,
 196         [t_crit] = JC42_REG_TEMP_CRITICAL,
 197         [t_min] = JC42_REG_TEMP_LOWER,
 198         [t_max] = JC42_REG_TEMP_UPPER,
 199 };
 200
 201 /* Each client has this additional data */
 202 struct jc42_data {
 203         struct i2c_client *client;
 204         struct mutex    update_lock;    /* protect register access */
 205         bool            extended;       /* true if extended range supported */
 206         bool            valid;
 207         unsigned long   last_updated;   /* In jiffies */
 208         u16             orig_config;    /* original configuration */
 209         u16             config;         /* current configuration */
 210         u16             temp[t_num_temp];/* Temperatures */
 211 };
 212
 213 #define JC42_TEMP_MIN_EXTENDED  (-40000)
 214 #define JC42_TEMP_MIN           0
 215 #define JC42_TEMP_MAX           125000
 216
 217 static u16 jc42_temp_to_reg(long temp, bool extended)
 218 {
 219         int ntemp = clamp_val(temp,
 220                               extended ? JC42_TEMP_MIN_EXTENDED :
 221                               JC42_TEMP_MIN, JC42_TEMP_MAX);
 222
 223         /* convert from 0.001 to 0.0625 resolution */
 224         return (ntemp * 2 / 125) & 0x1fff;
 225 }
 226
 227 static int jc42_temp_from_reg(s16 reg)
 228 {
 229         reg = sign_extend32(reg, 12);
 230
 231         /* convert from 0.0625 to 0.001 resolution */
 232         return reg * 125 / 2;
 233 }
 234
 235 static struct jc42_data *jc42_update_device(struct device *dev)
 236 {
 237         struct jc42_data *data = dev_get_drvdata(dev);
 238         struct i2c_client *client = data->client;
 239         struct jc42_data *ret = data;
 240         int i, val;
 241
 242         mutex_lock(&data->update_lock);
 243
 244         if (time_after(jiffies, data->last_updated + HZ) || !data->valid) {
 245                 for (i = 0; i < t_num_temp; i++) {
 246                         val = i2c_smbus_read_word_swapped(client, temp_regs[i]);
 247                         if (val < 0) {
 248                                 ret = ERR_PTR(val);
 249                                 goto abort;
 250                         }
 251                         data->temp[i] = val;
 252                 }
 253                 data->last_updated = jiffies;
 254                 data->valid = true;
 255         }
 256 abort:
 257         mutex_unlock(&data->update_lock);
 258         return ret;
 259 }
 260
 261 static int jc42_read(struct device *dev, enum hwmon_sensor_types type,
 262                      u32 attr, int channel, long *val)
 263 {
 264         struct jc42_data *data = jc42_update_device(dev);
 265         int temp, hyst;
 266
 267         if (IS_ERR(data))
 268                 return PTR_ERR(data);
 269
 270         switch (attr) {
 271         case hwmon_temp_input:
 272                 *val = jc42_temp_from_reg(data->temp[t_input]);
 273                 return 0;
 274         case hwmon_temp_min:
 275                 *val = jc42_temp_from_reg(data->temp[t_min]);
 276                 return 0;
 277         case hwmon_temp_max:
 278                 *val = jc42_temp_from_reg(data->temp[t_max]);
 279                 return 0;
 280         case hwmon_temp_crit:
 281                 *val = jc42_temp_from_reg(data->temp[t_crit]);
 282                 return 0;
 283         case hwmon_temp_max_hyst:
 284                 temp = jc42_temp_from_reg(data->temp[t_max]);
 285                 hyst = jc42_hysteresis[(data->config & JC42_CFG_HYST_MASK)
 286                                                 >> JC42_CFG_HYST_SHIFT];
 287                 *val = temp - hyst;
 288                 return 0;
 289         case hwmon_temp_crit_hyst:
 290                 temp = jc42_temp_from_reg(data->temp[t_crit]);
 291                 hyst = jc42_hysteresis[(data->config & JC42_CFG_HYST_MASK)
 292                                                 >> JC42_CFG_HYST_SHIFT];
 293                 *val = temp - hyst;
 294                 return 0;
 295         case hwmon_temp_min_alarm:
 296                 *val = (data->temp[t_input] >> JC42_ALARM_MIN_BIT) & 1;
 297                 return 0;
 298         case hwmon_temp_max_alarm:
 299                 *val = (data->temp[t_input] >> JC42_ALARM_MAX_BIT) & 1;
 300                 return 0;
 301         case hwmon_temp_crit_alarm:
 302                 *val = (data->temp[t_input] >> JC42_ALARM_CRIT_BIT) & 1;
 303                 return 0;
 304         default:
 305                 return -EOPNOTSUPP;
 306         }
 307 }
 308
 309 static int jc42_write(struct device *dev, enum hwmon_sensor_types type,
 310                       u32 attr, int channel, long val)
 311 {
 312         struct jc42_data *data = dev_get_drvdata(dev);
 313         struct i2c_client *client = data->client;
 314         int diff, hyst;
 315         int ret;
 316
 317         mutex_lock(&data->update_lock);
 318
 319         switch (attr) {
 320         case hwmon_temp_min:
 321                 data->temp[t_min] = jc42_temp_to_reg(val, data->extended);
 322                 ret = i2c_smbus_write_word_swapped(client, temp_regs[t_min],
 323                                                    data->temp[t_min]);
 324                 break;
 325         case hwmon_temp_max:
 326                 data->temp[t_max] = jc42_temp_to_reg(val, data->extended);
 327                 ret = i2c_smbus_write_word_swapped(client, temp_regs[t_max],
 328                                                    data->temp[t_max]);
 329                 break;
 330         case hwmon_temp_crit:
 331                 data->temp[t_crit] = jc42_temp_to_reg(val, data->extended);
 332                 ret = i2c_smbus_write_word_swapped(client, temp_regs[t_crit],
 333                                                    data->temp[t_crit]);
 334                 break;
 335         case hwmon_temp_crit_hyst:
 336                 /*
 337                  * JC42.4 compliant chips only support four hysteresis values.
 338                  * Pick best choice and go from there.
 339                  */
 340                 val = clamp_val(val, (data->extended ? JC42_TEMP_MIN_EXTENDED
 341                                                      : JC42_TEMP_MIN) - 6000,
 342                                 JC42_TEMP_MAX);
 343                 diff = jc42_temp_from_reg(data->temp[t_crit]) - val;
 344                 hyst = 0;
 345                 if (diff > 0) {
 346                         if (diff < 2250)
 347                                 hyst = 1;       /* 1.5 degrees C */
 348                         else if (diff < 4500)
 349                                 hyst = 2;       /* 3.0 degrees C */
 350                         else
 351                                 hyst = 3;       /* 6.0 degrees C */
 352                 }
 353                 data->config = (data->config & ~JC42_CFG_HYST_MASK) |
 354                                 (hyst << JC42_CFG_HYST_SHIFT);
 355                 ret = i2c_smbus_write_word_swapped(data->client,
 356                                                    JC42_REG_CONFIG,
 357                                                    data->config);
 358                 break;
 359         default:
 360                 ret = -EOPNOTSUPP;
 361                 break;
 362         }
 363
 364         mutex_unlock(&data->update_lock);
 365
 366         return ret;
 367 }
 368
 369 static umode_t jc42_is_visible(const void *_data, enum hwmon_sensor_types type,
 370                                u32 attr, int channel)
 371 {
 372         const struct jc42_data *data = _data;
 373         unsigned int config = data->config;
 374         umode_t mode = S_IRUGO;
 375
 376         switch (attr) {
 377         case hwmon_temp_min:
 378         case hwmon_temp_max:
 379                 if (!(config & JC42_CFG_EVENT_LOCK))
 380                         mode |= S_IWUSR;
 381                 break;
 382         case hwmon_temp_crit:
 383                 if (!(config & JC42_CFG_TCRIT_LOCK))
 384                         mode |= S_IWUSR;
 385                 break;
 386         case hwmon_temp_crit_hyst:
 387                 if (!(config & (JC42_CFG_EVENT_LOCK | JC42_CFG_TCRIT_LOCK)))
 388                         mode |= S_IWUSR;
 389                 break;
 390         case hwmon_temp_input:
 391         case hwmon_temp_max_hyst:
 392         case hwmon_temp_min_alarm:
 393         case hwmon_temp_max_alarm:
 394         case hwmon_temp_crit_alarm:
 395                 break;
 396         default:
 397                 mode = 0;
 398                 break;
 399         }
 400         return mode;
 401 }
 402
 403 /* Return 0 if detection is successful, -ENODEV otherwise */
 404 static int jc42_detect(struct i2c_client *client, struct i2c_board_info *info)
 405 {
 406         struct i2c_adapter *adapter = client->adapter;
 407         int i, config, cap, manid, devid;
 408
 409         if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA |
 410                                      I2C_FUNC_SMBUS_WORD_DATA))
 411                 return -ENODEV;
 412
 413         cap = i2c_smbus_read_word_swapped(client, JC42_REG_CAP);
 414         config = i2c_smbus_read_word_swapped(client, JC42_REG_CONFIG);
 415         manid = i2c_smbus_read_word_swapped(client, JC42_REG_MANID);
 416         devid = i2c_smbus_read_word_swapped(client, JC42_REG_DEVICEID);
 417
 418         if (cap < 0 || config < 0 || manid < 0 || devid < 0)
 419                 return -ENODEV;
 420
 421         if ((cap & 0xff00) || (config & 0xf800))
 422                 return -ENODEV;
 423
 424         for (i = 0; i < ARRAY_SIZE(jc42_chips); i++) {
 425                 struct jc42_chips *chip = &jc42_chips[i];
 426                 if (manid == chip->manid &&
 427                     (devid & chip->devid_mask) == chip->devid) {
 428                         strlcpy(info->type, "jc42", I2C_NAME_SIZE);
 429                         return 0;
 430                 }
 431         }
 432         return -ENODEV;
 433 }
 434
 435 static const u32 jc42_temp_config[] = {
 436         HWMON_T_INPUT | HWMON_T_MIN | HWMON_T_MAX | HWMON_T_CRIT |
 437         HWMON_T_MAX_HYST | HWMON_T_CRIT_HYST |
 438         HWMON_T_MIN_ALARM | HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM,
 439         0
 440 };
 441
 442 static const struct hwmon_channel_info jc42_temp = {
 443         .type = hwmon_temp,
 444         .config = jc42_temp_config,
 445 };
 446
 447 static const struct hwmon_channel_info *jc42_info[] = {
 448         &jc42_temp,
 449         NULL
 450 };
 451
 452 static const struct hwmon_ops jc42_hwmon_ops = {
 453         .is_visible = jc42_is_visible,
 454         .read = jc42_read,
 455         .write = jc42_write,
 456 };
 457
 458 static const struct hwmon_chip_info jc42_chip_info = {
 459         .ops = &jc42_hwmon_ops,
 460         .info = jc42_info,
 461 };
 462
 463 static int jc42_probe(struct i2c_client *client, const struct i2c_device_id *id)
 464 {
 465         struct device *dev = &client->dev;
 466         struct device *hwmon_dev;
 467         struct jc42_data *data;
 468         int config, cap;
 469
 470         data = devm_kzalloc(dev, sizeof(struct jc42_data), GFP_KERNEL);
 471         if (!data)
 472                 return -ENOMEM;
 473
 474         data->client = client;
 475         i2c_set_clientdata(client, data);
 476         mutex_init(&data->update_lock);
 477
 478         cap = i2c_smbus_read_word_swapped(client, JC42_REG_CAP);
 479         if (cap < 0)
 480                 return cap;
 481
 482         data->extended = !!(cap & JC42_CAP_RANGE);
 483
 484         if (device_property_read_bool(dev, "smbus-timeout-disable")) {
 485                 int smbus;
 486
 487                 /*
 488                  * Not all chips support this register, but from a
 489                  * quick read of various datasheets no chip appears
 490                  * incompatible with the below attempt to disable
 491                  * the timeout. And the whole thing is opt-in...
 492                  */
 493                 smbus = i2c_smbus_read_word_swapped(client, JC42_REG_SMBUS);
 494                 if (smbus < 0)
 495                         return smbus;
 496                 i2c_smbus_write_word_swapped(client, JC42_REG_SMBUS,
 497                                              smbus | SMBUS_STMOUT);
 498         }
 499
 500         config = i2c_smbus_read_word_swapped(client, JC42_REG_CONFIG);
 501         if (config < 0)
 502                 return config;
 503
 504         data->orig_config = config;
 505         if (config & JC42_CFG_SHUTDOWN) {
 506                 config &= ~JC42_CFG_SHUTDOWN;
 507                 i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG, config);
 508         }
 509         data->config = config;
 510
 511         hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
 512                                                          data, &jc42_chip_info,
 513                                                          NULL);
 514         return PTR_ERR_OR_ZERO(hwmon_dev);
 515 }
 516
 517 static int jc42_remove(struct i2c_client *client)
 518 {
 519         struct jc42_data *data = i2c_get_clientdata(client);
 520
 521         /* Restore original configuration except hysteresis */
 522         if ((data->config & ~JC42_CFG_HYST_MASK) !=
 523             (data->orig_config & ~JC42_CFG_HYST_MASK)) {
 524                 int config;
 525
 526                 config = (data->orig_config & ~JC42_CFG_HYST_MASK)
 527                   | (data->config & JC42_CFG_HYST_MASK);
 528                 i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG, config);
 529         }
 530         return 0;
 531 }
 532
 533 #ifdef CONFIG_PM
 534
 535 static int jc42_suspend(struct device *dev)
 536 {
 537         struct jc42_data *data = dev_get_drvdata(dev);
 538
 539         data->config |= JC42_CFG_SHUTDOWN;
 540         i2c_smbus_write_word_swapped(data->client, JC42_REG_CONFIG,
 541                                      data->config);
 542         return 0;
 543 }
 544
 545 static int jc42_resume(struct device *dev)
 546 {
 547         struct jc42_data *data = dev_get_drvdata(dev);
 548
 549         data->config &= ~JC42_CFG_SHUTDOWN;
 550         i2c_smbus_write_word_swapped(data->client, JC42_REG_CONFIG,
 551                                      data->config);
 552         return 0;
 553 }
 554
 555 static const struct dev_pm_ops jc42_dev_pm_ops = {
 556         .suspend = jc42_suspend,
 557         .resume = jc42_resume,
 558 };
 559
 560 #define JC42_DEV_PM_OPS (&jc42_dev_pm_ops)
 561 #else
 562 #define JC42_DEV_PM_OPS NULL
 563 #endif /* CONFIG_PM */
 564
 565 static const struct i2c_device_id jc42_id[] = {
 566         { "jc42", 0 },
 567         { }
 568 };
 569 MODULE_DEVICE_TABLE(i2c, jc42_id);
 570
 571 #ifdef CONFIG_OF
 572 static const struct of_device_id jc42_of_ids[] = {
 573         { .compatible = "jedec,jc-42.4-temp", },
 574         { }
 575 };
 576 MODULE_DEVICE_TABLE(of, jc42_of_ids);
 577 #endif
 578
 579 static struct i2c_driver jc42_driver = {
 580         .class          = I2C_CLASS_SPD | I2C_CLASS_HWMON,
 581         .driver = {
 582                 .name   = "jc42",
 583                 .pm = JC42_DEV_PM_OPS,
 584                 .of_match_table = of_match_ptr(jc42_of_ids),
 585         },
 586         .probe          = jc42_probe,
 587         .remove         = jc42_remove,
 588         .id_table       = jc42_id,
 589         .detect         = jc42_detect,
 590         .address_list   = normal_i2c,
 591 };
 592
 593 module_i2c_driver(jc42_driver);
 594
 595 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
 596 MODULE_DESCRIPTION("JC42 driver");
 597 MODULE_LICENSE("GPL");