include/uapi/drm/vmwgfx_drm.h

   1 /**************************************************************************
   2  *
   3  * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
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  11  * permit persons to whom the Software is furnished to do so, subject to
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  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
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  26  **************************************************************************/
  27
  28 #ifndef __VMWGFX_DRM_H__
  29 #define __VMWGFX_DRM_H__
  30
  31 #define DRM_VMW_MAX_SURFACE_FACES 6
  32 #define DRM_VMW_MAX_MIP_LEVELS 24
  33
  34
  35 #define DRM_VMW_GET_PARAM            0
  36 #define DRM_VMW_ALLOC_DMABUF         1
  37 #define DRM_VMW_UNREF_DMABUF         2
  38 #define DRM_VMW_CURSOR_BYPASS        3
  39 /* guarded by DRM_VMW_PARAM_NUM_STREAMS != 0*/
  40 #define DRM_VMW_CONTROL_STREAM       4
  41 #define DRM_VMW_CLAIM_STREAM         5
  42 #define DRM_VMW_UNREF_STREAM         6
  43 /* guarded by DRM_VMW_PARAM_3D == 1 */
  44 #define DRM_VMW_CREATE_CONTEXT       7
  45 #define DRM_VMW_UNREF_CONTEXT        8
  46 #define DRM_VMW_CREATE_SURFACE       9
  47 #define DRM_VMW_UNREF_SURFACE        10
  48 #define DRM_VMW_REF_SURFACE          11
  49 #define DRM_VMW_EXECBUF              12
  50 #define DRM_VMW_GET_3D_CAP           13
  51 #define DRM_VMW_FENCE_WAIT           14
  52 #define DRM_VMW_FENCE_SIGNALED       15
  53 #define DRM_VMW_FENCE_UNREF          16
  54 #define DRM_VMW_FENCE_EVENT          17
  55 #define DRM_VMW_PRESENT              18
  56 #define DRM_VMW_PRESENT_READBACK     19
  57 #define DRM_VMW_UPDATE_LAYOUT        20
  58
  59 /*************************************************************************/
  60 /**
  61  * DRM_VMW_GET_PARAM - get device information.
  62  *
  63  * DRM_VMW_PARAM_FIFO_OFFSET:
  64  * Offset to use to map the first page of the FIFO read-only.
  65  * The fifo is mapped using the mmap() system call on the drm device.
  66  *
  67  * DRM_VMW_PARAM_OVERLAY_IOCTL:
  68  * Does the driver support the overlay ioctl.
  69  */
  70
  71 #define DRM_VMW_PARAM_NUM_STREAMS      0
  72 #define DRM_VMW_PARAM_NUM_FREE_STREAMS 1
  73 #define DRM_VMW_PARAM_3D               2
  74 #define DRM_VMW_PARAM_HW_CAPS          3
  75 #define DRM_VMW_PARAM_FIFO_CAPS        4
  76 #define DRM_VMW_PARAM_MAX_FB_SIZE      5
  77 #define DRM_VMW_PARAM_FIFO_HW_VERSION  6
  78
  79 /**
  80  * struct drm_vmw_getparam_arg
  81  *
  82  * @value: Returned value. //Out
  83  * @param: Parameter to query. //In.
  84  *
  85  * Argument to the DRM_VMW_GET_PARAM Ioctl.
  86  */
  87
  88 struct drm_vmw_getparam_arg {
  89         uint64_t value;
  90         uint32_t param;
  91         uint32_t pad64;
  92 };
  93
  94 /*************************************************************************/
  95 /**
  96  * DRM_VMW_CREATE_CONTEXT - Create a host context.
  97  *
  98  * Allocates a device unique context id, and queues a create context command
  99  * for the host. Does not wait for host completion.
 100  */
 101
 102 /**
 103  * struct drm_vmw_context_arg
 104  *
 105  * @cid: Device unique context ID.
 106  *
 107  * Output argument to the DRM_VMW_CREATE_CONTEXT Ioctl.
 108  * Input argument to the DRM_VMW_UNREF_CONTEXT Ioctl.
 109  */
 110
 111 struct drm_vmw_context_arg {
 112         int32_t cid;
 113         uint32_t pad64;
 114 };
 115
 116 /*************************************************************************/
 117 /**
 118  * DRM_VMW_UNREF_CONTEXT - Create a host context.
 119  *
 120  * Frees a global context id, and queues a destroy host command for the host.
 121  * Does not wait for host completion. The context ID can be used directly
 122  * in the command stream and shows up as the same context ID on the host.
 123  */
 124
 125 /*************************************************************************/
 126 /**
 127  * DRM_VMW_CREATE_SURFACE - Create a host suface.
 128  *
 129  * Allocates a device unique surface id, and queues a create surface command
 130  * for the host. Does not wait for host completion. The surface ID can be
 131  * used directly in the command stream and shows up as the same surface
 132  * ID on the host.
 133  */
 134
 135 /**
 136  * struct drm_wmv_surface_create_req
 137  *
 138  * @flags: Surface flags as understood by the host.
 139  * @format: Surface format as understood by the host.
 140  * @mip_levels: Number of mip levels for each face.
 141  * An unused face should have 0 encoded.
 142  * @size_addr: Address of a user-space array of sruct drm_vmw_size
 143  * cast to an uint64_t for 32-64 bit compatibility.
 144  * The size of the array should equal the total number of mipmap levels.
 145  * @shareable: Boolean whether other clients (as identified by file descriptors)
 146  * may reference this surface.
 147  * @scanout: Boolean whether the surface is intended to be used as a
 148  * scanout.
 149  *
 150  * Input data to the DRM_VMW_CREATE_SURFACE Ioctl.
 151  * Output data from the DRM_VMW_REF_SURFACE Ioctl.
 152  */
 153
 154 struct drm_vmw_surface_create_req {
 155         uint32_t flags;
 156         uint32_t format;
 157         uint32_t mip_levels[DRM_VMW_MAX_SURFACE_FACES];
 158         uint64_t size_addr;
 159         int32_t shareable;
 160         int32_t scanout;
 161 };
 162
 163 /**
 164  * struct drm_wmv_surface_arg
 165  *
 166  * @sid: Surface id of created surface or surface to destroy or reference.
 167  *
 168  * Output data from the DRM_VMW_CREATE_SURFACE Ioctl.
 169  * Input argument to the DRM_VMW_UNREF_SURFACE Ioctl.
 170  * Input argument to the DRM_VMW_REF_SURFACE Ioctl.
 171  */
 172
 173 struct drm_vmw_surface_arg {
 174         int32_t sid;
 175         uint32_t pad64;
 176 };
 177
 178 /**
 179  * struct drm_vmw_size ioctl.
 180  *
 181  * @width - mip level width
 182  * @height - mip level height
 183  * @depth - mip level depth
 184  *
 185  * Description of a mip level.
 186  * Input data to the DRM_WMW_CREATE_SURFACE Ioctl.
 187  */
 188
 189 struct drm_vmw_size {
 190         uint32_t width;
 191         uint32_t height;
 192         uint32_t depth;
 193         uint32_t pad64;
 194 };
 195
 196 /**
 197  * union drm_vmw_surface_create_arg
 198  *
 199  * @rep: Output data as described above.
 200  * @req: Input data as described above.
 201  *
 202  * Argument to the DRM_VMW_CREATE_SURFACE Ioctl.
 203  */
 204
 205 union drm_vmw_surface_create_arg {
 206         struct drm_vmw_surface_arg rep;
 207         struct drm_vmw_surface_create_req req;
 208 };
 209
 210 /*************************************************************************/
 211 /**
 212  * DRM_VMW_REF_SURFACE - Reference a host surface.
 213  *
 214  * Puts a reference on a host surface with a give sid, as previously
 215  * returned by the DRM_VMW_CREATE_SURFACE ioctl.
 216  * A reference will make sure the surface isn't destroyed while we hold
 217  * it and will allow the calling client to use the surface ID in the command
 218  * stream.
 219  *
 220  * On successful return, the Ioctl returns the surface information given
 221  * in the DRM_VMW_CREATE_SURFACE ioctl.
 222  */
 223
 224 /**
 225  * union drm_vmw_surface_reference_arg
 226  *
 227  * @rep: Output data as described above.
 228  * @req: Input data as described above.
 229  *
 230  * Argument to the DRM_VMW_REF_SURFACE Ioctl.
 231  */
 232
 233 union drm_vmw_surface_reference_arg {
 234         struct drm_vmw_surface_create_req rep;
 235         struct drm_vmw_surface_arg req;
 236 };
 237
 238 /*************************************************************************/
 239 /**
 240  * DRM_VMW_UNREF_SURFACE - Unreference a host surface.
 241  *
 242  * Clear a reference previously put on a host surface.
 243  * When all references are gone, including the one implicitly placed
 244  * on creation,
 245  * a destroy surface command will be queued for the host.
 246  * Does not wait for completion.
 247  */
 248
 249 /*************************************************************************/
 250 /**
 251  * DRM_VMW_EXECBUF
 252  *
 253  * Submit a command buffer for execution on the host, and return a
 254  * fence seqno that when signaled, indicates that the command buffer has
 255  * executed.
 256  */
 257
 258 /**
 259  * struct drm_vmw_execbuf_arg
 260  *
 261  * @commands: User-space address of a command buffer cast to an uint64_t.
 262  * @command-size: Size in bytes of the command buffer.
 263  * @throttle-us: Sleep until software is less than @throttle_us
 264  * microseconds ahead of hardware. The driver may round this value
 265  * to the nearest kernel tick.
 266  * @fence_rep: User-space address of a struct drm_vmw_fence_rep cast to an
 267  * uint64_t.
 268  * @version: Allows expanding the execbuf ioctl parameters without breaking
 269  * backwards compatibility, since user-space will always tell the kernel
 270  * which version it uses.
 271  * @flags: Execbuf flags. None currently.
 272  *
 273  * Argument to the DRM_VMW_EXECBUF Ioctl.
 274  */
 275
 276 #define DRM_VMW_EXECBUF_VERSION 1
 277
 278 struct drm_vmw_execbuf_arg {
 279         uint64_t commands;
 280         uint32_t command_size;
 281         uint32_t throttle_us;
 282         uint64_t fence_rep;
 283         uint32_t version;
 284         uint32_t flags;
 285 };
 286
 287 /**
 288  * struct drm_vmw_fence_rep
 289  *
 290  * @handle: Fence object handle for fence associated with a command submission.
 291  * @mask: Fence flags relevant for this fence object.
 292  * @seqno: Fence sequence number in fifo. A fence object with a lower
 293  * seqno will signal the EXEC flag before a fence object with a higher
 294  * seqno. This can be used by user-space to avoid kernel calls to determine
 295  * whether a fence has signaled the EXEC flag. Note that @seqno will
 296  * wrap at 32-bit.
 297  * @passed_seqno: The highest seqno number processed by the hardware
 298  * so far. This can be used to mark user-space fence objects as signaled, and
 299  * to determine whether a fence seqno might be stale.
 300  * @error: This member should've been set to -EFAULT on submission.
 301  * The following actions should be take on completion:
 302  * error == -EFAULT: Fence communication failed. The host is synchronized.
 303  * Use the last fence id read from the FIFO fence register.
 304  * error != 0 && error != -EFAULT:
 305  * Fence submission failed. The host is synchronized. Use the fence_seq member.
 306  * error == 0: All is OK, The host may not be synchronized.
 307  * Use the fence_seq member.
 308  *
 309  * Input / Output data to the DRM_VMW_EXECBUF Ioctl.
 310  */
 311
 312 struct drm_vmw_fence_rep {
 313         uint32_t handle;
 314         uint32_t mask;
 315         uint32_t seqno;
 316         uint32_t passed_seqno;
 317         uint32_t pad64;
 318         int32_t error;
 319 };
 320
 321 /*************************************************************************/
 322 /**
 323  * DRM_VMW_ALLOC_DMABUF
 324  *
 325  * Allocate a DMA buffer that is visible also to the host.
 326  * NOTE: The buffer is
 327  * identified by a handle and an offset, which are private to the guest, but
 328  * useable in the command stream. The guest kernel may translate these
 329  * and patch up the command stream accordingly. In the future, the offset may
 330  * be zero at all times, or it may disappear from the interface before it is
 331  * fixed.
 332  *
 333  * The DMA buffer may stay user-space mapped in the guest at all times,
 334  * and is thus suitable for sub-allocation.
 335  *
 336  * DMA buffers are mapped using the mmap() syscall on the drm device.
 337  */
 338
 339 /**
 340  * struct drm_vmw_alloc_dmabuf_req
 341  *
 342  * @size: Required minimum size of the buffer.
 343  *
 344  * Input data to the DRM_VMW_ALLOC_DMABUF Ioctl.
 345  */
 346
 347 struct drm_vmw_alloc_dmabuf_req {
 348         uint32_t size;
 349         uint32_t pad64;
 350 };
 351
 352 /**
 353  * struct drm_vmw_dmabuf_rep
 354  *
 355  * @map_handle: Offset to use in the mmap() call used to map the buffer.
 356  * @handle: Handle unique to this buffer. Used for unreferencing.
 357  * @cur_gmr_id: GMR id to use in the command stream when this buffer is
 358  * referenced. See not above.
 359  * @cur_gmr_offset: Offset to use in the command stream when this buffer is
 360  * referenced. See note above.
 361  *
 362  * Output data from the DRM_VMW_ALLOC_DMABUF Ioctl.
 363  */
 364
 365 struct drm_vmw_dmabuf_rep {
 366         uint64_t map_handle;
 367         uint32_t handle;
 368         uint32_t cur_gmr_id;
 369         uint32_t cur_gmr_offset;
 370         uint32_t pad64;
 371 };
 372
 373 /**
 374  * union drm_vmw_dmabuf_arg
 375  *
 376  * @req: Input data as described above.
 377  * @rep: Output data as described above.
 378  *
 379  * Argument to the DRM_VMW_ALLOC_DMABUF Ioctl.
 380  */
 381
 382 union drm_vmw_alloc_dmabuf_arg {
 383         struct drm_vmw_alloc_dmabuf_req req;
 384         struct drm_vmw_dmabuf_rep rep;
 385 };
 386
 387 /*************************************************************************/
 388 /**
 389  * DRM_VMW_UNREF_DMABUF - Free a DMA buffer.
 390  *
 391  */
 392
 393 /**
 394  * struct drm_vmw_unref_dmabuf_arg
 395  *
 396  * @handle: Handle indicating what buffer to free. Obtained from the
 397  * DRM_VMW_ALLOC_DMABUF Ioctl.
 398  *
 399  * Argument to the DRM_VMW_UNREF_DMABUF Ioctl.
 400  */
 401
 402 struct drm_vmw_unref_dmabuf_arg {
 403         uint32_t handle;
 404         uint32_t pad64;
 405 };
 406
 407 /*************************************************************************/
 408 /**
 409  * DRM_VMW_CONTROL_STREAM - Control overlays, aka streams.
 410  *
 411  * This IOCTL controls the overlay units of the svga device.
 412  * The SVGA overlay units does not work like regular hardware units in
 413  * that they do not automaticaly read back the contents of the given dma
 414  * buffer. But instead only read back for each call to this ioctl, and
 415  * at any point between this call being made and a following call that
 416  * either changes the buffer or disables the stream.
 417  */
 418
 419 /**
 420  * struct drm_vmw_rect
 421  *
 422  * Defines a rectangle. Used in the overlay ioctl to define
 423  * source and destination rectangle.
 424  */
 425
 426 struct drm_vmw_rect {
 427         int32_t x;
 428         int32_t y;
 429         uint32_t w;
 430         uint32_t h;
 431 };
 432
 433 /**
 434  * struct drm_vmw_control_stream_arg
 435  *
 436  * @stream_id: Stearm to control
 437  * @enabled: If false all following arguments are ignored.
 438  * @handle: Handle to buffer for getting data from.
 439  * @format: Format of the overlay as understood by the host.
 440  * @width: Width of the overlay.
 441  * @height: Height of the overlay.
 442  * @size: Size of the overlay in bytes.
 443  * @pitch: Array of pitches, the two last are only used for YUV12 formats.
 444  * @offset: Offset from start of dma buffer to overlay.
 445  * @src: Source rect, must be within the defined area above.
 446  * @dst: Destination rect, x and y may be negative.
 447  *
 448  * Argument to the DRM_VMW_CONTROL_STREAM Ioctl.
 449  */
 450
 451 struct drm_vmw_control_stream_arg {
 452         uint32_t stream_id;
 453         uint32_t enabled;
 454
 455         uint32_t flags;
 456         uint32_t color_key;
 457
 458         uint32_t handle;
 459         uint32_t offset;
 460         int32_t format;
 461         uint32_t size;
 462         uint32_t width;
 463         uint32_t height;
 464         uint32_t pitch[3];
 465
 466         uint32_t pad64;
 467         struct drm_vmw_rect src;
 468         struct drm_vmw_rect dst;
 469 };
 470
 471 /*************************************************************************/
 472 /**
 473  * DRM_VMW_CURSOR_BYPASS - Give extra information about cursor bypass.
 474  *
 475  */
 476
 477 #define DRM_VMW_CURSOR_BYPASS_ALL    (1 << 0)
 478 #define DRM_VMW_CURSOR_BYPASS_FLAGS       (1)
 479
 480 /**
 481  * struct drm_vmw_cursor_bypass_arg
 482  *
 483  * @flags: Flags.
 484  * @crtc_id: Crtc id, only used if DMR_CURSOR_BYPASS_ALL isn't passed.
 485  * @xpos: X position of cursor.
 486  * @ypos: Y position of cursor.
 487  * @xhot: X hotspot.
 488  * @yhot: Y hotspot.
 489  *
 490  * Argument to the DRM_VMW_CURSOR_BYPASS Ioctl.
 491  */
 492
 493 struct drm_vmw_cursor_bypass_arg {
 494         uint32_t flags;
 495         uint32_t crtc_id;
 496         int32_t xpos;
 497         int32_t ypos;
 498         int32_t xhot;
 499         int32_t yhot;
 500 };
 501
 502 /*************************************************************************/
 503 /**
 504  * DRM_VMW_CLAIM_STREAM - Claim a single stream.
 505  */
 506
 507 /**
 508  * struct drm_vmw_context_arg
 509  *
 510  * @stream_id: Device unique context ID.
 511  *
 512  * Output argument to the DRM_VMW_CREATE_CONTEXT Ioctl.
 513  * Input argument to the DRM_VMW_UNREF_CONTEXT Ioctl.
 514  */
 515
 516 struct drm_vmw_stream_arg {
 517         uint32_t stream_id;
 518         uint32_t pad64;
 519 };
 520
 521 /*************************************************************************/
 522 /**
 523  * DRM_VMW_UNREF_STREAM - Unclaim a stream.
 524  *
 525  * Return a single stream that was claimed by this process. Also makes
 526  * sure that the stream has been stopped.
 527  */
 528
 529 /*************************************************************************/
 530 /**
 531  * DRM_VMW_GET_3D_CAP
 532  *
 533  * Read 3D capabilities from the FIFO
 534  *
 535  */
 536
 537 /**
 538  * struct drm_vmw_get_3d_cap_arg
 539  *
 540  * @buffer: Pointer to a buffer for capability data, cast to an uint64_t
 541  * @size: Max size to copy
 542  *
 543  * Input argument to the DRM_VMW_GET_3D_CAP_IOCTL
 544  * ioctls.
 545  */
 546
 547 struct drm_vmw_get_3d_cap_arg {
 548         uint64_t buffer;
 549         uint32_t max_size;
 550         uint32_t pad64;
 551 };
 552
 553 /*************************************************************************/
 554 /**
 555  * DRM_VMW_FENCE_WAIT
 556  *
 557  * Waits for a fence object to signal. The wait is interruptible, so that
 558  * signals may be delivered during the interrupt. The wait may timeout,
 559  * in which case the calls returns -EBUSY. If the wait is restarted,
 560  * that is restarting without resetting @cookie_valid to zero,
 561  * the timeout is computed from the first call.
 562  *
 563  * The flags argument to the DRM_VMW_FENCE_WAIT ioctl indicates what to wait
 564  * on:
 565  * DRM_VMW_FENCE_FLAG_EXEC: All commands ahead of the fence in the command
 566  * stream
 567  * have executed.
 568  * DRM_VMW_FENCE_FLAG_QUERY: All query results resulting from query finish
 569  * commands
 570  * in the buffer given to the EXECBUF ioctl returning the fence object handle
 571  * are available to user-space.
 572  *
 573  * DRM_VMW_WAIT_OPTION_UNREF: If this wait option is given, and the
 574  * fenc wait ioctl returns 0, the fence object has been unreferenced after
 575  * the wait.
 576  */
 577
 578 #define DRM_VMW_FENCE_FLAG_EXEC   (1 << 0)
 579 #define DRM_VMW_FENCE_FLAG_QUERY  (1 << 1)
 580
 581 #define DRM_VMW_WAIT_OPTION_UNREF (1 << 0)
 582
 583 /**
 584  * struct drm_vmw_fence_wait_arg
 585  *
 586  * @handle: Fence object handle as returned by the DRM_VMW_EXECBUF ioctl.
 587  * @cookie_valid: Must be reset to 0 on first call. Left alone on restart.
 588  * @kernel_cookie: Set to 0 on first call. Left alone on restart.
 589  * @timeout_us: Wait timeout in microseconds. 0 for indefinite timeout.
 590  * @lazy: Set to 1 if timing is not critical. Allow more than a kernel tick
 591  * before returning.
 592  * @flags: Fence flags to wait on.
 593  * @wait_options: Options that control the behaviour of the wait ioctl.
 594  *
 595  * Input argument to the DRM_VMW_FENCE_WAIT ioctl.
 596  */
 597
 598 struct drm_vmw_fence_wait_arg {
 599         uint32_t handle;
 600         int32_t  cookie_valid;
 601         uint64_t kernel_cookie;
 602         uint64_t timeout_us;
 603         int32_t lazy;
 604         int32_t flags;
 605         int32_t wait_options;
 606         int32_t pad64;
 607 };
 608
 609 /*************************************************************************/
 610 /**
 611  * DRM_VMW_FENCE_SIGNALED
 612  *
 613  * Checks if a fence object is signaled..
 614  */
 615
 616 /**
 617  * struct drm_vmw_fence_signaled_arg
 618  *
 619  * @handle: Fence object handle as returned by the DRM_VMW_EXECBUF ioctl.
 620  * @flags: Fence object flags input to DRM_VMW_FENCE_SIGNALED ioctl
 621  * @signaled: Out: Flags signaled.
 622  * @sequence: Out: Highest sequence passed so far. Can be used to signal the
 623  * EXEC flag of user-space fence objects.
 624  *
 625  * Input/Output argument to the DRM_VMW_FENCE_SIGNALED and DRM_VMW_FENCE_UNREF
 626  * ioctls.
 627  */
 628
 629 struct drm_vmw_fence_signaled_arg {
 630          uint32_t handle;
 631          uint32_t flags;
 632          int32_t signaled;
 633          uint32_t passed_seqno;
 634          uint32_t signaled_flags;
 635          uint32_t pad64;
 636 };
 637
 638 /*************************************************************************/
 639 /**
 640  * DRM_VMW_FENCE_UNREF
 641  *
 642  * Unreferences a fence object, and causes it to be destroyed if there are no
 643  * other references to it.
 644  *
 645  */
 646
 647 /**
 648  * struct drm_vmw_fence_arg
 649  *
 650  * @handle: Fence object handle as returned by the DRM_VMW_EXECBUF ioctl.
 651  *
 652  * Input/Output argument to the DRM_VMW_FENCE_UNREF ioctl..
 653  */
 654
 655 struct drm_vmw_fence_arg {
 656          uint32_t handle;
 657          uint32_t pad64;
 658 };
 659
 660
 661 /*************************************************************************/
 662 /**
 663  * DRM_VMW_FENCE_EVENT
 664  *
 665  * Queues an event on a fence to be delivered on the drm character device
 666  * when the fence has signaled the DRM_VMW_FENCE_FLAG_EXEC flag.
 667  * Optionally the approximate time when the fence signaled is
 668  * given by the event.
 669  */
 670
 671 /*
 672  * The event type
 673  */
 674 #define DRM_VMW_EVENT_FENCE_SIGNALED 0x80000000
 675
 676 struct drm_vmw_event_fence {
 677         struct drm_event base;
 678         uint64_t user_data;
 679         uint32_t tv_sec;
 680         uint32_t tv_usec;
 681 };
 682
 683 /*
 684  * Flags that may be given to the command.
 685  */
 686 /* Request fence signaled time on the event. */
 687 #define DRM_VMW_FE_FLAG_REQ_TIME (1 << 0)
 688
 689 /**
 690  * struct drm_vmw_fence_event_arg
 691  *
 692  * @fence_rep: Pointer to fence_rep structure cast to uint64_t or 0 if
 693  * the fence is not supposed to be referenced by user-space.
 694  * @user_info: Info to be delivered with the event.
 695  * @handle: Attach the event to this fence only.
 696  * @flags: A set of flags as defined above.
 697  */
 698 struct drm_vmw_fence_event_arg {
 699         uint64_t fence_rep;
 700         uint64_t user_data;
 701         uint32_t handle;
 702         uint32_t flags;
 703 };
 704
 705
 706 /*************************************************************************/
 707 /**
 708  * DRM_VMW_PRESENT
 709  *
 710  * Executes an SVGA present on a given fb for a given surface. The surface
 711  * is placed on the framebuffer. Cliprects are given relative to the given
 712  * point (the point disignated by dest_{x|y}).
 713  *
 714  */
 715
 716 /**
 717  * struct drm_vmw_present_arg
 718  * @fb_id: framebuffer id to present / read back from.
 719  * @sid: Surface id to present from.
 720  * @dest_x: X placement coordinate for surface.
 721  * @dest_y: Y placement coordinate for surface.
 722  * @clips_ptr: Pointer to an array of clip rects cast to an uint64_t.
 723  * @num_clips: Number of cliprects given relative to the framebuffer origin,
 724  * in the same coordinate space as the frame buffer.
 725  * @pad64: Unused 64-bit padding.
 726  *
 727  * Input argument to the DRM_VMW_PRESENT ioctl.
 728  */
 729
 730 struct drm_vmw_present_arg {
 731         uint32_t fb_id;
 732         uint32_t sid;
 733         int32_t dest_x;
 734         int32_t dest_y;
 735         uint64_t clips_ptr;
 736         uint32_t num_clips;
 737         uint32_t pad64;
 738 };
 739
 740
 741 /*************************************************************************/
 742 /**
 743  * DRM_VMW_PRESENT_READBACK
 744  *
 745  * Executes an SVGA present readback from a given fb to the dma buffer
 746  * currently bound as the fb. If there is no dma buffer bound to the fb,
 747  * an error will be returned.
 748  *
 749  */
 750
 751 /**
 752  * struct drm_vmw_present_arg
 753  * @fb_id: fb_id to present / read back from.
 754  * @num_clips: Number of cliprects.
 755  * @clips_ptr: Pointer to an array of clip rects cast to an uint64_t.
 756  * @fence_rep: Pointer to a struct drm_vmw_fence_rep, cast to an uint64_t.
 757  * If this member is NULL, then the ioctl should not return a fence.
 758  */
 759
 760 struct drm_vmw_present_readback_arg {
 761          uint32_t fb_id;
 762          uint32_t num_clips;
 763          uint64_t clips_ptr;
 764          uint64_t fence_rep;
 765 };
 766
 767 /*************************************************************************/
 768 /**
 769  * DRM_VMW_UPDATE_LAYOUT - Update layout
 770  *
 771  * Updates the preferred modes and connection status for connectors. The
 772  * command consists of one drm_vmw_update_layout_arg pointing to an array
 773  * of num_outputs drm_vmw_rect's.
 774  */
 775
 776 /**
 777  * struct drm_vmw_update_layout_arg
 778  *
 779  * @num_outputs: number of active connectors
 780  * @rects: pointer to array of drm_vmw_rect cast to an uint64_t
 781  *
 782  * Input argument to the DRM_VMW_UPDATE_LAYOUT Ioctl.
 783  */
 784 struct drm_vmw_update_layout_arg {
 785         uint32_t num_outputs;
 786         uint32_t pad64;
 787         uint64_t rects;
 788 };
 789
 790 #endif