2 * Copyright (C) STMicroelectronics SA 2014
3 * Author: Vincent Abriou <vincent.abriou@st.com> for STMicroelectronics.
4 * License terms: GNU General Public License (GPL), version 2
8 #include <linux/component.h>
9 #include <linux/hdmi.h>
10 #include <linux/module.h>
11 #include <linux/of_gpio.h>
12 #include <linux/platform_device.h>
13 #include <linux/reset.h>
16 #include <drm/drm_atomic_helper.h>
17 #include <drm/drm_crtc_helper.h>
18 #include <drm/drm_edid.h>
21 #include "sti_hdmi_tx3g4c28phy.h"
22 #include "sti_hdmi_tx3g0c55phy.h"
25 #define HDMI_CFG 0x0000
26 #define HDMI_INT_EN 0x0004
27 #define HDMI_INT_STA 0x0008
28 #define HDMI_INT_CLR 0x000C
29 #define HDMI_STA 0x0010
30 #define HDMI_ACTIVE_VID_XMIN 0x0100
31 #define HDMI_ACTIVE_VID_XMAX 0x0104
32 #define HDMI_ACTIVE_VID_YMIN 0x0108
33 #define HDMI_ACTIVE_VID_YMAX 0x010C
34 #define HDMI_DFLT_CHL0_DAT 0x0110
35 #define HDMI_DFLT_CHL1_DAT 0x0114
36 #define HDMI_DFLT_CHL2_DAT 0x0118
37 #define HDMI_SW_DI_1_HEAD_WORD 0x0210
38 #define HDMI_SW_DI_1_PKT_WORD0 0x0214
39 #define HDMI_SW_DI_1_PKT_WORD1 0x0218
40 #define HDMI_SW_DI_1_PKT_WORD2 0x021C
41 #define HDMI_SW_DI_1_PKT_WORD3 0x0220
42 #define HDMI_SW_DI_1_PKT_WORD4 0x0224
43 #define HDMI_SW_DI_1_PKT_WORD5 0x0228
44 #define HDMI_SW_DI_1_PKT_WORD6 0x022C
45 #define HDMI_SW_DI_CFG 0x0230
46 #define HDMI_SW_DI_2_HEAD_WORD 0x0600
47 #define HDMI_SW_DI_2_PKT_WORD0 0x0604
48 #define HDMI_SW_DI_2_PKT_WORD1 0x0608
49 #define HDMI_SW_DI_2_PKT_WORD2 0x060C
50 #define HDMI_SW_DI_2_PKT_WORD3 0x0610
51 #define HDMI_SW_DI_2_PKT_WORD4 0x0614
52 #define HDMI_SW_DI_2_PKT_WORD5 0x0618
53 #define HDMI_SW_DI_2_PKT_WORD6 0x061C
55 #define HDMI_IFRAME_SLOT_AVI 1
56 #define HDMI_IFRAME_SLOT_AUDIO 2
58 #define XCAT(prefix, x, suffix) prefix ## x ## suffix
59 #define HDMI_SW_DI_N_HEAD_WORD(x) XCAT(HDMI_SW_DI_, x, _HEAD_WORD)
60 #define HDMI_SW_DI_N_PKT_WORD0(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD0)
61 #define HDMI_SW_DI_N_PKT_WORD1(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD1)
62 #define HDMI_SW_DI_N_PKT_WORD2(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD2)
63 #define HDMI_SW_DI_N_PKT_WORD3(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD3)
64 #define HDMI_SW_DI_N_PKT_WORD4(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD4)
65 #define HDMI_SW_DI_N_PKT_WORD5(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD5)
66 #define HDMI_SW_DI_N_PKT_WORD6(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD6)
68 #define HDMI_IFRAME_DISABLED 0x0
69 #define HDMI_IFRAME_SINGLE_SHOT 0x1
70 #define HDMI_IFRAME_FIELD 0x2
71 #define HDMI_IFRAME_FRAME 0x3
72 #define HDMI_IFRAME_MASK 0x3
73 #define HDMI_IFRAME_CFG_DI_N(x, n) ((x) << ((n-1)*4)) /* n from 1 to 6 */
75 #define HDMI_CFG_DEVICE_EN BIT(0)
76 #define HDMI_CFG_HDMI_NOT_DVI BIT(1)
77 #define HDMI_CFG_HDCP_EN BIT(2)
78 #define HDMI_CFG_ESS_NOT_OESS BIT(3)
79 #define HDMI_CFG_H_SYNC_POL_NEG BIT(4)
80 #define HDMI_CFG_SINK_TERM_DET_EN BIT(5)
81 #define HDMI_CFG_V_SYNC_POL_NEG BIT(6)
82 #define HDMI_CFG_422_EN BIT(8)
83 #define HDMI_CFG_FIFO_OVERRUN_CLR BIT(12)
84 #define HDMI_CFG_FIFO_UNDERRUN_CLR BIT(13)
85 #define HDMI_CFG_SW_RST_EN BIT(31)
87 #define HDMI_INT_GLOBAL BIT(0)
88 #define HDMI_INT_SW_RST BIT(1)
89 #define HDMI_INT_PIX_CAP BIT(3)
90 #define HDMI_INT_HOT_PLUG BIT(4)
91 #define HDMI_INT_DLL_LCK BIT(5)
92 #define HDMI_INT_NEW_FRAME BIT(6)
93 #define HDMI_INT_GENCTRL_PKT BIT(7)
94 #define HDMI_INT_SINK_TERM_PRESENT BIT(11)
96 #define HDMI_DEFAULT_INT (HDMI_INT_SINK_TERM_PRESENT \
101 #define HDMI_WORKING_INT (HDMI_INT_SINK_TERM_PRESENT \
102 | HDMI_INT_GENCTRL_PKT \
103 | HDMI_INT_NEW_FRAME \
105 | HDMI_INT_HOT_PLUG \
110 #define HDMI_STA_SW_RST BIT(1)
112 #define HDMI_INFOFRAME_HEADER_TYPE(x) (((x) & 0xff) << 0)
113 #define HDMI_INFOFRAME_HEADER_VERSION(x) (((x) & 0xff) << 8)
114 #define HDMI_INFOFRAME_HEADER_LEN(x) (((x) & 0x0f) << 16)
116 struct sti_hdmi_connector
{
117 struct drm_connector drm_connector
;
118 struct drm_encoder
*encoder
;
119 struct sti_hdmi
*hdmi
;
122 #define to_sti_hdmi_connector(x) \
123 container_of(x, struct sti_hdmi_connector, drm_connector)
125 u32
hdmi_read(struct sti_hdmi
*hdmi
, int offset
)
127 return readl(hdmi
->regs
+ offset
);
130 void hdmi_write(struct sti_hdmi
*hdmi
, u32 val
, int offset
)
132 writel(val
, hdmi
->regs
+ offset
);
136 * HDMI interrupt handler threaded
139 * @arg: connector structure
141 static irqreturn_t
hdmi_irq_thread(int irq
, void *arg
)
143 struct sti_hdmi
*hdmi
= arg
;
145 /* Hot plug/unplug IRQ */
146 if (hdmi
->irq_status
& HDMI_INT_HOT_PLUG
) {
147 hdmi
->hpd
= readl(hdmi
->regs
+ HDMI_STA
) & HDMI_STA_HOT_PLUG
;
149 drm_helper_hpd_irq_event(hdmi
->drm_dev
);
152 /* Sw reset and PLL lock are exclusive so we can use the same
153 * event to signal them
155 if (hdmi
->irq_status
& (HDMI_INT_SW_RST
| HDMI_INT_DLL_LCK
)) {
156 hdmi
->event_received
= true;
157 wake_up_interruptible(&hdmi
->wait_event
);
164 * HDMI interrupt handler
167 * @arg: connector structure
169 static irqreturn_t
hdmi_irq(int irq
, void *arg
)
171 struct sti_hdmi
*hdmi
= arg
;
173 /* read interrupt status */
174 hdmi
->irq_status
= hdmi_read(hdmi
, HDMI_INT_STA
);
176 /* clear interrupt status */
177 hdmi_write(hdmi
, hdmi
->irq_status
, HDMI_INT_CLR
);
179 /* force sync bus write */
180 hdmi_read(hdmi
, HDMI_INT_STA
);
182 return IRQ_WAKE_THREAD
;
186 * Set hdmi active area depending on the drm display mode selected
188 * @hdmi: pointer on the hdmi internal structure
190 static void hdmi_active_area(struct sti_hdmi
*hdmi
)
195 xmin
= sti_vtg_get_pixel_number(hdmi
->mode
, 1);
196 xmax
= sti_vtg_get_pixel_number(hdmi
->mode
, hdmi
->mode
.hdisplay
);
197 ymin
= sti_vtg_get_line_number(hdmi
->mode
, 0);
198 ymax
= sti_vtg_get_line_number(hdmi
->mode
, hdmi
->mode
.vdisplay
- 1);
200 hdmi_write(hdmi
, xmin
, HDMI_ACTIVE_VID_XMIN
);
201 hdmi_write(hdmi
, xmax
, HDMI_ACTIVE_VID_XMAX
);
202 hdmi_write(hdmi
, ymin
, HDMI_ACTIVE_VID_YMIN
);
203 hdmi_write(hdmi
, ymax
, HDMI_ACTIVE_VID_YMAX
);
207 * Overall hdmi configuration
209 * @hdmi: pointer on the hdmi internal structure
211 static void hdmi_config(struct sti_hdmi
*hdmi
)
215 DRM_DEBUG_DRIVER("\n");
217 /* Clear overrun and underrun fifo */
218 conf
= HDMI_CFG_FIFO_OVERRUN_CLR
| HDMI_CFG_FIFO_UNDERRUN_CLR
;
220 /* Enable HDMI mode not DVI */
221 conf
|= HDMI_CFG_HDMI_NOT_DVI
| HDMI_CFG_ESS_NOT_OESS
;
223 /* Enable sink term detection */
224 conf
|= HDMI_CFG_SINK_TERM_DET_EN
;
226 /* Set Hsync polarity */
227 if (hdmi
->mode
.flags
& DRM_MODE_FLAG_NHSYNC
) {
228 DRM_DEBUG_DRIVER("H Sync Negative\n");
229 conf
|= HDMI_CFG_H_SYNC_POL_NEG
;
232 /* Set Vsync polarity */
233 if (hdmi
->mode
.flags
& DRM_MODE_FLAG_NVSYNC
) {
234 DRM_DEBUG_DRIVER("V Sync Negative\n");
235 conf
|= HDMI_CFG_V_SYNC_POL_NEG
;
239 conf
|= HDMI_CFG_DEVICE_EN
;
241 hdmi_write(hdmi
, conf
, HDMI_CFG
);
245 * Helper to concatenate infoframe in 32 bits word
247 * @ptr: pointer on the hdmi internal structure
248 * @data: infoframe to write
249 * @size: size to write
251 static inline unsigned int hdmi_infoframe_subpack(const u8
*ptr
, size_t size
)
253 unsigned long value
= 0;
256 for (i
= size
; i
> 0; i
--)
257 value
= (value
<< 8) | ptr
[i
- 1];
263 * Helper to write info frame
265 * @hdmi: pointer on the hdmi internal structure
266 * @data: infoframe to write
267 * @size: size to write
269 static void hdmi_infoframe_write_infopack(struct sti_hdmi
*hdmi
, const u8
*data
)
271 const u8
*ptr
= data
;
272 u32 val
, slot
, mode
, i
;
273 u32 head_offset
, pack_offset
;
277 case HDMI_INFOFRAME_TYPE_AVI
:
278 slot
= HDMI_IFRAME_SLOT_AVI
;
279 mode
= HDMI_IFRAME_FIELD
;
280 head_offset
= HDMI_SW_DI_N_HEAD_WORD(HDMI_IFRAME_SLOT_AVI
);
281 pack_offset
= HDMI_SW_DI_N_PKT_WORD0(HDMI_IFRAME_SLOT_AVI
);
282 size
= HDMI_AVI_INFOFRAME_SIZE
;
285 case HDMI_INFOFRAME_TYPE_AUDIO
:
286 slot
= HDMI_IFRAME_SLOT_AUDIO
;
287 mode
= HDMI_IFRAME_FRAME
;
288 head_offset
= HDMI_SW_DI_N_HEAD_WORD(HDMI_IFRAME_SLOT_AUDIO
);
289 pack_offset
= HDMI_SW_DI_N_PKT_WORD0(HDMI_IFRAME_SLOT_AUDIO
);
290 size
= HDMI_AUDIO_INFOFRAME_SIZE
;
294 DRM_ERROR("unsupported infoframe type: %#x\n", *ptr
);
298 /* Disable transmission slot for updated infoframe */
299 val
= hdmi_read(hdmi
, HDMI_SW_DI_CFG
);
300 val
&= ~HDMI_IFRAME_CFG_DI_N(HDMI_IFRAME_MASK
, slot
);
301 hdmi_write(hdmi
, val
, HDMI_SW_DI_CFG
);
303 val
= HDMI_INFOFRAME_HEADER_TYPE(*ptr
++);
304 val
|= HDMI_INFOFRAME_HEADER_VERSION(*ptr
++);
305 val
|= HDMI_INFOFRAME_HEADER_LEN(*ptr
++);
306 writel(val
, hdmi
->regs
+ head_offset
);
309 * Each subpack contains 4 bytes
310 * The First Bytes of the first subpacket must contain the checksum
311 * Packet size in increase by one.
313 for (i
= 0; i
< size
; i
+= sizeof(u32
)) {
316 num
= min_t(size_t, size
- i
, sizeof(u32
));
317 val
= hdmi_infoframe_subpack(ptr
, num
);
319 writel(val
, hdmi
->regs
+ pack_offset
+ i
);
322 /* Enable transmission slot for updated infoframe */
323 val
= hdmi_read(hdmi
, HDMI_SW_DI_CFG
);
324 val
|= HDMI_IFRAME_CFG_DI_N(HDMI_IFRAME_FIELD
, slot
);
325 hdmi_write(hdmi
, val
, HDMI_SW_DI_CFG
);
329 * Prepare and configure the AVI infoframe
331 * AVI infoframe are transmitted at least once per two video field and
332 * contains information about HDMI transmission mode such as color space,
335 * @hdmi: pointer on the hdmi internal structure
337 * Return negative value if error occurs
339 static int hdmi_avi_infoframe_config(struct sti_hdmi
*hdmi
)
341 struct drm_display_mode
*mode
= &hdmi
->mode
;
342 struct hdmi_avi_infoframe infoframe
;
343 u8 buffer
[HDMI_INFOFRAME_SIZE(AVI
)];
346 DRM_DEBUG_DRIVER("\n");
348 ret
= drm_hdmi_avi_infoframe_from_display_mode(&infoframe
, mode
);
350 DRM_ERROR("failed to setup AVI infoframe: %d\n", ret
);
354 /* fixed infoframe configuration not linked to the mode */
355 infoframe
.colorspace
= HDMI_COLORSPACE_RGB
;
356 infoframe
.quantization_range
= HDMI_QUANTIZATION_RANGE_DEFAULT
;
357 infoframe
.colorimetry
= HDMI_COLORIMETRY_NONE
;
359 ret
= hdmi_avi_infoframe_pack(&infoframe
, buffer
, sizeof(buffer
));
361 DRM_ERROR("failed to pack AVI infoframe: %d\n", ret
);
365 hdmi_infoframe_write_infopack(hdmi
, buffer
);
371 * Prepare and configure the AUDIO infoframe
373 * AUDIO infoframe are transmitted once per frame and
374 * contains information about HDMI transmission mode such as audio codec,
377 * @hdmi: pointer on the hdmi internal structure
379 * Return negative value if error occurs
381 static int hdmi_audio_infoframe_config(struct sti_hdmi
*hdmi
)
383 struct hdmi_audio_infoframe infofame
;
384 u8 buffer
[HDMI_INFOFRAME_SIZE(AUDIO
)];
387 ret
= hdmi_audio_infoframe_init(&infofame
);
389 DRM_ERROR("failed to setup audio infoframe: %d\n", ret
);
393 infofame
.channels
= 2;
395 ret
= hdmi_audio_infoframe_pack(&infofame
, buffer
, sizeof(buffer
));
397 DRM_ERROR("failed to pack audio infoframe: %d\n", ret
);
401 hdmi_infoframe_write_infopack(hdmi
, buffer
);
407 * Software reset of the hdmi subsystem
409 * @hdmi: pointer on the hdmi internal structure
412 #define HDMI_TIMEOUT_SWRESET 100 /*milliseconds */
413 static void hdmi_swreset(struct sti_hdmi
*hdmi
)
417 DRM_DEBUG_DRIVER("\n");
419 /* Enable hdmi_audio clock only during hdmi reset */
420 if (clk_prepare_enable(hdmi
->clk_audio
))
421 DRM_INFO("Failed to prepare/enable hdmi_audio clk\n");
424 hdmi
->event_received
= false;
426 val
= hdmi_read(hdmi
, HDMI_CFG
);
427 val
|= HDMI_CFG_SW_RST_EN
;
428 hdmi_write(hdmi
, val
, HDMI_CFG
);
430 /* Wait reset completed */
431 wait_event_interruptible_timeout(hdmi
->wait_event
,
432 hdmi
->event_received
== true,
434 (HDMI_TIMEOUT_SWRESET
));
437 * HDMI_STA_SW_RST bit is set to '1' when SW_RST bit in HDMI_CFG is
438 * set to '1' and clk_audio is running.
440 if ((hdmi_read(hdmi
, HDMI_STA
) & HDMI_STA_SW_RST
) == 0)
441 DRM_DEBUG_DRIVER("Warning: HDMI sw reset timeout occurs\n");
443 val
= hdmi_read(hdmi
, HDMI_CFG
);
444 val
&= ~HDMI_CFG_SW_RST_EN
;
445 hdmi_write(hdmi
, val
, HDMI_CFG
);
447 /* Disable hdmi_audio clock. Not used anymore for drm purpose */
448 clk_disable_unprepare(hdmi
->clk_audio
);
451 static void sti_hdmi_disable(struct drm_bridge
*bridge
)
453 struct sti_hdmi
*hdmi
= bridge
->driver_private
;
455 u32 val
= hdmi_read(hdmi
, HDMI_CFG
);
460 DRM_DEBUG_DRIVER("\n");
463 val
&= ~HDMI_CFG_DEVICE_EN
;
464 hdmi_write(hdmi
, val
, HDMI_CFG
);
466 hdmi_write(hdmi
, 0xffffffff, HDMI_INT_CLR
);
469 hdmi
->phy_ops
->stop(hdmi
);
471 /* Set the default channel data to be a dark red */
472 hdmi_write(hdmi
, 0x0000, HDMI_DFLT_CHL0_DAT
);
473 hdmi_write(hdmi
, 0x0000, HDMI_DFLT_CHL1_DAT
);
474 hdmi_write(hdmi
, 0x0060, HDMI_DFLT_CHL2_DAT
);
476 /* Disable/unprepare hdmi clock */
477 clk_disable_unprepare(hdmi
->clk_phy
);
478 clk_disable_unprepare(hdmi
->clk_tmds
);
479 clk_disable_unprepare(hdmi
->clk_pix
);
481 hdmi
->enabled
= false;
484 static void sti_hdmi_pre_enable(struct drm_bridge
*bridge
)
486 struct sti_hdmi
*hdmi
= bridge
->driver_private
;
488 DRM_DEBUG_DRIVER("\n");
493 /* Prepare/enable clocks */
494 if (clk_prepare_enable(hdmi
->clk_pix
))
495 DRM_ERROR("Failed to prepare/enable hdmi_pix clk\n");
496 if (clk_prepare_enable(hdmi
->clk_tmds
))
497 DRM_ERROR("Failed to prepare/enable hdmi_tmds clk\n");
498 if (clk_prepare_enable(hdmi
->clk_phy
))
499 DRM_ERROR("Failed to prepare/enable hdmi_rejec_pll clk\n");
501 hdmi
->enabled
= true;
503 /* Program hdmi serializer and start phy */
504 if (!hdmi
->phy_ops
->start(hdmi
)) {
505 DRM_ERROR("Unable to start hdmi phy\n");
509 /* Program hdmi active area */
510 hdmi_active_area(hdmi
);
512 /* Enable working interrupts */
513 hdmi_write(hdmi
, HDMI_WORKING_INT
, HDMI_INT_EN
);
515 /* Program hdmi config */
518 /* Program AVI infoframe */
519 if (hdmi_avi_infoframe_config(hdmi
))
520 DRM_ERROR("Unable to configure AVI infoframe\n");
522 /* Program AUDIO infoframe */
523 if (hdmi_audio_infoframe_config(hdmi
))
524 DRM_ERROR("Unable to configure AUDIO infoframe\n");
530 static void sti_hdmi_set_mode(struct drm_bridge
*bridge
,
531 struct drm_display_mode
*mode
,
532 struct drm_display_mode
*adjusted_mode
)
534 struct sti_hdmi
*hdmi
= bridge
->driver_private
;
537 DRM_DEBUG_DRIVER("\n");
539 /* Copy the drm display mode in the connector local structure */
540 memcpy(&hdmi
->mode
, mode
, sizeof(struct drm_display_mode
));
542 /* Update clock framerate according to the selected mode */
543 ret
= clk_set_rate(hdmi
->clk_pix
, mode
->clock
* 1000);
545 DRM_ERROR("Cannot set rate (%dHz) for hdmi_pix clk\n",
549 ret
= clk_set_rate(hdmi
->clk_phy
, mode
->clock
* 1000);
551 DRM_ERROR("Cannot set rate (%dHz) for hdmi_rejection_pll clk\n",
557 static void sti_hdmi_bridge_nope(struct drm_bridge
*bridge
)
562 static const struct drm_bridge_funcs sti_hdmi_bridge_funcs
= {
563 .pre_enable
= sti_hdmi_pre_enable
,
564 .enable
= sti_hdmi_bridge_nope
,
565 .disable
= sti_hdmi_disable
,
566 .post_disable
= sti_hdmi_bridge_nope
,
567 .mode_set
= sti_hdmi_set_mode
,
570 static int sti_hdmi_connector_get_modes(struct drm_connector
*connector
)
572 struct sti_hdmi_connector
*hdmi_connector
573 = to_sti_hdmi_connector(connector
);
574 struct sti_hdmi
*hdmi
= hdmi_connector
->hdmi
;
578 DRM_DEBUG_DRIVER("\n");
580 edid
= drm_get_edid(connector
, hdmi
->ddc_adapt
);
584 count
= drm_add_edid_modes(connector
, edid
);
585 drm_mode_connector_update_edid_property(connector
, edid
);
591 DRM_ERROR("Can't read HDMI EDID\n");
595 #define CLK_TOLERANCE_HZ 50
597 static int sti_hdmi_connector_mode_valid(struct drm_connector
*connector
,
598 struct drm_display_mode
*mode
)
600 int target
= mode
->clock
* 1000;
601 int target_min
= target
- CLK_TOLERANCE_HZ
;
602 int target_max
= target
+ CLK_TOLERANCE_HZ
;
604 struct sti_hdmi_connector
*hdmi_connector
605 = to_sti_hdmi_connector(connector
);
606 struct sti_hdmi
*hdmi
= hdmi_connector
->hdmi
;
609 result
= clk_round_rate(hdmi
->clk_pix
, target
);
611 DRM_DEBUG_DRIVER("target rate = %d => available rate = %d\n",
614 if ((result
< target_min
) || (result
> target_max
)) {
615 DRM_DEBUG_DRIVER("hdmi pixclk=%d not supported\n", target
);
622 struct drm_encoder
*sti_hdmi_best_encoder(struct drm_connector
*connector
)
624 struct sti_hdmi_connector
*hdmi_connector
625 = to_sti_hdmi_connector(connector
);
627 /* Best encoder is the one associated during connector creation */
628 return hdmi_connector
->encoder
;
632 struct drm_connector_helper_funcs sti_hdmi_connector_helper_funcs
= {
633 .get_modes
= sti_hdmi_connector_get_modes
,
634 .mode_valid
= sti_hdmi_connector_mode_valid
,
635 .best_encoder
= sti_hdmi_best_encoder
,
638 /* get detection status of display device */
639 static enum drm_connector_status
640 sti_hdmi_connector_detect(struct drm_connector
*connector
, bool force
)
642 struct sti_hdmi_connector
*hdmi_connector
643 = to_sti_hdmi_connector(connector
);
644 struct sti_hdmi
*hdmi
= hdmi_connector
->hdmi
;
646 DRM_DEBUG_DRIVER("\n");
649 DRM_DEBUG_DRIVER("hdmi cable connected\n");
650 return connector_status_connected
;
653 DRM_DEBUG_DRIVER("hdmi cable disconnected\n");
654 return connector_status_disconnected
;
657 static void sti_hdmi_connector_destroy(struct drm_connector
*connector
)
659 struct sti_hdmi_connector
*hdmi_connector
660 = to_sti_hdmi_connector(connector
);
662 drm_connector_unregister(connector
);
663 drm_connector_cleanup(connector
);
664 kfree(hdmi_connector
);
667 static const struct drm_connector_funcs sti_hdmi_connector_funcs
= {
668 .dpms
= drm_atomic_helper_connector_dpms
,
669 .fill_modes
= drm_helper_probe_single_connector_modes
,
670 .detect
= sti_hdmi_connector_detect
,
671 .destroy
= sti_hdmi_connector_destroy
,
672 .reset
= drm_atomic_helper_connector_reset
,
673 .atomic_duplicate_state
= drm_atomic_helper_connector_duplicate_state
,
674 .atomic_destroy_state
= drm_atomic_helper_connector_destroy_state
,
677 static struct drm_encoder
*sti_hdmi_find_encoder(struct drm_device
*dev
)
679 struct drm_encoder
*encoder
;
681 list_for_each_entry(encoder
, &dev
->mode_config
.encoder_list
, head
) {
682 if (encoder
->encoder_type
== DRM_MODE_ENCODER_TMDS
)
689 static int sti_hdmi_bind(struct device
*dev
, struct device
*master
, void *data
)
691 struct sti_hdmi
*hdmi
= dev_get_drvdata(dev
);
692 struct drm_device
*drm_dev
= data
;
693 struct drm_encoder
*encoder
;
694 struct sti_hdmi_connector
*connector
;
695 struct drm_connector
*drm_connector
;
696 struct drm_bridge
*bridge
;
699 /* Set the drm device handle */
700 hdmi
->drm_dev
= drm_dev
;
702 encoder
= sti_hdmi_find_encoder(drm_dev
);
706 connector
= devm_kzalloc(dev
, sizeof(*connector
), GFP_KERNEL
);
710 connector
->hdmi
= hdmi
;
712 bridge
= devm_kzalloc(dev
, sizeof(*bridge
), GFP_KERNEL
);
716 bridge
->driver_private
= hdmi
;
717 bridge
->funcs
= &sti_hdmi_bridge_funcs
;
718 drm_bridge_attach(drm_dev
, bridge
);
720 encoder
->bridge
= bridge
;
721 connector
->encoder
= encoder
;
723 drm_connector
= (struct drm_connector
*)connector
;
725 drm_connector
->polled
= DRM_CONNECTOR_POLL_HPD
;
727 drm_connector_init(drm_dev
, drm_connector
,
728 &sti_hdmi_connector_funcs
, DRM_MODE_CONNECTOR_HDMIA
);
729 drm_connector_helper_add(drm_connector
,
730 &sti_hdmi_connector_helper_funcs
);
732 err
= drm_connector_register(drm_connector
);
736 err
= drm_mode_connector_attach_encoder(drm_connector
, encoder
);
738 DRM_ERROR("Failed to attach a connector to a encoder\n");
742 /* Enable default interrupts */
743 hdmi_write(hdmi
, HDMI_DEFAULT_INT
, HDMI_INT_EN
);
748 drm_connector_unregister(drm_connector
);
750 drm_connector_cleanup(drm_connector
);
755 static void sti_hdmi_unbind(struct device
*dev
,
756 struct device
*master
, void *data
)
761 static const struct component_ops sti_hdmi_ops
= {
762 .bind
= sti_hdmi_bind
,
763 .unbind
= sti_hdmi_unbind
,
766 static const struct of_device_id hdmi_of_match
[] = {
768 .compatible
= "st,stih416-hdmi",
769 .data
= &tx3g0c55phy_ops
,
771 .compatible
= "st,stih407-hdmi",
772 .data
= &tx3g4c28phy_ops
,
777 MODULE_DEVICE_TABLE(of
, hdmi_of_match
);
779 static int sti_hdmi_probe(struct platform_device
*pdev
)
781 struct device
*dev
= &pdev
->dev
;
782 struct sti_hdmi
*hdmi
;
783 struct device_node
*np
= dev
->of_node
;
784 struct resource
*res
;
785 struct device_node
*ddc
;
788 DRM_INFO("%s\n", __func__
);
790 hdmi
= devm_kzalloc(dev
, sizeof(*hdmi
), GFP_KERNEL
);
794 ddc
= of_parse_phandle(pdev
->dev
.of_node
, "ddc", 0);
796 hdmi
->ddc_adapt
= of_get_i2c_adapter_by_node(ddc
);
798 if (!hdmi
->ddc_adapt
)
799 return -EPROBE_DEFER
;
802 hdmi
->dev
= pdev
->dev
;
805 res
= platform_get_resource_byname(pdev
, IORESOURCE_MEM
, "hdmi-reg");
807 DRM_ERROR("Invalid hdmi resource\n");
809 goto release_adapter
;
811 hdmi
->regs
= devm_ioremap_nocache(dev
, res
->start
, resource_size(res
));
814 goto release_adapter
;
817 if (of_device_is_compatible(np
, "st,stih416-hdmi")) {
818 res
= platform_get_resource_byname(pdev
, IORESOURCE_MEM
,
821 DRM_ERROR("Invalid syscfg resource\n");
823 goto release_adapter
;
825 hdmi
->syscfg
= devm_ioremap_nocache(dev
, res
->start
,
829 goto release_adapter
;
833 hdmi
->phy_ops
= (struct hdmi_phy_ops
*)
834 of_match_node(hdmi_of_match
, np
)->data
;
836 /* Get clock resources */
837 hdmi
->clk_pix
= devm_clk_get(dev
, "pix");
838 if (IS_ERR(hdmi
->clk_pix
)) {
839 DRM_ERROR("Cannot get hdmi_pix clock\n");
840 ret
= PTR_ERR(hdmi
->clk_pix
);
841 goto release_adapter
;
844 hdmi
->clk_tmds
= devm_clk_get(dev
, "tmds");
845 if (IS_ERR(hdmi
->clk_tmds
)) {
846 DRM_ERROR("Cannot get hdmi_tmds clock\n");
847 ret
= PTR_ERR(hdmi
->clk_tmds
);
848 goto release_adapter
;
851 hdmi
->clk_phy
= devm_clk_get(dev
, "phy");
852 if (IS_ERR(hdmi
->clk_phy
)) {
853 DRM_ERROR("Cannot get hdmi_phy clock\n");
854 ret
= PTR_ERR(hdmi
->clk_phy
);
855 goto release_adapter
;
858 hdmi
->clk_audio
= devm_clk_get(dev
, "audio");
859 if (IS_ERR(hdmi
->clk_audio
)) {
860 DRM_ERROR("Cannot get hdmi_audio clock\n");
861 ret
= PTR_ERR(hdmi
->clk_audio
);
862 goto release_adapter
;
865 hdmi
->hpd
= readl(hdmi
->regs
+ HDMI_STA
) & HDMI_STA_HOT_PLUG
;
867 init_waitqueue_head(&hdmi
->wait_event
);
869 hdmi
->irq
= platform_get_irq_byname(pdev
, "irq");
871 ret
= devm_request_threaded_irq(dev
, hdmi
->irq
, hdmi_irq
,
872 hdmi_irq_thread
, IRQF_ONESHOT
, dev_name(dev
), hdmi
);
874 DRM_ERROR("Failed to register HDMI interrupt\n");
875 goto release_adapter
;
878 hdmi
->reset
= devm_reset_control_get(dev
, "hdmi");
879 /* Take hdmi out of reset */
880 if (!IS_ERR(hdmi
->reset
))
881 reset_control_deassert(hdmi
->reset
);
883 platform_set_drvdata(pdev
, hdmi
);
885 return component_add(&pdev
->dev
, &sti_hdmi_ops
);
888 i2c_put_adapter(hdmi
->ddc_adapt
);
893 static int sti_hdmi_remove(struct platform_device
*pdev
)
895 struct sti_hdmi
*hdmi
= dev_get_drvdata(&pdev
->dev
);
897 i2c_put_adapter(hdmi
->ddc_adapt
);
898 component_del(&pdev
->dev
, &sti_hdmi_ops
);
903 struct platform_driver sti_hdmi_driver
= {
906 .owner
= THIS_MODULE
,
907 .of_match_table
= hdmi_of_match
,
909 .probe
= sti_hdmi_probe
,
910 .remove
= sti_hdmi_remove
,
913 MODULE_AUTHOR("Benjamin Gaignard <benjamin.gaignard@st.com>");
914 MODULE_DESCRIPTION("STMicroelectronics SoC DRM driver");
915 MODULE_LICENSE("GPL");