2 Copyright (C) 2010 Willow Garage <http://www.willowgarage.com>
3 Copyright (C) 2004 - 2010 Ivo van Doorn <IvDoorn@gmail.com>
4 Copyright (C) 2004 - 2009 Gertjan van Wingerde <gwingerde@gmail.com>
5 <http://rt2x00.serialmonkey.com>
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, see <http://www.gnu.org/licenses/>.
23 Abstract: rt2x00 queue specific routines.
26 #include <linux/slab.h>
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/dma-mapping.h>
32 #include "rt2x00lib.h"
34 struct sk_buff
*rt2x00queue_alloc_rxskb(struct queue_entry
*entry
, gfp_t gfp
)
36 struct data_queue
*queue
= entry
->queue
;
37 struct rt2x00_dev
*rt2x00dev
= queue
->rt2x00dev
;
39 struct skb_frame_desc
*skbdesc
;
40 unsigned int frame_size
;
41 unsigned int head_size
= 0;
42 unsigned int tail_size
= 0;
45 * The frame size includes descriptor size, because the
46 * hardware directly receive the frame into the skbuffer.
48 frame_size
= queue
->data_size
+ queue
->desc_size
+ queue
->winfo_size
;
51 * The payload should be aligned to a 4-byte boundary,
52 * this means we need at least 3 bytes for moving the frame
53 * into the correct offset.
58 * For IV/EIV/ICV assembly we must make sure there is
59 * at least 8 bytes bytes available in headroom for IV/EIV
60 * and 8 bytes for ICV data as tailroon.
62 if (rt2x00_has_cap_hw_crypto(rt2x00dev
)) {
70 skb
= __dev_alloc_skb(frame_size
+ head_size
+ tail_size
, gfp
);
75 * Make sure we not have a frame with the requested bytes
76 * available in the head and tail.
78 skb_reserve(skb
, head_size
);
79 skb_put(skb
, frame_size
);
84 skbdesc
= get_skb_frame_desc(skb
);
85 memset(skbdesc
, 0, sizeof(*skbdesc
));
86 skbdesc
->entry
= entry
;
88 if (test_bit(REQUIRE_DMA
, &rt2x00dev
->cap_flags
)) {
91 skb_dma
= dma_map_single(rt2x00dev
->dev
, skb
->data
, skb
->len
,
93 if (unlikely(dma_mapping_error(rt2x00dev
->dev
, skb_dma
))) {
94 dev_kfree_skb_any(skb
);
98 skbdesc
->skb_dma
= skb_dma
;
99 skbdesc
->flags
|= SKBDESC_DMA_MAPPED_RX
;
105 int rt2x00queue_map_txskb(struct queue_entry
*entry
)
107 struct device
*dev
= entry
->queue
->rt2x00dev
->dev
;
108 struct skb_frame_desc
*skbdesc
= get_skb_frame_desc(entry
->skb
);
111 dma_map_single(dev
, entry
->skb
->data
, entry
->skb
->len
, DMA_TO_DEVICE
);
113 if (unlikely(dma_mapping_error(dev
, skbdesc
->skb_dma
)))
116 skbdesc
->flags
|= SKBDESC_DMA_MAPPED_TX
;
119 EXPORT_SYMBOL_GPL(rt2x00queue_map_txskb
);
121 void rt2x00queue_unmap_skb(struct queue_entry
*entry
)
123 struct device
*dev
= entry
->queue
->rt2x00dev
->dev
;
124 struct skb_frame_desc
*skbdesc
= get_skb_frame_desc(entry
->skb
);
126 if (skbdesc
->flags
& SKBDESC_DMA_MAPPED_RX
) {
127 dma_unmap_single(dev
, skbdesc
->skb_dma
, entry
->skb
->len
,
129 skbdesc
->flags
&= ~SKBDESC_DMA_MAPPED_RX
;
130 } else if (skbdesc
->flags
& SKBDESC_DMA_MAPPED_TX
) {
131 dma_unmap_single(dev
, skbdesc
->skb_dma
, entry
->skb
->len
,
133 skbdesc
->flags
&= ~SKBDESC_DMA_MAPPED_TX
;
136 EXPORT_SYMBOL_GPL(rt2x00queue_unmap_skb
);
138 void rt2x00queue_free_skb(struct queue_entry
*entry
)
143 rt2x00queue_unmap_skb(entry
);
144 dev_kfree_skb_any(entry
->skb
);
148 void rt2x00queue_align_frame(struct sk_buff
*skb
)
150 unsigned int frame_length
= skb
->len
;
151 unsigned int align
= ALIGN_SIZE(skb
, 0);
156 skb_push(skb
, align
);
157 memmove(skb
->data
, skb
->data
+ align
, frame_length
);
158 skb_trim(skb
, frame_length
);
161 void rt2x00queue_insert_l2pad(struct sk_buff
*skb
, unsigned int header_length
)
163 unsigned int payload_length
= skb
->len
- header_length
;
164 unsigned int header_align
= ALIGN_SIZE(skb
, 0);
165 unsigned int payload_align
= ALIGN_SIZE(skb
, header_length
);
166 unsigned int l2pad
= payload_length
? L2PAD_SIZE(header_length
) : 0;
169 * Adjust the header alignment if the payload needs to be moved more
172 if (payload_align
> header_align
)
175 /* There is nothing to do if no alignment is needed */
179 /* Reserve the amount of space needed in front of the frame */
180 skb_push(skb
, header_align
);
185 memmove(skb
->data
, skb
->data
+ header_align
, header_length
);
187 /* Move the payload, if present and if required */
188 if (payload_length
&& payload_align
)
189 memmove(skb
->data
+ header_length
+ l2pad
,
190 skb
->data
+ header_length
+ l2pad
+ payload_align
,
193 /* Trim the skb to the correct size */
194 skb_trim(skb
, header_length
+ l2pad
+ payload_length
);
197 void rt2x00queue_remove_l2pad(struct sk_buff
*skb
, unsigned int header_length
)
200 * L2 padding is only present if the skb contains more than just the
201 * IEEE 802.11 header.
203 unsigned int l2pad
= (skb
->len
> header_length
) ?
204 L2PAD_SIZE(header_length
) : 0;
209 memmove(skb
->data
+ l2pad
, skb
->data
, header_length
);
210 skb_pull(skb
, l2pad
);
213 static void rt2x00queue_create_tx_descriptor_seq(struct rt2x00_dev
*rt2x00dev
,
215 struct txentry_desc
*txdesc
)
217 struct ieee80211_tx_info
*tx_info
= IEEE80211_SKB_CB(skb
);
218 struct ieee80211_hdr
*hdr
= (struct ieee80211_hdr
*)skb
->data
;
219 struct rt2x00_intf
*intf
= vif_to_intf(tx_info
->control
.vif
);
222 if (!(tx_info
->flags
& IEEE80211_TX_CTL_ASSIGN_SEQ
))
225 __set_bit(ENTRY_TXD_GENERATE_SEQ
, &txdesc
->flags
);
227 if (!test_bit(REQUIRE_SW_SEQNO
, &rt2x00dev
->cap_flags
)) {
229 * rt2800 has a H/W (or F/W) bug, device incorrectly increase
230 * seqno on retransmited data (non-QOS) frames. To workaround
231 * the problem let's generate seqno in software if QOS is
234 if (test_bit(CONFIG_QOS_DISABLED
, &rt2x00dev
->flags
))
235 __clear_bit(ENTRY_TXD_GENERATE_SEQ
, &txdesc
->flags
);
237 /* H/W will generate sequence number */
242 * The hardware is not able to insert a sequence number. Assign a
243 * software generated one here.
245 * This is wrong because beacons are not getting sequence
246 * numbers assigned properly.
248 * A secondary problem exists for drivers that cannot toggle
249 * sequence counting per-frame, since those will override the
250 * sequence counter given by mac80211.
252 if (test_bit(ENTRY_TXD_FIRST_FRAGMENT
, &txdesc
->flags
))
253 seqno
= atomic_add_return(0x10, &intf
->seqno
);
255 seqno
= atomic_read(&intf
->seqno
);
257 hdr
->seq_ctrl
&= cpu_to_le16(IEEE80211_SCTL_FRAG
);
258 hdr
->seq_ctrl
|= cpu_to_le16(seqno
);
261 static void rt2x00queue_create_tx_descriptor_plcp(struct rt2x00_dev
*rt2x00dev
,
263 struct txentry_desc
*txdesc
,
264 const struct rt2x00_rate
*hwrate
)
266 struct ieee80211_tx_info
*tx_info
= IEEE80211_SKB_CB(skb
);
267 struct ieee80211_tx_rate
*txrate
= &tx_info
->control
.rates
[0];
268 unsigned int data_length
;
269 unsigned int duration
;
270 unsigned int residual
;
273 * Determine with what IFS priority this frame should be send.
274 * Set ifs to IFS_SIFS when the this is not the first fragment,
275 * or this fragment came after RTS/CTS.
277 if (test_bit(ENTRY_TXD_FIRST_FRAGMENT
, &txdesc
->flags
))
278 txdesc
->u
.plcp
.ifs
= IFS_BACKOFF
;
280 txdesc
->u
.plcp
.ifs
= IFS_SIFS
;
282 /* Data length + CRC + Crypto overhead (IV/EIV/ICV/MIC) */
283 data_length
= skb
->len
+ 4;
284 data_length
+= rt2x00crypto_tx_overhead(rt2x00dev
, skb
);
288 * Length calculation depends on OFDM/CCK rate.
290 txdesc
->u
.plcp
.signal
= hwrate
->plcp
;
291 txdesc
->u
.plcp
.service
= 0x04;
293 if (hwrate
->flags
& DEV_RATE_OFDM
) {
294 txdesc
->u
.plcp
.length_high
= (data_length
>> 6) & 0x3f;
295 txdesc
->u
.plcp
.length_low
= data_length
& 0x3f;
298 * Convert length to microseconds.
300 residual
= GET_DURATION_RES(data_length
, hwrate
->bitrate
);
301 duration
= GET_DURATION(data_length
, hwrate
->bitrate
);
307 * Check if we need to set the Length Extension
309 if (hwrate
->bitrate
== 110 && residual
<= 30)
310 txdesc
->u
.plcp
.service
|= 0x80;
313 txdesc
->u
.plcp
.length_high
= (duration
>> 8) & 0xff;
314 txdesc
->u
.plcp
.length_low
= duration
& 0xff;
317 * When preamble is enabled we should set the
318 * preamble bit for the signal.
320 if (txrate
->flags
& IEEE80211_TX_RC_USE_SHORT_PREAMBLE
)
321 txdesc
->u
.plcp
.signal
|= 0x08;
325 static void rt2x00queue_create_tx_descriptor_ht(struct rt2x00_dev
*rt2x00dev
,
327 struct txentry_desc
*txdesc
,
328 struct ieee80211_sta
*sta
,
329 const struct rt2x00_rate
*hwrate
)
331 struct ieee80211_tx_info
*tx_info
= IEEE80211_SKB_CB(skb
);
332 struct ieee80211_tx_rate
*txrate
= &tx_info
->control
.rates
[0];
333 struct ieee80211_hdr
*hdr
= (struct ieee80211_hdr
*)skb
->data
;
334 struct rt2x00_sta
*sta_priv
= NULL
;
337 txdesc
->u
.ht
.mpdu_density
=
338 sta
->ht_cap
.ampdu_density
;
340 sta_priv
= sta_to_rt2x00_sta(sta
);
341 txdesc
->u
.ht
.wcid
= sta_priv
->wcid
;
345 * If IEEE80211_TX_RC_MCS is set txrate->idx just contains the
346 * mcs rate to be used
348 if (txrate
->flags
& IEEE80211_TX_RC_MCS
) {
349 txdesc
->u
.ht
.mcs
= txrate
->idx
;
352 * MIMO PS should be set to 1 for STA's using dynamic SM PS
353 * when using more then one tx stream (>MCS7).
355 if (sta
&& txdesc
->u
.ht
.mcs
> 7 &&
356 sta
->smps_mode
== IEEE80211_SMPS_DYNAMIC
)
357 __set_bit(ENTRY_TXD_HT_MIMO_PS
, &txdesc
->flags
);
359 txdesc
->u
.ht
.mcs
= rt2x00_get_rate_mcs(hwrate
->mcs
);
360 if (txrate
->flags
& IEEE80211_TX_RC_USE_SHORT_PREAMBLE
)
361 txdesc
->u
.ht
.mcs
|= 0x08;
364 if (test_bit(CONFIG_HT_DISABLED
, &rt2x00dev
->flags
)) {
365 if (!(tx_info
->flags
& IEEE80211_TX_CTL_FIRST_FRAGMENT
))
366 txdesc
->u
.ht
.txop
= TXOP_SIFS
;
368 txdesc
->u
.ht
.txop
= TXOP_BACKOFF
;
370 /* Left zero on all other settings. */
374 txdesc
->u
.ht
.ba_size
= 7; /* FIXME: What value is needed? */
377 * Only one STBC stream is supported for now.
379 if (tx_info
->flags
& IEEE80211_TX_CTL_STBC
)
380 txdesc
->u
.ht
.stbc
= 1;
383 * This frame is eligible for an AMPDU, however, don't aggregate
384 * frames that are intended to probe a specific tx rate.
386 if (tx_info
->flags
& IEEE80211_TX_CTL_AMPDU
&&
387 !(tx_info
->flags
& IEEE80211_TX_CTL_RATE_CTRL_PROBE
))
388 __set_bit(ENTRY_TXD_HT_AMPDU
, &txdesc
->flags
);
391 * Set 40Mhz mode if necessary (for legacy rates this will
392 * duplicate the frame to both channels).
394 if (txrate
->flags
& IEEE80211_TX_RC_40_MHZ_WIDTH
||
395 txrate
->flags
& IEEE80211_TX_RC_DUP_DATA
)
396 __set_bit(ENTRY_TXD_HT_BW_40
, &txdesc
->flags
);
397 if (txrate
->flags
& IEEE80211_TX_RC_SHORT_GI
)
398 __set_bit(ENTRY_TXD_HT_SHORT_GI
, &txdesc
->flags
);
401 * Determine IFS values
402 * - Use TXOP_BACKOFF for management frames except beacons
403 * - Use TXOP_SIFS for fragment bursts
404 * - Use TXOP_HTTXOP for everything else
406 * Note: rt2800 devices won't use CTS protection (if used)
407 * for frames not transmitted with TXOP_HTTXOP
409 if (ieee80211_is_mgmt(hdr
->frame_control
) &&
410 !ieee80211_is_beacon(hdr
->frame_control
))
411 txdesc
->u
.ht
.txop
= TXOP_BACKOFF
;
412 else if (!(tx_info
->flags
& IEEE80211_TX_CTL_FIRST_FRAGMENT
))
413 txdesc
->u
.ht
.txop
= TXOP_SIFS
;
415 txdesc
->u
.ht
.txop
= TXOP_HTTXOP
;
418 static void rt2x00queue_create_tx_descriptor(struct rt2x00_dev
*rt2x00dev
,
420 struct txentry_desc
*txdesc
,
421 struct ieee80211_sta
*sta
)
423 struct ieee80211_tx_info
*tx_info
= IEEE80211_SKB_CB(skb
);
424 struct ieee80211_hdr
*hdr
= (struct ieee80211_hdr
*)skb
->data
;
425 struct ieee80211_tx_rate
*txrate
= &tx_info
->control
.rates
[0];
426 struct ieee80211_rate
*rate
;
427 const struct rt2x00_rate
*hwrate
= NULL
;
429 memset(txdesc
, 0, sizeof(*txdesc
));
432 * Header and frame information.
434 txdesc
->length
= skb
->len
;
435 txdesc
->header_length
= ieee80211_get_hdrlen_from_skb(skb
);
438 * Check whether this frame is to be acked.
440 if (!(tx_info
->flags
& IEEE80211_TX_CTL_NO_ACK
))
441 __set_bit(ENTRY_TXD_ACK
, &txdesc
->flags
);
444 * Check if this is a RTS/CTS frame
446 if (ieee80211_is_rts(hdr
->frame_control
) ||
447 ieee80211_is_cts(hdr
->frame_control
)) {
448 __set_bit(ENTRY_TXD_BURST
, &txdesc
->flags
);
449 if (ieee80211_is_rts(hdr
->frame_control
))
450 __set_bit(ENTRY_TXD_RTS_FRAME
, &txdesc
->flags
);
452 __set_bit(ENTRY_TXD_CTS_FRAME
, &txdesc
->flags
);
453 if (tx_info
->control
.rts_cts_rate_idx
>= 0)
455 ieee80211_get_rts_cts_rate(rt2x00dev
->hw
, tx_info
);
459 * Determine retry information.
461 txdesc
->retry_limit
= tx_info
->control
.rates
[0].count
- 1;
462 if (txdesc
->retry_limit
>= rt2x00dev
->long_retry
)
463 __set_bit(ENTRY_TXD_RETRY_MODE
, &txdesc
->flags
);
466 * Check if more fragments are pending
468 if (ieee80211_has_morefrags(hdr
->frame_control
)) {
469 __set_bit(ENTRY_TXD_BURST
, &txdesc
->flags
);
470 __set_bit(ENTRY_TXD_MORE_FRAG
, &txdesc
->flags
);
474 * Check if more frames (!= fragments) are pending
476 if (tx_info
->flags
& IEEE80211_TX_CTL_MORE_FRAMES
)
477 __set_bit(ENTRY_TXD_BURST
, &txdesc
->flags
);
480 * Beacons and probe responses require the tsf timestamp
481 * to be inserted into the frame.
483 if (ieee80211_is_beacon(hdr
->frame_control
) ||
484 ieee80211_is_probe_resp(hdr
->frame_control
))
485 __set_bit(ENTRY_TXD_REQ_TIMESTAMP
, &txdesc
->flags
);
487 if ((tx_info
->flags
& IEEE80211_TX_CTL_FIRST_FRAGMENT
) &&
488 !test_bit(ENTRY_TXD_RTS_FRAME
, &txdesc
->flags
))
489 __set_bit(ENTRY_TXD_FIRST_FRAGMENT
, &txdesc
->flags
);
492 * Determine rate modulation.
494 if (txrate
->flags
& IEEE80211_TX_RC_GREEN_FIELD
)
495 txdesc
->rate_mode
= RATE_MODE_HT_GREENFIELD
;
496 else if (txrate
->flags
& IEEE80211_TX_RC_MCS
)
497 txdesc
->rate_mode
= RATE_MODE_HT_MIX
;
499 rate
= ieee80211_get_tx_rate(rt2x00dev
->hw
, tx_info
);
500 hwrate
= rt2x00_get_rate(rate
->hw_value
);
501 if (hwrate
->flags
& DEV_RATE_OFDM
)
502 txdesc
->rate_mode
= RATE_MODE_OFDM
;
504 txdesc
->rate_mode
= RATE_MODE_CCK
;
508 * Apply TX descriptor handling by components
510 rt2x00crypto_create_tx_descriptor(rt2x00dev
, skb
, txdesc
);
511 rt2x00queue_create_tx_descriptor_seq(rt2x00dev
, skb
, txdesc
);
513 if (test_bit(REQUIRE_HT_TX_DESC
, &rt2x00dev
->cap_flags
))
514 rt2x00queue_create_tx_descriptor_ht(rt2x00dev
, skb
, txdesc
,
517 rt2x00queue_create_tx_descriptor_plcp(rt2x00dev
, skb
, txdesc
,
521 static int rt2x00queue_write_tx_data(struct queue_entry
*entry
,
522 struct txentry_desc
*txdesc
)
524 struct rt2x00_dev
*rt2x00dev
= entry
->queue
->rt2x00dev
;
527 * This should not happen, we already checked the entry
528 * was ours. When the hardware disagrees there has been
529 * a queue corruption!
531 if (unlikely(rt2x00dev
->ops
->lib
->get_entry_state
&&
532 rt2x00dev
->ops
->lib
->get_entry_state(entry
))) {
533 rt2x00_err(rt2x00dev
,
534 "Corrupt queue %d, accessing entry which is not ours\n"
535 "Please file bug report to %s\n",
536 entry
->queue
->qid
, DRV_PROJECT
);
541 * Add the requested extra tx headroom in front of the skb.
543 skb_push(entry
->skb
, rt2x00dev
->extra_tx_headroom
);
544 memset(entry
->skb
->data
, 0, rt2x00dev
->extra_tx_headroom
);
547 * Call the driver's write_tx_data function, if it exists.
549 if (rt2x00dev
->ops
->lib
->write_tx_data
)
550 rt2x00dev
->ops
->lib
->write_tx_data(entry
, txdesc
);
553 * Map the skb to DMA.
555 if (test_bit(REQUIRE_DMA
, &rt2x00dev
->cap_flags
) &&
556 rt2x00queue_map_txskb(entry
))
562 static void rt2x00queue_write_tx_descriptor(struct queue_entry
*entry
,
563 struct txentry_desc
*txdesc
)
565 struct data_queue
*queue
= entry
->queue
;
567 queue
->rt2x00dev
->ops
->lib
->write_tx_desc(entry
, txdesc
);
570 * All processing on the frame has been completed, this means
571 * it is now ready to be dumped to userspace through debugfs.
573 rt2x00debug_dump_frame(queue
->rt2x00dev
, DUMP_FRAME_TX
, entry
->skb
);
576 static void rt2x00queue_kick_tx_queue(struct data_queue
*queue
,
577 struct txentry_desc
*txdesc
)
580 * Check if we need to kick the queue, there are however a few rules
581 * 1) Don't kick unless this is the last in frame in a burst.
582 * When the burst flag is set, this frame is always followed
583 * by another frame which in some way are related to eachother.
584 * This is true for fragments, RTS or CTS-to-self frames.
585 * 2) Rule 1 can be broken when the available entries
586 * in the queue are less then a certain threshold.
588 if (rt2x00queue_threshold(queue
) ||
589 !test_bit(ENTRY_TXD_BURST
, &txdesc
->flags
))
590 queue
->rt2x00dev
->ops
->lib
->kick_queue(queue
);
593 static void rt2x00queue_bar_check(struct queue_entry
*entry
)
595 struct rt2x00_dev
*rt2x00dev
= entry
->queue
->rt2x00dev
;
596 struct ieee80211_bar
*bar
= (void *) (entry
->skb
->data
+
597 rt2x00dev
->extra_tx_headroom
);
598 struct rt2x00_bar_list_entry
*bar_entry
;
600 if (likely(!ieee80211_is_back_req(bar
->frame_control
)))
603 bar_entry
= kmalloc(sizeof(*bar_entry
), GFP_ATOMIC
);
606 * If the alloc fails we still send the BAR out but just don't track
607 * it in our bar list. And as a result we will report it to mac80211
613 bar_entry
->entry
= entry
;
614 bar_entry
->block_acked
= 0;
617 * Copy the relevant parts of the 802.11 BAR into out check list
618 * such that we can use RCU for less-overhead in the RX path since
619 * sending BARs and processing the according BlockAck should be
622 memcpy(bar_entry
->ra
, bar
->ra
, sizeof(bar
->ra
));
623 memcpy(bar_entry
->ta
, bar
->ta
, sizeof(bar
->ta
));
624 bar_entry
->control
= bar
->control
;
625 bar_entry
->start_seq_num
= bar
->start_seq_num
;
628 * Insert BAR into our BAR check list.
630 spin_lock_bh(&rt2x00dev
->bar_list_lock
);
631 list_add_tail_rcu(&bar_entry
->list
, &rt2x00dev
->bar_list
);
632 spin_unlock_bh(&rt2x00dev
->bar_list_lock
);
635 int rt2x00queue_write_tx_frame(struct data_queue
*queue
, struct sk_buff
*skb
,
636 struct ieee80211_sta
*sta
, bool local
)
638 struct ieee80211_tx_info
*tx_info
;
639 struct queue_entry
*entry
;
640 struct txentry_desc txdesc
;
641 struct skb_frame_desc
*skbdesc
;
642 u8 rate_idx
, rate_flags
;
646 * Copy all TX descriptor information into txdesc,
647 * after that we are free to use the skb->cb array
648 * for our information.
650 rt2x00queue_create_tx_descriptor(queue
->rt2x00dev
, skb
, &txdesc
, sta
);
653 * All information is retrieved from the skb->cb array,
654 * now we should claim ownership of the driver part of that
655 * array, preserving the bitrate index and flags.
657 tx_info
= IEEE80211_SKB_CB(skb
);
658 rate_idx
= tx_info
->control
.rates
[0].idx
;
659 rate_flags
= tx_info
->control
.rates
[0].flags
;
660 skbdesc
= get_skb_frame_desc(skb
);
661 memset(skbdesc
, 0, sizeof(*skbdesc
));
662 skbdesc
->tx_rate_idx
= rate_idx
;
663 skbdesc
->tx_rate_flags
= rate_flags
;
666 skbdesc
->flags
|= SKBDESC_NOT_MAC80211
;
669 * When hardware encryption is supported, and this frame
670 * is to be encrypted, we should strip the IV/EIV data from
671 * the frame so we can provide it to the driver separately.
673 if (test_bit(ENTRY_TXD_ENCRYPT
, &txdesc
.flags
) &&
674 !test_bit(ENTRY_TXD_ENCRYPT_IV
, &txdesc
.flags
)) {
675 if (test_bit(REQUIRE_COPY_IV
, &queue
->rt2x00dev
->cap_flags
))
676 rt2x00crypto_tx_copy_iv(skb
, &txdesc
);
678 rt2x00crypto_tx_remove_iv(skb
, &txdesc
);
682 * When DMA allocation is required we should guarantee to the
683 * driver that the DMA is aligned to a 4-byte boundary.
684 * However some drivers require L2 padding to pad the payload
685 * rather then the header. This could be a requirement for
686 * PCI and USB devices, while header alignment only is valid
689 if (test_bit(REQUIRE_L2PAD
, &queue
->rt2x00dev
->cap_flags
))
690 rt2x00queue_insert_l2pad(skb
, txdesc
.header_length
);
691 else if (test_bit(REQUIRE_DMA
, &queue
->rt2x00dev
->cap_flags
))
692 rt2x00queue_align_frame(skb
);
695 * That function must be called with bh disabled.
697 spin_lock(&queue
->tx_lock
);
699 if (unlikely(rt2x00queue_full(queue
))) {
700 rt2x00_err(queue
->rt2x00dev
, "Dropping frame due to full tx queue %d\n",
706 entry
= rt2x00queue_get_entry(queue
, Q_INDEX
);
708 if (unlikely(test_and_set_bit(ENTRY_OWNER_DEVICE_DATA
,
710 rt2x00_err(queue
->rt2x00dev
,
711 "Arrived at non-free entry in the non-full queue %d\n"
712 "Please file bug report to %s\n",
713 queue
->qid
, DRV_PROJECT
);
718 skbdesc
->entry
= entry
;
722 * It could be possible that the queue was corrupted and this
723 * call failed. Since we always return NETDEV_TX_OK to mac80211,
724 * this frame will simply be dropped.
726 if (unlikely(rt2x00queue_write_tx_data(entry
, &txdesc
))) {
727 clear_bit(ENTRY_OWNER_DEVICE_DATA
, &entry
->flags
);
734 * Put BlockAckReqs into our check list for driver BA processing.
736 rt2x00queue_bar_check(entry
);
738 set_bit(ENTRY_DATA_PENDING
, &entry
->flags
);
740 rt2x00queue_index_inc(entry
, Q_INDEX
);
741 rt2x00queue_write_tx_descriptor(entry
, &txdesc
);
742 rt2x00queue_kick_tx_queue(queue
, &txdesc
);
745 spin_unlock(&queue
->tx_lock
);
749 int rt2x00queue_clear_beacon(struct rt2x00_dev
*rt2x00dev
,
750 struct ieee80211_vif
*vif
)
752 struct rt2x00_intf
*intf
= vif_to_intf(vif
);
754 if (unlikely(!intf
->beacon
))
757 mutex_lock(&intf
->beacon_skb_mutex
);
760 * Clean up the beacon skb.
762 rt2x00queue_free_skb(intf
->beacon
);
765 * Clear beacon (single bssid devices don't need to clear the beacon
766 * since the beacon queue will get stopped anyway).
768 if (rt2x00dev
->ops
->lib
->clear_beacon
)
769 rt2x00dev
->ops
->lib
->clear_beacon(intf
->beacon
);
771 mutex_unlock(&intf
->beacon_skb_mutex
);
776 int rt2x00queue_update_beacon_locked(struct rt2x00_dev
*rt2x00dev
,
777 struct ieee80211_vif
*vif
)
779 struct rt2x00_intf
*intf
= vif_to_intf(vif
);
780 struct skb_frame_desc
*skbdesc
;
781 struct txentry_desc txdesc
;
783 if (unlikely(!intf
->beacon
))
787 * Clean up the beacon skb.
789 rt2x00queue_free_skb(intf
->beacon
);
791 intf
->beacon
->skb
= ieee80211_beacon_get(rt2x00dev
->hw
, vif
);
792 if (!intf
->beacon
->skb
)
796 * Copy all TX descriptor information into txdesc,
797 * after that we are free to use the skb->cb array
798 * for our information.
800 rt2x00queue_create_tx_descriptor(rt2x00dev
, intf
->beacon
->skb
, &txdesc
, NULL
);
803 * Fill in skb descriptor
805 skbdesc
= get_skb_frame_desc(intf
->beacon
->skb
);
806 memset(skbdesc
, 0, sizeof(*skbdesc
));
807 skbdesc
->entry
= intf
->beacon
;
810 * Send beacon to hardware.
812 rt2x00dev
->ops
->lib
->write_beacon(intf
->beacon
, &txdesc
);
818 int rt2x00queue_update_beacon(struct rt2x00_dev
*rt2x00dev
,
819 struct ieee80211_vif
*vif
)
821 struct rt2x00_intf
*intf
= vif_to_intf(vif
);
824 mutex_lock(&intf
->beacon_skb_mutex
);
825 ret
= rt2x00queue_update_beacon_locked(rt2x00dev
, vif
);
826 mutex_unlock(&intf
->beacon_skb_mutex
);
831 bool rt2x00queue_for_each_entry(struct data_queue
*queue
,
832 enum queue_index start
,
833 enum queue_index end
,
835 bool (*fn
)(struct queue_entry
*entry
,
838 unsigned long irqflags
;
839 unsigned int index_start
;
840 unsigned int index_end
;
843 if (unlikely(start
>= Q_INDEX_MAX
|| end
>= Q_INDEX_MAX
)) {
844 rt2x00_err(queue
->rt2x00dev
,
845 "Entry requested from invalid index range (%d - %d)\n",
851 * Only protect the range we are going to loop over,
852 * if during our loop a extra entry is set to pending
853 * it should not be kicked during this run, since it
854 * is part of another TX operation.
856 spin_lock_irqsave(&queue
->index_lock
, irqflags
);
857 index_start
= queue
->index
[start
];
858 index_end
= queue
->index
[end
];
859 spin_unlock_irqrestore(&queue
->index_lock
, irqflags
);
862 * Start from the TX done pointer, this guarantees that we will
863 * send out all frames in the correct order.
865 if (index_start
< index_end
) {
866 for (i
= index_start
; i
< index_end
; i
++) {
867 if (fn(&queue
->entries
[i
], data
))
871 for (i
= index_start
; i
< queue
->limit
; i
++) {
872 if (fn(&queue
->entries
[i
], data
))
876 for (i
= 0; i
< index_end
; i
++) {
877 if (fn(&queue
->entries
[i
], data
))
884 EXPORT_SYMBOL_GPL(rt2x00queue_for_each_entry
);
886 struct queue_entry
*rt2x00queue_get_entry(struct data_queue
*queue
,
887 enum queue_index index
)
889 struct queue_entry
*entry
;
890 unsigned long irqflags
;
892 if (unlikely(index
>= Q_INDEX_MAX
)) {
893 rt2x00_err(queue
->rt2x00dev
, "Entry requested from invalid index type (%d)\n",
898 spin_lock_irqsave(&queue
->index_lock
, irqflags
);
900 entry
= &queue
->entries
[queue
->index
[index
]];
902 spin_unlock_irqrestore(&queue
->index_lock
, irqflags
);
906 EXPORT_SYMBOL_GPL(rt2x00queue_get_entry
);
908 void rt2x00queue_index_inc(struct queue_entry
*entry
, enum queue_index index
)
910 struct data_queue
*queue
= entry
->queue
;
911 unsigned long irqflags
;
913 if (unlikely(index
>= Q_INDEX_MAX
)) {
914 rt2x00_err(queue
->rt2x00dev
,
915 "Index change on invalid index type (%d)\n", index
);
919 spin_lock_irqsave(&queue
->index_lock
, irqflags
);
921 queue
->index
[index
]++;
922 if (queue
->index
[index
] >= queue
->limit
)
923 queue
->index
[index
] = 0;
925 entry
->last_action
= jiffies
;
927 if (index
== Q_INDEX
) {
929 } else if (index
== Q_INDEX_DONE
) {
934 spin_unlock_irqrestore(&queue
->index_lock
, irqflags
);
937 static void rt2x00queue_pause_queue_nocheck(struct data_queue
*queue
)
939 switch (queue
->qid
) {
945 * For TX queues, we have to disable the queue
948 ieee80211_stop_queue(queue
->rt2x00dev
->hw
, queue
->qid
);
954 void rt2x00queue_pause_queue(struct data_queue
*queue
)
956 if (!test_bit(DEVICE_STATE_PRESENT
, &queue
->rt2x00dev
->flags
) ||
957 !test_bit(QUEUE_STARTED
, &queue
->flags
) ||
958 test_and_set_bit(QUEUE_PAUSED
, &queue
->flags
))
961 rt2x00queue_pause_queue_nocheck(queue
);
963 EXPORT_SYMBOL_GPL(rt2x00queue_pause_queue
);
965 void rt2x00queue_unpause_queue(struct data_queue
*queue
)
967 if (!test_bit(DEVICE_STATE_PRESENT
, &queue
->rt2x00dev
->flags
) ||
968 !test_bit(QUEUE_STARTED
, &queue
->flags
) ||
969 !test_and_clear_bit(QUEUE_PAUSED
, &queue
->flags
))
972 switch (queue
->qid
) {
978 * For TX queues, we have to enable the queue
981 ieee80211_wake_queue(queue
->rt2x00dev
->hw
, queue
->qid
);
985 * For RX we need to kick the queue now in order to
988 queue
->rt2x00dev
->ops
->lib
->kick_queue(queue
);
993 EXPORT_SYMBOL_GPL(rt2x00queue_unpause_queue
);
995 void rt2x00queue_start_queue(struct data_queue
*queue
)
997 mutex_lock(&queue
->status_lock
);
999 if (!test_bit(DEVICE_STATE_PRESENT
, &queue
->rt2x00dev
->flags
) ||
1000 test_and_set_bit(QUEUE_STARTED
, &queue
->flags
)) {
1001 mutex_unlock(&queue
->status_lock
);
1005 set_bit(QUEUE_PAUSED
, &queue
->flags
);
1007 queue
->rt2x00dev
->ops
->lib
->start_queue(queue
);
1009 rt2x00queue_unpause_queue(queue
);
1011 mutex_unlock(&queue
->status_lock
);
1013 EXPORT_SYMBOL_GPL(rt2x00queue_start_queue
);
1015 void rt2x00queue_stop_queue(struct data_queue
*queue
)
1017 mutex_lock(&queue
->status_lock
);
1019 if (!test_and_clear_bit(QUEUE_STARTED
, &queue
->flags
)) {
1020 mutex_unlock(&queue
->status_lock
);
1024 rt2x00queue_pause_queue_nocheck(queue
);
1026 queue
->rt2x00dev
->ops
->lib
->stop_queue(queue
);
1028 mutex_unlock(&queue
->status_lock
);
1030 EXPORT_SYMBOL_GPL(rt2x00queue_stop_queue
);
1032 void rt2x00queue_flush_queue(struct data_queue
*queue
, bool drop
)
1035 (queue
->qid
== QID_AC_VO
) ||
1036 (queue
->qid
== QID_AC_VI
) ||
1037 (queue
->qid
== QID_AC_BE
) ||
1038 (queue
->qid
== QID_AC_BK
);
1042 * If we are not supposed to drop any pending
1043 * frames, this means we must force a start (=kick)
1044 * to the queue to make sure the hardware will
1045 * start transmitting.
1047 if (!drop
&& tx_queue
)
1048 queue
->rt2x00dev
->ops
->lib
->kick_queue(queue
);
1051 * Check if driver supports flushing, if that is the case we can
1052 * defer the flushing to the driver. Otherwise we must use the
1053 * alternative which just waits for the queue to become empty.
1055 if (likely(queue
->rt2x00dev
->ops
->lib
->flush_queue
))
1056 queue
->rt2x00dev
->ops
->lib
->flush_queue(queue
, drop
);
1059 * The queue flush has failed...
1061 if (unlikely(!rt2x00queue_empty(queue
)))
1062 rt2x00_warn(queue
->rt2x00dev
, "Queue %d failed to flush\n",
1065 EXPORT_SYMBOL_GPL(rt2x00queue_flush_queue
);
1067 void rt2x00queue_start_queues(struct rt2x00_dev
*rt2x00dev
)
1069 struct data_queue
*queue
;
1072 * rt2x00queue_start_queue will call ieee80211_wake_queue
1073 * for each queue after is has been properly initialized.
1075 tx_queue_for_each(rt2x00dev
, queue
)
1076 rt2x00queue_start_queue(queue
);
1078 rt2x00queue_start_queue(rt2x00dev
->rx
);
1080 EXPORT_SYMBOL_GPL(rt2x00queue_start_queues
);
1082 void rt2x00queue_stop_queues(struct rt2x00_dev
*rt2x00dev
)
1084 struct data_queue
*queue
;
1087 * rt2x00queue_stop_queue will call ieee80211_stop_queue
1088 * as well, but we are completely shutting doing everything
1089 * now, so it is much safer to stop all TX queues at once,
1090 * and use rt2x00queue_stop_queue for cleaning up.
1092 ieee80211_stop_queues(rt2x00dev
->hw
);
1094 tx_queue_for_each(rt2x00dev
, queue
)
1095 rt2x00queue_stop_queue(queue
);
1097 rt2x00queue_stop_queue(rt2x00dev
->rx
);
1099 EXPORT_SYMBOL_GPL(rt2x00queue_stop_queues
);
1101 void rt2x00queue_flush_queues(struct rt2x00_dev
*rt2x00dev
, bool drop
)
1103 struct data_queue
*queue
;
1105 tx_queue_for_each(rt2x00dev
, queue
)
1106 rt2x00queue_flush_queue(queue
, drop
);
1108 rt2x00queue_flush_queue(rt2x00dev
->rx
, drop
);
1110 EXPORT_SYMBOL_GPL(rt2x00queue_flush_queues
);
1112 static void rt2x00queue_reset(struct data_queue
*queue
)
1114 unsigned long irqflags
;
1117 spin_lock_irqsave(&queue
->index_lock
, irqflags
);
1122 for (i
= 0; i
< Q_INDEX_MAX
; i
++)
1123 queue
->index
[i
] = 0;
1125 spin_unlock_irqrestore(&queue
->index_lock
, irqflags
);
1128 void rt2x00queue_init_queues(struct rt2x00_dev
*rt2x00dev
)
1130 struct data_queue
*queue
;
1133 queue_for_each(rt2x00dev
, queue
) {
1134 rt2x00queue_reset(queue
);
1136 for (i
= 0; i
< queue
->limit
; i
++)
1137 rt2x00dev
->ops
->lib
->clear_entry(&queue
->entries
[i
]);
1141 static int rt2x00queue_alloc_entries(struct data_queue
*queue
)
1143 struct queue_entry
*entries
;
1144 unsigned int entry_size
;
1147 rt2x00queue_reset(queue
);
1150 * Allocate all queue entries.
1152 entry_size
= sizeof(*entries
) + queue
->priv_size
;
1153 entries
= kcalloc(queue
->limit
, entry_size
, GFP_KERNEL
);
1157 #define QUEUE_ENTRY_PRIV_OFFSET(__base, __index, __limit, __esize, __psize) \
1158 (((char *)(__base)) + ((__limit) * (__esize)) + \
1159 ((__index) * (__psize)))
1161 for (i
= 0; i
< queue
->limit
; i
++) {
1162 entries
[i
].flags
= 0;
1163 entries
[i
].queue
= queue
;
1164 entries
[i
].skb
= NULL
;
1165 entries
[i
].entry_idx
= i
;
1166 entries
[i
].priv_data
=
1167 QUEUE_ENTRY_PRIV_OFFSET(entries
, i
, queue
->limit
,
1168 sizeof(*entries
), queue
->priv_size
);
1171 #undef QUEUE_ENTRY_PRIV_OFFSET
1173 queue
->entries
= entries
;
1178 static void rt2x00queue_free_skbs(struct data_queue
*queue
)
1182 if (!queue
->entries
)
1185 for (i
= 0; i
< queue
->limit
; i
++) {
1186 rt2x00queue_free_skb(&queue
->entries
[i
]);
1190 static int rt2x00queue_alloc_rxskbs(struct data_queue
*queue
)
1193 struct sk_buff
*skb
;
1195 for (i
= 0; i
< queue
->limit
; i
++) {
1196 skb
= rt2x00queue_alloc_rxskb(&queue
->entries
[i
], GFP_KERNEL
);
1199 queue
->entries
[i
].skb
= skb
;
1205 int rt2x00queue_initialize(struct rt2x00_dev
*rt2x00dev
)
1207 struct data_queue
*queue
;
1210 status
= rt2x00queue_alloc_entries(rt2x00dev
->rx
);
1214 tx_queue_for_each(rt2x00dev
, queue
) {
1215 status
= rt2x00queue_alloc_entries(queue
);
1220 status
= rt2x00queue_alloc_entries(rt2x00dev
->bcn
);
1224 if (test_bit(REQUIRE_ATIM_QUEUE
, &rt2x00dev
->cap_flags
)) {
1225 status
= rt2x00queue_alloc_entries(rt2x00dev
->atim
);
1230 status
= rt2x00queue_alloc_rxskbs(rt2x00dev
->rx
);
1237 rt2x00_err(rt2x00dev
, "Queue entries allocation failed\n");
1239 rt2x00queue_uninitialize(rt2x00dev
);
1244 void rt2x00queue_uninitialize(struct rt2x00_dev
*rt2x00dev
)
1246 struct data_queue
*queue
;
1248 rt2x00queue_free_skbs(rt2x00dev
->rx
);
1250 queue_for_each(rt2x00dev
, queue
) {
1251 kfree(queue
->entries
);
1252 queue
->entries
= NULL
;
1256 static void rt2x00queue_init(struct rt2x00_dev
*rt2x00dev
,
1257 struct data_queue
*queue
, enum data_queue_qid qid
)
1259 mutex_init(&queue
->status_lock
);
1260 spin_lock_init(&queue
->tx_lock
);
1261 spin_lock_init(&queue
->index_lock
);
1263 queue
->rt2x00dev
= rt2x00dev
;
1270 rt2x00dev
->ops
->queue_init(queue
);
1272 queue
->threshold
= DIV_ROUND_UP(queue
->limit
, 10);
1275 int rt2x00queue_allocate(struct rt2x00_dev
*rt2x00dev
)
1277 struct data_queue
*queue
;
1278 enum data_queue_qid qid
;
1279 unsigned int req_atim
=
1280 !!test_bit(REQUIRE_ATIM_QUEUE
, &rt2x00dev
->cap_flags
);
1283 * We need the following queues:
1285 * TX: ops->tx_queues
1287 * Atim: 1 (if required)
1289 rt2x00dev
->data_queues
= 2 + rt2x00dev
->ops
->tx_queues
+ req_atim
;
1291 queue
= kcalloc(rt2x00dev
->data_queues
, sizeof(*queue
), GFP_KERNEL
);
1293 rt2x00_err(rt2x00dev
, "Queue allocation failed\n");
1298 * Initialize pointers
1300 rt2x00dev
->rx
= queue
;
1301 rt2x00dev
->tx
= &queue
[1];
1302 rt2x00dev
->bcn
= &queue
[1 + rt2x00dev
->ops
->tx_queues
];
1303 rt2x00dev
->atim
= req_atim
? &queue
[2 + rt2x00dev
->ops
->tx_queues
] : NULL
;
1306 * Initialize queue parameters.
1308 * TX: qid = QID_AC_VO + index
1309 * TX: cw_min: 2^5 = 32.
1310 * TX: cw_max: 2^10 = 1024.
1311 * BCN: qid = QID_BEACON
1312 * ATIM: qid = QID_ATIM
1314 rt2x00queue_init(rt2x00dev
, rt2x00dev
->rx
, QID_RX
);
1317 tx_queue_for_each(rt2x00dev
, queue
)
1318 rt2x00queue_init(rt2x00dev
, queue
, qid
++);
1320 rt2x00queue_init(rt2x00dev
, rt2x00dev
->bcn
, QID_BEACON
);
1322 rt2x00queue_init(rt2x00dev
, rt2x00dev
->atim
, QID_ATIM
);
1327 void rt2x00queue_free(struct rt2x00_dev
*rt2x00dev
)
1329 kfree(rt2x00dev
->rx
);
1330 rt2x00dev
->rx
= NULL
;
1331 rt2x00dev
->tx
= NULL
;
1332 rt2x00dev
->bcn
= NULL
;