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mm/zsmalloc: allocate exactly size of struct zs_pool
[linux/fpc-iii.git] / drivers / net / irda / vlsi_ir.c
blobac39d9f33d5fcf9734f889123b881c14d2716d8c
1 /*********************************************************************
2 *
3 * vlsi_ir.c: VLSI82C147 PCI IrDA controller driver for Linux
4 *
5 * Copyright (c) 2001-2003 Martin Diehl
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, see <http://www.gnu.org/licenses/>.
19 *
20 ********************************************************************/
21
22 #include <linux/module.h>
23
24 #define DRIVER_NAME "vlsi_ir"
25 #define DRIVER_VERSION "v0.5"
26 #define DRIVER_DESCRIPTION "IrDA SIR/MIR/FIR driver for VLSI 82C147"
27 #define DRIVER_AUTHOR "Martin Diehl <info@mdiehl.de>"
28
29 MODULE_DESCRIPTION(DRIVER_DESCRIPTION);
30 MODULE_AUTHOR(DRIVER_AUTHOR);
31 MODULE_LICENSE("GPL");
32
33 /********************************************************/
34
35 #include <linux/kernel.h>
36 #include <linux/init.h>
37 #include <linux/interrupt.h>
38 #include <linux/pci.h>
39 #include <linux/slab.h>
40 #include <linux/netdevice.h>
41 #include <linux/skbuff.h>
42 #include <linux/delay.h>
43 #include <linux/time.h>
44 #include <linux/proc_fs.h>
45 #include <linux/seq_file.h>
46 #include <linux/mutex.h>
47 #include <asm/uaccess.h>
48 #include <asm/byteorder.h>
49
50 #include <net/irda/irda.h>
51 #include <net/irda/irda_device.h>
52 #include <net/irda/wrapper.h>
53 #include <net/irda/crc.h>
54
55 #include "vlsi_ir.h"
56
57 /********************************************************/
58
59 static /* const */ char drivername[] = DRIVER_NAME;
60
61 static const struct pci_device_id vlsi_irda_table[] = {
62 {
63 .class = PCI_CLASS_WIRELESS_IRDA << 8,
64 .class_mask = PCI_CLASS_SUBCLASS_MASK << 8,
65 .vendor = PCI_VENDOR_ID_VLSI,
66 .device = PCI_DEVICE_ID_VLSI_82C147,
67 .subvendor = PCI_ANY_ID,
68 .subdevice = PCI_ANY_ID,
69 },
70 { /* all zeroes */ }
71 };
72
73 MODULE_DEVICE_TABLE(pci, vlsi_irda_table);
74
75 /********************************************************/
76
77 /* clksrc: which clock source to be used
78 * 0: auto - try PLL, fallback to 40MHz XCLK
79 * 1: on-chip 48MHz PLL
80 * 2: external 48MHz XCLK
81 * 3: external 40MHz XCLK (HP OB-800)
82 */
83
84 static int clksrc = 0; /* default is 0(auto) */
85 module_param(clksrc, int, 0);
86 MODULE_PARM_DESC(clksrc, "clock input source selection");
87
88 /* ringsize: size of the tx and rx descriptor rings
89 * independent for tx and rx
90 * specify as ringsize=tx[,rx]
91 * allowed values: 4, 8, 16, 32, 64
92 * Due to the IrDA 1.x max. allowed window size=7,
93 * there should be no gain when using rings larger than 8
94 */
95
96 static int ringsize[] = {8,8}; /* default is tx=8 / rx=8 */
97 module_param_array(ringsize, int, NULL, 0);
98 MODULE_PARM_DESC(ringsize, "TX, RX ring descriptor size");
99
100 /* sirpulse: tuning of the SIR pulse width within IrPHY 1.3 limits
101 * 0: very short, 1.5us (exception: 6us at 2.4 kbaud)
102 * 1: nominal 3/16 bittime width
103 * note: IrDA compliant peer devices should be happy regardless
104 * which one is used. Primary goal is to save some power
105 * on the sender's side - at 9.6kbaud for example the short
106 * pulse width saves more than 90% of the transmitted IR power.
107 */
108
109 static int sirpulse = 1; /* default is 3/16 bittime */
110 module_param(sirpulse, int, 0);
111 MODULE_PARM_DESC(sirpulse, "SIR pulse width tuning");
112
113 /* qos_mtt_bits: encoded min-turn-time value we require the peer device
114 * to use before transmitting to us. "Type 1" (per-station)
115 * bitfield according to IrLAP definition (section 6.6.8)
116 * Don't know which transceiver is used by my OB800 - the
117 * pretty common HP HDLS-1100 requires 1 msec - so lets use this.
118 */
119
120 static int qos_mtt_bits = 0x07; /* default is 1 ms or more */
121 module_param(qos_mtt_bits, int, 0);
122 MODULE_PARM_DESC(qos_mtt_bits, "IrLAP bitfield representing min-turn-time");
123
124 /********************************************************/
125
126 static void vlsi_reg_debug(unsigned iobase, const char *s)
127 {
128 int i;
129
130 printk(KERN_DEBUG "%s: ", s);
131 for (i = 0; i < 0x20; i++)
132 printk("%02x", (unsigned)inb((iobase+i)));
133 printk("\n");
134 }
135
136 static void vlsi_ring_debug(struct vlsi_ring *r)
137 {
138 struct ring_descr *rd;
139 unsigned i;
140
141 printk(KERN_DEBUG "%s - ring %p / size %u / mask 0x%04x / len %u / dir %d / hw %p\n",
142 __func__, r, r->size, r->mask, r->len, r->dir, r->rd[0].hw);
143 printk(KERN_DEBUG "%s - head = %d / tail = %d\n", __func__,
144 atomic_read(&r->head) & r->mask, atomic_read(&r->tail) & r->mask);
145 for (i = 0; i < r->size; i++) {
146 rd = &r->rd[i];
147 printk(KERN_DEBUG "%s - ring descr %u: ", __func__, i);
148 printk("skb=%p data=%p hw=%p\n", rd->skb, rd->buf, rd->hw);
149 printk(KERN_DEBUG "%s - hw: status=%02x count=%u addr=0x%08x\n",
150 __func__, (unsigned) rd_get_status(rd),
151 (unsigned) rd_get_count(rd), (unsigned) rd_get_addr(rd));
152 }
153 }
154
155 /********************************************************/
156
157 /* needed regardless of CONFIG_PROC_FS */
158 static struct proc_dir_entry *vlsi_proc_root = NULL;
159
160 #ifdef CONFIG_PROC_FS
161
162 static void vlsi_proc_pdev(struct seq_file *seq, struct pci_dev *pdev)
163 {
164 unsigned iobase = pci_resource_start(pdev, 0);
165 unsigned i;
166
167 seq_printf(seq, "\n%s (vid/did: [%04x:%04x])\n",
168 pci_name(pdev), (int)pdev->vendor, (int)pdev->device);
169 seq_printf(seq, "pci-power-state: %u\n", (unsigned) pdev->current_state);
170 seq_printf(seq, "resources: irq=%u / io=0x%04x / dma_mask=0x%016Lx\n",
171 pdev->irq, (unsigned)pci_resource_start(pdev, 0), (unsigned long long)pdev->dma_mask);
172 seq_printf(seq, "hw registers: ");
173 for (i = 0; i < 0x20; i++)
174 seq_printf(seq, "%02x", (unsigned)inb((iobase+i)));
175 seq_printf(seq, "\n");
176 }
177
178 static void vlsi_proc_ndev(struct seq_file *seq, struct net_device *ndev)
179 {
180 vlsi_irda_dev_t *idev = netdev_priv(ndev);
181 u8 byte;
182 u16 word;
183 unsigned delta1, delta2;
184 struct timeval now;
185 unsigned iobase = ndev->base_addr;
186
187 seq_printf(seq, "\n%s link state: %s / %s / %s / %s\n", ndev->name,
188 netif_device_present(ndev) ? "attached" : "detached",
189 netif_running(ndev) ? "running" : "not running",
190 netif_carrier_ok(ndev) ? "carrier ok" : "no carrier",
191 netif_queue_stopped(ndev) ? "queue stopped" : "queue running");
192
193 if (!netif_running(ndev))
194 return;
195
196 seq_printf(seq, "\nhw-state:\n");
197 pci_read_config_byte(idev->pdev, VLSI_PCI_IRMISC, &byte);
198 seq_printf(seq, "IRMISC:%s%s%s uart%s",
199 (byte&IRMISC_IRRAIL) ? " irrail" : "",
200 (byte&IRMISC_IRPD) ? " irpd" : "",
201 (byte&IRMISC_UARTTST) ? " uarttest" : "",
202 (byte&IRMISC_UARTEN) ? "@" : " disabled\n");
203 if (byte&IRMISC_UARTEN) {
204 seq_printf(seq, "0x%s\n",
205 (byte&2) ? ((byte&1) ? "3e8" : "2e8")
206 : ((byte&1) ? "3f8" : "2f8"));
207 }
208 pci_read_config_byte(idev->pdev, VLSI_PCI_CLKCTL, &byte);
209 seq_printf(seq, "CLKCTL: PLL %s%s%s / clock %s / wakeup %s\n",
210 (byte&CLKCTL_PD_INV) ? "powered" : "down",
211 (byte&CLKCTL_LOCK) ? " locked" : "",
212 (byte&CLKCTL_EXTCLK) ? ((byte&CLKCTL_XCKSEL)?" / 40 MHz XCLK":" / 48 MHz XCLK") : "",
213 (byte&CLKCTL_CLKSTP) ? "stopped" : "running",
214 (byte&CLKCTL_WAKE) ? "enabled" : "disabled");
215 pci_read_config_byte(idev->pdev, VLSI_PCI_MSTRPAGE, &byte);
216 seq_printf(seq, "MSTRPAGE: 0x%02x\n", (unsigned)byte);
217
218 byte = inb(iobase+VLSI_PIO_IRINTR);
219 seq_printf(seq, "IRINTR:%s%s%s%s%s%s%s%s\n",
220 (byte&IRINTR_ACTEN) ? " ACTEN" : "",
221 (byte&IRINTR_RPKTEN) ? " RPKTEN" : "",
222 (byte&IRINTR_TPKTEN) ? " TPKTEN" : "",
223 (byte&IRINTR_OE_EN) ? " OE_EN" : "",
224 (byte&IRINTR_ACTIVITY) ? " ACTIVITY" : "",
225 (byte&IRINTR_RPKTINT) ? " RPKTINT" : "",
226 (byte&IRINTR_TPKTINT) ? " TPKTINT" : "",
227 (byte&IRINTR_OE_INT) ? " OE_INT" : "");
228 word = inw(iobase+VLSI_PIO_RINGPTR);
229 seq_printf(seq, "RINGPTR: rx=%u / tx=%u\n", RINGPTR_GET_RX(word), RINGPTR_GET_TX(word));
230 word = inw(iobase+VLSI_PIO_RINGBASE);
231 seq_printf(seq, "RINGBASE: busmap=0x%08x\n",
232 ((unsigned)word << 10)|(MSTRPAGE_VALUE<<24));
233 word = inw(iobase+VLSI_PIO_RINGSIZE);
234 seq_printf(seq, "RINGSIZE: rx=%u / tx=%u\n", RINGSIZE_TO_RXSIZE(word),
235 RINGSIZE_TO_TXSIZE(word));
236
237 word = inw(iobase+VLSI_PIO_IRCFG);
238 seq_printf(seq, "IRCFG:%s%s%s%s%s%s%s%s%s%s%s%s%s\n",
239 (word&IRCFG_LOOP) ? " LOOP" : "",
240 (word&IRCFG_ENTX) ? " ENTX" : "",
241 (word&IRCFG_ENRX) ? " ENRX" : "",
242 (word&IRCFG_MSTR) ? " MSTR" : "",
243 (word&IRCFG_RXANY) ? " RXANY" : "",
244 (word&IRCFG_CRC16) ? " CRC16" : "",
245 (word&IRCFG_FIR) ? " FIR" : "",
246 (word&IRCFG_MIR) ? " MIR" : "",
247 (word&IRCFG_SIR) ? " SIR" : "",
248 (word&IRCFG_SIRFILT) ? " SIRFILT" : "",
249 (word&IRCFG_SIRTEST) ? " SIRTEST" : "",
250 (word&IRCFG_TXPOL) ? " TXPOL" : "",
251 (word&IRCFG_RXPOL) ? " RXPOL" : "");
252 word = inw(iobase+VLSI_PIO_IRENABLE);
253 seq_printf(seq, "IRENABLE:%s%s%s%s%s%s%s%s\n",
254 (word&IRENABLE_PHYANDCLOCK) ? " PHYANDCLOCK" : "",
255 (word&IRENABLE_CFGER) ? " CFGERR" : "",
256 (word&IRENABLE_FIR_ON) ? " FIR_ON" : "",
257 (word&IRENABLE_MIR_ON) ? " MIR_ON" : "",
258 (word&IRENABLE_SIR_ON) ? " SIR_ON" : "",
259 (word&IRENABLE_ENTXST) ? " ENTXST" : "",
260 (word&IRENABLE_ENRXST) ? " ENRXST" : "",
261 (word&IRENABLE_CRC16_ON) ? " CRC16_ON" : "");
262 word = inw(iobase+VLSI_PIO_PHYCTL);
263 seq_printf(seq, "PHYCTL: baud-divisor=%u / pulsewidth=%u / preamble=%u\n",
264 (unsigned)PHYCTL_TO_BAUD(word),
265 (unsigned)PHYCTL_TO_PLSWID(word),
266 (unsigned)PHYCTL_TO_PREAMB(word));
267 word = inw(iobase+VLSI_PIO_NPHYCTL);
268 seq_printf(seq, "NPHYCTL: baud-divisor=%u / pulsewidth=%u / preamble=%u\n",
269 (unsigned)PHYCTL_TO_BAUD(word),
270 (unsigned)PHYCTL_TO_PLSWID(word),
271 (unsigned)PHYCTL_TO_PREAMB(word));
272 word = inw(iobase+VLSI_PIO_MAXPKT);
273 seq_printf(seq, "MAXPKT: max. rx packet size = %u\n", word);
274 word = inw(iobase+VLSI_PIO_RCVBCNT) & RCVBCNT_MASK;
275 seq_printf(seq, "RCVBCNT: rx-fifo filling level = %u\n", word);
276
277 seq_printf(seq, "\nsw-state:\n");
278 seq_printf(seq, "IrPHY setup: %d baud - %s encoding\n", idev->baud,
279 (idev->mode==IFF_SIR)?"SIR":((idev->mode==IFF_MIR)?"MIR":"FIR"));
280 do_gettimeofday(&now);
281 if (now.tv_usec >= idev->last_rx.tv_usec) {
282 delta2 = now.tv_usec - idev->last_rx.tv_usec;
283 delta1 = 0;
284 }
285 else {
286 delta2 = 1000000 + now.tv_usec - idev->last_rx.tv_usec;
287 delta1 = 1;
288 }
289 seq_printf(seq, "last rx: %lu.%06u sec\n",
290 now.tv_sec - idev->last_rx.tv_sec - delta1, delta2);
291
292 seq_printf(seq, "RX: packets=%lu / bytes=%lu / errors=%lu / dropped=%lu",
293 ndev->stats.rx_packets, ndev->stats.rx_bytes, ndev->stats.rx_errors,
294 ndev->stats.rx_dropped);
295 seq_printf(seq, " / overrun=%lu / length=%lu / frame=%lu / crc=%lu\n",
296 ndev->stats.rx_over_errors, ndev->stats.rx_length_errors,
297 ndev->stats.rx_frame_errors, ndev->stats.rx_crc_errors);
298 seq_printf(seq, "TX: packets=%lu / bytes=%lu / errors=%lu / dropped=%lu / fifo=%lu\n",
299 ndev->stats.tx_packets, ndev->stats.tx_bytes, ndev->stats.tx_errors,
300 ndev->stats.tx_dropped, ndev->stats.tx_fifo_errors);
301
302 }
303
304 static void vlsi_proc_ring(struct seq_file *seq, struct vlsi_ring *r)
305 {
306 struct ring_descr *rd;
307 unsigned i, j;
308 int h, t;
309
310 seq_printf(seq, "size %u / mask 0x%04x / len %u / dir %d / hw %p\n",
311 r->size, r->mask, r->len, r->dir, r->rd[0].hw);
312 h = atomic_read(&r->head) & r->mask;
313 t = atomic_read(&r->tail) & r->mask;
314 seq_printf(seq, "head = %d / tail = %d ", h, t);
315 if (h == t)
316 seq_printf(seq, "(empty)\n");
317 else {
318 if (((t+1)&r->mask) == h)
319 seq_printf(seq, "(full)\n");
320 else
321 seq_printf(seq, "(level = %d)\n", ((unsigned)(t-h) & r->mask));
322 rd = &r->rd[h];
323 j = (unsigned) rd_get_count(rd);
324 seq_printf(seq, "current: rd = %d / status = %02x / len = %u\n",
325 h, (unsigned)rd_get_status(rd), j);
326 if (j > 0) {
327 seq_printf(seq, " data: %*ph\n",
328 min_t(unsigned, j, 20), rd->buf);
329 }
330 }
331 for (i = 0; i < r->size; i++) {
332 rd = &r->rd[i];
333 seq_printf(seq, "> ring descr %u: ", i);
334 seq_printf(seq, "skb=%p data=%p hw=%p\n", rd->skb, rd->buf, rd->hw);
335 seq_printf(seq, " hw: status=%02x count=%u busaddr=0x%08x\n",
336 (unsigned) rd_get_status(rd),
337 (unsigned) rd_get_count(rd), (unsigned) rd_get_addr(rd));
338 }
339 }
340
341 static int vlsi_seq_show(struct seq_file *seq, void *v)
342 {
343 struct net_device *ndev = seq->private;
344 vlsi_irda_dev_t *idev = netdev_priv(ndev);
345 unsigned long flags;
346
347 seq_printf(seq, "\n%s %s\n\n", DRIVER_NAME, DRIVER_VERSION);
348 seq_printf(seq, "clksrc: %s\n",
349 (clksrc>=2) ? ((clksrc==3)?"40MHz XCLK":"48MHz XCLK")
350 : ((clksrc==1)?"48MHz PLL":"autodetect"));
351 seq_printf(seq, "ringsize: tx=%d / rx=%d\n",
352 ringsize[0], ringsize[1]);
353 seq_printf(seq, "sirpulse: %s\n", (sirpulse)?"3/16 bittime":"short");
354 seq_printf(seq, "qos_mtt_bits: 0x%02x\n", (unsigned)qos_mtt_bits);
355
356 spin_lock_irqsave(&idev->lock, flags);
357 if (idev->pdev != NULL) {
358 vlsi_proc_pdev(seq, idev->pdev);
359
360 if (idev->pdev->current_state == 0)
361 vlsi_proc_ndev(seq, ndev);
362 else
363 seq_printf(seq, "\nPCI controller down - resume_ok = %d\n",
364 idev->resume_ok);
365 if (netif_running(ndev) && idev->rx_ring && idev->tx_ring) {
366 seq_printf(seq, "\n--------- RX ring -----------\n\n");
367 vlsi_proc_ring(seq, idev->rx_ring);
368 seq_printf(seq, "\n--------- TX ring -----------\n\n");
369 vlsi_proc_ring(seq, idev->tx_ring);
370 }
371 }
372 seq_printf(seq, "\n");
373 spin_unlock_irqrestore(&idev->lock, flags);
374
375 return 0;
376 }
377
378 static int vlsi_seq_open(struct inode *inode, struct file *file)
379 {
380 return single_open(file, vlsi_seq_show, PDE_DATA(inode));
381 }
382
383 static const struct file_operations vlsi_proc_fops = {
384 .owner = THIS_MODULE,
385 .open = vlsi_seq_open,
386 .read = seq_read,
387 .llseek = seq_lseek,
388 .release = single_release,
389 };
390
391 #define VLSI_PROC_FOPS (&vlsi_proc_fops)
392
393 #else /* CONFIG_PROC_FS */
394 #define VLSI_PROC_FOPS NULL
395 #endif
396
397 /********************************************************/
398
399 static struct vlsi_ring *vlsi_alloc_ring(struct pci_dev *pdev, struct ring_descr_hw *hwmap,
400 unsigned size, unsigned len, int dir)
401 {
402 struct vlsi_ring *r;
403 struct ring_descr *rd;
404 unsigned i, j;
405 dma_addr_t busaddr;
406
407 if (!size || ((size-1)&size)!=0) /* must be >0 and power of 2 */
408 return NULL;
409
410 r = kmalloc(sizeof(*r) + size * sizeof(struct ring_descr), GFP_KERNEL);
411 if (!r)
412 return NULL;
413 memset(r, 0, sizeof(*r));
414
415 r->pdev = pdev;
416 r->dir = dir;
417 r->len = len;
418 r->rd = (struct ring_descr *)(r+1);
419 r->mask = size - 1;
420 r->size = size;
421 atomic_set(&r->head, 0);
422 atomic_set(&r->tail, 0);
423
424 for (i = 0; i < size; i++) {
425 rd = r->rd + i;
426 memset(rd, 0, sizeof(*rd));
427 rd->hw = hwmap + i;
428 rd->buf = kmalloc(len, GFP_KERNEL|GFP_DMA);
429 if (rd->buf == NULL ||
430 !(busaddr = pci_map_single(pdev, rd->buf, len, dir))) {
431 if (rd->buf) {
432 net_err_ratelimited("%s: failed to create PCI-MAP for %p\n",
433 __func__, rd->buf);
434 kfree(rd->buf);
435 rd->buf = NULL;
436 }
437 for (j = 0; j < i; j++) {
438 rd = r->rd + j;
439 busaddr = rd_get_addr(rd);
440 rd_set_addr_status(rd, 0, 0);
441 if (busaddr)
442 pci_unmap_single(pdev, busaddr, len, dir);
443 kfree(rd->buf);
444 rd->buf = NULL;
445 }
446 kfree(r);
447 return NULL;
448 }
449 rd_set_addr_status(rd, busaddr, 0);
450 /* initially, the dma buffer is owned by the CPU */
451 rd->skb = NULL;
452 }
453 return r;
454 }
455
456 static int vlsi_free_ring(struct vlsi_ring *r)
457 {
458 struct ring_descr *rd;
459 unsigned i;
460 dma_addr_t busaddr;
461
462 for (i = 0; i < r->size; i++) {
463 rd = r->rd + i;
464 if (rd->skb)
465 dev_kfree_skb_any(rd->skb);
466 busaddr = rd_get_addr(rd);
467 rd_set_addr_status(rd, 0, 0);
468 if (busaddr)
469 pci_unmap_single(r->pdev, busaddr, r->len, r->dir);
470 kfree(rd->buf);
471 }
472 kfree(r);
473 return 0;
474 }
475
476 static int vlsi_create_hwif(vlsi_irda_dev_t *idev)
477 {
478 char *ringarea;
479 struct ring_descr_hw *hwmap;
480
481 idev->virtaddr = NULL;
482 idev->busaddr = 0;
483
484 ringarea = pci_zalloc_consistent(idev->pdev, HW_RING_AREA_SIZE,
485 &idev->busaddr);
486 if (!ringarea)
487 goto out;
488
489 hwmap = (struct ring_descr_hw *)ringarea;
490 idev->rx_ring = vlsi_alloc_ring(idev->pdev, hwmap, ringsize[1],
491 XFER_BUF_SIZE, PCI_DMA_FROMDEVICE);
492 if (idev->rx_ring == NULL)
493 goto out_unmap;
494
495 hwmap += MAX_RING_DESCR;
496 idev->tx_ring = vlsi_alloc_ring(idev->pdev, hwmap, ringsize[0],
497 XFER_BUF_SIZE, PCI_DMA_TODEVICE);
498 if (idev->tx_ring == NULL)
499 goto out_free_rx;
500
501 idev->virtaddr = ringarea;
502 return 0;
503
504 out_free_rx:
505 vlsi_free_ring(idev->rx_ring);
506 out_unmap:
507 idev->rx_ring = idev->tx_ring = NULL;
508 pci_free_consistent(idev->pdev, HW_RING_AREA_SIZE, ringarea, idev->busaddr);
509 idev->busaddr = 0;
510 out:
511 return -ENOMEM;
512 }
513
514 static int vlsi_destroy_hwif(vlsi_irda_dev_t *idev)
515 {
516 vlsi_free_ring(idev->rx_ring);
517 vlsi_free_ring(idev->tx_ring);
518 idev->rx_ring = idev->tx_ring = NULL;
519
520 if (idev->busaddr)
521 pci_free_consistent(idev->pdev,HW_RING_AREA_SIZE,idev->virtaddr,idev->busaddr);
522
523 idev->virtaddr = NULL;
524 idev->busaddr = 0;
525
526 return 0;
527 }
528
529 /********************************************************/
530
531 static int vlsi_process_rx(struct vlsi_ring *r, struct ring_descr *rd)
532 {
533 u16 status;
534 int crclen, len = 0;
535 struct sk_buff *skb;
536 int ret = 0;
537 struct net_device *ndev = pci_get_drvdata(r->pdev);
538 vlsi_irda_dev_t *idev = netdev_priv(ndev);
539
540 pci_dma_sync_single_for_cpu(r->pdev, rd_get_addr(rd), r->len, r->dir);
541 /* dma buffer now owned by the CPU */
542 status = rd_get_status(rd);
543 if (status & RD_RX_ERROR) {
544 if (status & RD_RX_OVER)
545 ret |= VLSI_RX_OVER;
546 if (status & RD_RX_LENGTH)
547 ret |= VLSI_RX_LENGTH;
548 if (status & RD_RX_PHYERR)
549 ret |= VLSI_RX_FRAME;
550 if (status & RD_RX_CRCERR)
551 ret |= VLSI_RX_CRC;
552 goto done;
553 }
554
555 len = rd_get_count(rd);
556 crclen = (idev->mode==IFF_FIR) ? sizeof(u32) : sizeof(u16);
557 len -= crclen; /* remove trailing CRC */
558 if (len <= 0) {
559 pr_debug("%s: strange frame (len=%d)\n", __func__, len);
560 ret |= VLSI_RX_DROP;
561 goto done;
562 }
563
564 if (idev->mode == IFF_SIR) { /* hw checks CRC in MIR, FIR mode */
565
566 /* rd->buf is a streaming PCI_DMA_FROMDEVICE map. Doing the
567 * endian-adjustment there just in place will dirty a cache line
568 * which belongs to the map and thus we must be sure it will
569 * get flushed before giving the buffer back to hardware.
570 * vlsi_fill_rx() will do this anyway - but here we rely on.
571 */
572 le16_to_cpus(rd->buf+len);
573 if (irda_calc_crc16(INIT_FCS,rd->buf,len+crclen) != GOOD_FCS) {
574 pr_debug("%s: crc error\n", __func__);
575 ret |= VLSI_RX_CRC;
576 goto done;
577 }
578 }
579
580 if (!rd->skb) {
581 net_warn_ratelimited("%s: rx packet lost\n", __func__);
582 ret |= VLSI_RX_DROP;
583 goto done;
584 }
585
586 skb = rd->skb;
587 rd->skb = NULL;
588 skb->dev = ndev;
589 memcpy(skb_put(skb,len), rd->buf, len);
590 skb_reset_mac_header(skb);
591 if (in_interrupt())
592 netif_rx(skb);
593 else
594 netif_rx_ni(skb);
595
596 done:
597 rd_set_status(rd, 0);
598 rd_set_count(rd, 0);
599 /* buffer still owned by CPU */
600
601 return (ret) ? -ret : len;
602 }
603
604 static void vlsi_fill_rx(struct vlsi_ring *r)
605 {
606 struct ring_descr *rd;
607
608 for (rd = ring_last(r); rd != NULL; rd = ring_put(r)) {
609 if (rd_is_active(rd)) {
610 net_warn_ratelimited("%s: driver bug: rx descr race with hw\n",
611 __func__);
612 vlsi_ring_debug(r);
613 break;
614 }
615 if (!rd->skb) {
616 rd->skb = dev_alloc_skb(IRLAP_SKB_ALLOCSIZE);
617 if (rd->skb) {
618 skb_reserve(rd->skb,1);
619 rd->skb->protocol = htons(ETH_P_IRDA);
620 }
621 else
622 break; /* probably not worth logging? */
623 }
624 /* give dma buffer back to busmaster */
625 pci_dma_sync_single_for_device(r->pdev, rd_get_addr(rd), r->len, r->dir);
626 rd_activate(rd);
627 }
628 }
629
630 static void vlsi_rx_interrupt(struct net_device *ndev)
631 {
632 vlsi_irda_dev_t *idev = netdev_priv(ndev);
633 struct vlsi_ring *r = idev->rx_ring;
634 struct ring_descr *rd;
635 int ret;
636
637 for (rd = ring_first(r); rd != NULL; rd = ring_get(r)) {
638
639 if (rd_is_active(rd))
640 break;
641
642 ret = vlsi_process_rx(r, rd);
643
644 if (ret < 0) {
645 ret = -ret;
646 ndev->stats.rx_errors++;
647 if (ret & VLSI_RX_DROP)
648 ndev->stats.rx_dropped++;
649 if (ret & VLSI_RX_OVER)
650 ndev->stats.rx_over_errors++;
651 if (ret & VLSI_RX_LENGTH)
652 ndev->stats.rx_length_errors++;
653 if (ret & VLSI_RX_FRAME)
654 ndev->stats.rx_frame_errors++;
655 if (ret & VLSI_RX_CRC)
656 ndev->stats.rx_crc_errors++;
657 }
658 else if (ret > 0) {
659 ndev->stats.rx_packets++;
660 ndev->stats.rx_bytes += ret;
661 }
662 }
663
664 do_gettimeofday(&idev->last_rx); /* remember "now" for later mtt delay */
665
666 vlsi_fill_rx(r);
667
668 if (ring_first(r) == NULL) {
669 /* we are in big trouble, if this should ever happen */
670 net_err_ratelimited("%s: rx ring exhausted!\n", __func__);
671 vlsi_ring_debug(r);
672 }
673 else
674 outw(0, ndev->base_addr+VLSI_PIO_PROMPT);
675 }
676
677 /* caller must have stopped the controller from busmastering */
678
679 static void vlsi_unarm_rx(vlsi_irda_dev_t *idev)
680 {
681 struct net_device *ndev = pci_get_drvdata(idev->pdev);
682 struct vlsi_ring *r = idev->rx_ring;
683 struct ring_descr *rd;
684 int ret;
685
686 for (rd = ring_first(r); rd != NULL; rd = ring_get(r)) {
687
688 ret = 0;
689 if (rd_is_active(rd)) {
690 rd_set_status(rd, 0);
691 if (rd_get_count(rd)) {
692 pr_debug("%s - dropping rx packet\n", __func__);
693 ret = -VLSI_RX_DROP;
694 }
695 rd_set_count(rd, 0);
696 pci_dma_sync_single_for_cpu(r->pdev, rd_get_addr(rd), r->len, r->dir);
697 if (rd->skb) {
698 dev_kfree_skb_any(rd->skb);
699 rd->skb = NULL;
700 }
701 }
702 else
703 ret = vlsi_process_rx(r, rd);
704
705 if (ret < 0) {
706 ret = -ret;
707 ndev->stats.rx_errors++;
708 if (ret & VLSI_RX_DROP)
709 ndev->stats.rx_dropped++;
710 if (ret & VLSI_RX_OVER)
711 ndev->stats.rx_over_errors++;
712 if (ret & VLSI_RX_LENGTH)
713 ndev->stats.rx_length_errors++;
714 if (ret & VLSI_RX_FRAME)
715 ndev->stats.rx_frame_errors++;
716 if (ret & VLSI_RX_CRC)
717 ndev->stats.rx_crc_errors++;
718 }
719 else if (ret > 0) {
720 ndev->stats.rx_packets++;
721 ndev->stats.rx_bytes += ret;
722 }
723 }
724 }
725
726 /********************************************************/
727
728 static int vlsi_process_tx(struct vlsi_ring *r, struct ring_descr *rd)
729 {
730 u16 status;
731 int len;
732 int ret;
733
734 pci_dma_sync_single_for_cpu(r->pdev, rd_get_addr(rd), r->len, r->dir);
735 /* dma buffer now owned by the CPU */
736 status = rd_get_status(rd);
737 if (status & RD_TX_UNDRN)
738 ret = VLSI_TX_FIFO;
739 else
740 ret = 0;
741 rd_set_status(rd, 0);
742
743 if (rd->skb) {
744 len = rd->skb->len;
745 dev_kfree_skb_any(rd->skb);
746 rd->skb = NULL;
747 }
748 else /* tx-skb already freed? - should never happen */
749 len = rd_get_count(rd); /* incorrect for SIR! (due to wrapping) */
750
751 rd_set_count(rd, 0);
752 /* dma buffer still owned by the CPU */
753
754 return (ret) ? -ret : len;
755 }
756
757 static int vlsi_set_baud(vlsi_irda_dev_t *idev, unsigned iobase)
758 {
759 u16 nphyctl;
760 u16 config;
761 unsigned mode;
762 int ret;
763 int baudrate;
764 int fifocnt;
765
766 baudrate = idev->new_baud;
767 pr_debug("%s: %d -> %d\n", __func__, idev->baud, idev->new_baud);
768 if (baudrate == 4000000) {
769 mode = IFF_FIR;
770 config = IRCFG_FIR;
771 nphyctl = PHYCTL_FIR;
772 }
773 else if (baudrate == 1152000) {
774 mode = IFF_MIR;
775 config = IRCFG_MIR | IRCFG_CRC16;
776 nphyctl = PHYCTL_MIR(clksrc==3);
777 }
778 else {
779 mode = IFF_SIR;
780 config = IRCFG_SIR | IRCFG_SIRFILT | IRCFG_RXANY;
781 switch(baudrate) {
782 default:
783 net_warn_ratelimited("%s: undefined baudrate %d - fallback to 9600!\n",
784 __func__, baudrate);
785 baudrate = 9600;
786 /* fallthru */
787 case 2400:
788 case 9600:
789 case 19200:
790 case 38400:
791 case 57600:
792 case 115200:
793 nphyctl = PHYCTL_SIR(baudrate,sirpulse,clksrc==3);
794 break;
795 }
796 }
797 config |= IRCFG_MSTR | IRCFG_ENRX;
798
799 fifocnt = inw(iobase+VLSI_PIO_RCVBCNT) & RCVBCNT_MASK;
800 if (fifocnt != 0) {
801 pr_debug("%s: rx fifo not empty(%d)\n", __func__, fifocnt);
802 }
803
804 outw(0, iobase+VLSI_PIO_IRENABLE);
805 outw(config, iobase+VLSI_PIO_IRCFG);
806 outw(nphyctl, iobase+VLSI_PIO_NPHYCTL);
807 wmb();
808 outw(IRENABLE_PHYANDCLOCK, iobase+VLSI_PIO_IRENABLE);
809 mb();
810
811 udelay(1); /* chip applies IRCFG on next rising edge of its 8MHz clock */
812
813 /* read back settings for validation */
814
815 config = inw(iobase+VLSI_PIO_IRENABLE) & IRENABLE_MASK;
816
817 if (mode == IFF_FIR)
818 config ^= IRENABLE_FIR_ON;
819 else if (mode == IFF_MIR)
820 config ^= (IRENABLE_MIR_ON|IRENABLE_CRC16_ON);
821 else
822 config ^= IRENABLE_SIR_ON;
823
824 if (config != (IRENABLE_PHYANDCLOCK|IRENABLE_ENRXST)) {
825 net_warn_ratelimited("%s: failed to set %s mode!\n",
826 __func__,
827 mode == IFF_SIR ? "SIR" :
828 mode == IFF_MIR ? "MIR" : "FIR");
829 ret = -1;
830 }
831 else {
832 if (inw(iobase+VLSI_PIO_PHYCTL) != nphyctl) {
833 net_warn_ratelimited("%s: failed to apply baudrate %d\n",
834 __func__, baudrate);
835 ret = -1;
836 }
837 else {
838 idev->mode = mode;
839 idev->baud = baudrate;
840 idev->new_baud = 0;
841 ret = 0;
842 }
843 }
844
845 if (ret)
846 vlsi_reg_debug(iobase,__func__);
847
848 return ret;
849 }
850
851 static netdev_tx_t vlsi_hard_start_xmit(struct sk_buff *skb,
852 struct net_device *ndev)
853 {
854 vlsi_irda_dev_t *idev = netdev_priv(ndev);
855 struct vlsi_ring *r = idev->tx_ring;
856 struct ring_descr *rd;
857 unsigned long flags;
858 unsigned iobase = ndev->base_addr;
859 u8 status;
860 u16 config;
861 int mtt;
862 int len, speed;
863 struct timeval now, ready;
864 char *msg = NULL;
865
866 speed = irda_get_next_speed(skb);
867 spin_lock_irqsave(&idev->lock, flags);
868 if (speed != -1 && speed != idev->baud) {
869 netif_stop_queue(ndev);
870 idev->new_baud = speed;
871 status = RD_TX_CLRENTX; /* stop tx-ring after this frame */
872 }
873 else
874 status = 0;
875
876 if (skb->len == 0) {
877 /* handle zero packets - should be speed change */
878 if (status == 0) {
879 msg = "bogus zero-length packet";
880 goto drop_unlock;
881 }
882
883 /* due to the completely asynch tx operation we might have
884 * IrLAP racing with the hardware here, f.e. if the controller
885 * is just sending the last packet with current speed while
886 * the LAP is already switching the speed using synchronous
887 * len=0 packet. Immediate execution would lead to hw lockup
888 * requiring a powercycle to reset. Good candidate to trigger
889 * this is the final UA:RSP packet after receiving a DISC:CMD
890 * when getting the LAP down.
891 * Note that we are not protected by the queue_stop approach
892 * because the final UA:RSP arrives _without_ request to apply
893 * new-speed-after-this-packet - hence the driver doesn't know
894 * this was the last packet and doesn't stop the queue. So the
895 * forced switch to default speed from LAP gets through as fast
896 * as only some 10 usec later while the UA:RSP is still processed
897 * by the hardware and we would get screwed.
898 */
899
900 if (ring_first(idev->tx_ring) == NULL) {
901 /* no race - tx-ring already empty */
902 vlsi_set_baud(idev, iobase);
903 netif_wake_queue(ndev);
904 }
905 else
906 ;
907 /* keep the speed change pending like it would
908 * for any len>0 packet. tx completion interrupt
909 * will apply it when the tx ring becomes empty.
910 */
911 spin_unlock_irqrestore(&idev->lock, flags);
912 dev_kfree_skb_any(skb);
913 return NETDEV_TX_OK;
914 }
915
916 /* sanity checks - simply drop the packet */
917
918 rd = ring_last(r);
919 if (!rd) {
920 msg = "ring full, but queue wasn't stopped";
921 goto drop_unlock;
922 }
923
924 if (rd_is_active(rd)) {
925 msg = "entry still owned by hw";
926 goto drop_unlock;
927 }
928
929 if (!rd->buf) {
930 msg = "tx ring entry without pci buffer";
931 goto drop_unlock;
932 }
933
934 if (rd->skb) {
935 msg = "ring entry with old skb still attached";
936 goto drop_unlock;
937 }
938
939 /* no need for serialization or interrupt disable during mtt */
940 spin_unlock_irqrestore(&idev->lock, flags);
941
942 if ((mtt = irda_get_mtt(skb)) > 0) {
943
944 ready.tv_usec = idev->last_rx.tv_usec + mtt;
945 ready.tv_sec = idev->last_rx.tv_sec;
946 if (ready.tv_usec >= 1000000) {
947 ready.tv_usec -= 1000000;
948 ready.tv_sec++; /* IrLAP 1.1: mtt always < 1 sec */
949 }
950 for(;;) {
951 do_gettimeofday(&now);
952 if (now.tv_sec > ready.tv_sec ||
953 (now.tv_sec==ready.tv_sec && now.tv_usec>=ready.tv_usec))
954 break;
955 udelay(100);
956 /* must not sleep here - called under netif_tx_lock! */
957 }
958 }
959
960 /* tx buffer already owned by CPU due to pci_dma_sync_single_for_cpu()
961 * after subsequent tx-completion
962 */
963
964 if (idev->mode == IFF_SIR) {
965 status |= RD_TX_DISCRC; /* no hw-crc creation */
966 len = async_wrap_skb(skb, rd->buf, r->len);
967
968 /* Some rare worst case situation in SIR mode might lead to
969 * potential buffer overflow. The wrapper detects this, returns
970 * with a shortened frame (without FCS/EOF) but doesn't provide
971 * any error indication about the invalid packet which we are
972 * going to transmit.
973 * Therefore we log if the buffer got filled to the point, where the
974 * wrapper would abort, i.e. when there are less than 5 bytes left to
975 * allow appending the FCS/EOF.
976 */
977
978 if (len >= r->len-5)
979 net_warn_ratelimited("%s: possible buffer overflow with SIR wrapping!\n",
980 __func__);
981 }
982 else {
983 /* hw deals with MIR/FIR mode wrapping */
984 status |= RD_TX_PULSE; /* send 2 us highspeed indication pulse */
985 len = skb->len;
986 if (len > r->len) {
987 msg = "frame exceeds tx buffer length";
988 goto drop;
989 }
990 else
991 skb_copy_from_linear_data(skb, rd->buf, len);
992 }
993
994 rd->skb = skb; /* remember skb for tx-complete stats */
995
996 rd_set_count(rd, len);
997 rd_set_status(rd, status); /* not yet active! */
998
999 /* give dma buffer back to busmaster-hw (flush caches to make
1000 * CPU-driven changes visible from the pci bus).
1001 */
1002
1003 pci_dma_sync_single_for_device(r->pdev, rd_get_addr(rd), r->len, r->dir);
1004
1005 /* Switching to TX mode here races with the controller
1006 * which may stop TX at any time when fetching an inactive descriptor
1007 * or one with CLR_ENTX set. So we switch on TX only, if TX was not running
1008 * _after_ the new descriptor was activated on the ring. This ensures
1009 * we will either find TX already stopped or we can be sure, there
1010 * will be a TX-complete interrupt even if the chip stopped doing
1011 * TX just after we found it still running. The ISR will then find
1012 * the non-empty ring and restart TX processing. The enclosing
1013 * spinlock provides the correct serialization to prevent race with isr.
1014 */
1015
1016 spin_lock_irqsave(&idev->lock,flags);
1017
1018 rd_activate(rd);
1019
1020 if (!(inw(iobase+VLSI_PIO_IRENABLE) & IRENABLE_ENTXST)) {
1021 int fifocnt;
1022
1023 fifocnt = inw(ndev->base_addr+VLSI_PIO_RCVBCNT) & RCVBCNT_MASK;
1024 if (fifocnt != 0) {
1025 pr_debug("%s: rx fifo not empty(%d)\n",
1026 __func__, fifocnt);
1027 }
1028
1029 config = inw(iobase+VLSI_PIO_IRCFG);
1030 mb();
1031 outw(config | IRCFG_ENTX, iobase+VLSI_PIO_IRCFG);
1032 wmb();
1033 outw(0, iobase+VLSI_PIO_PROMPT);
1034 }
1035
1036 if (ring_put(r) == NULL) {
1037 netif_stop_queue(ndev);
1038 pr_debug("%s: tx ring full - queue stopped\n", __func__);
1039 }
1040 spin_unlock_irqrestore(&idev->lock, flags);
1041
1042 return NETDEV_TX_OK;
1043
1044 drop_unlock:
1045 spin_unlock_irqrestore(&idev->lock, flags);
1046 drop:
1047 net_warn_ratelimited("%s: dropping packet - %s\n", __func__, msg);
1048 dev_kfree_skb_any(skb);
1049 ndev->stats.tx_errors++;
1050 ndev->stats.tx_dropped++;
1051 /* Don't even think about returning NET_XMIT_DROP (=1) here!
1052 * In fact any retval!=0 causes the packet scheduler to requeue the
1053 * packet for later retry of transmission - which isn't exactly
1054 * what we want after we've just called dev_kfree_skb_any ;-)
1055 */
1056 return NETDEV_TX_OK;
1057 }
1058
1059 static void vlsi_tx_interrupt(struct net_device *ndev)
1060 {
1061 vlsi_irda_dev_t *idev = netdev_priv(ndev);
1062 struct vlsi_ring *r = idev->tx_ring;
1063 struct ring_descr *rd;
1064 unsigned iobase;
1065 int ret;
1066 u16 config;
1067
1068 for (rd = ring_first(r); rd != NULL; rd = ring_get(r)) {
1069
1070 if (rd_is_active(rd))
1071 break;
1072
1073 ret = vlsi_process_tx(r, rd);
1074
1075 if (ret < 0) {
1076 ret = -ret;
1077 ndev->stats.tx_errors++;
1078 if (ret & VLSI_TX_DROP)
1079 ndev->stats.tx_dropped++;
1080 if (ret & VLSI_TX_FIFO)
1081 ndev->stats.tx_fifo_errors++;
1082 }
1083 else if (ret > 0){
1084 ndev->stats.tx_packets++;
1085 ndev->stats.tx_bytes += ret;
1086 }
1087 }
1088
1089 iobase = ndev->base_addr;
1090
1091 if (idev->new_baud && rd == NULL) /* tx ring empty and speed change pending */
1092 vlsi_set_baud(idev, iobase);
1093
1094 config = inw(iobase+VLSI_PIO_IRCFG);
1095 if (rd == NULL) /* tx ring empty: re-enable rx */
1096 outw((config & ~IRCFG_ENTX) | IRCFG_ENRX, iobase+VLSI_PIO_IRCFG);
1097
1098 else if (!(inw(iobase+VLSI_PIO_IRENABLE) & IRENABLE_ENTXST)) {
1099 int fifocnt;
1100
1101 fifocnt = inw(iobase+VLSI_PIO_RCVBCNT) & RCVBCNT_MASK;
1102 if (fifocnt != 0) {
1103 pr_debug("%s: rx fifo not empty(%d)\n",
1104 __func__, fifocnt);
1105 }
1106 outw(config | IRCFG_ENTX, iobase+VLSI_PIO_IRCFG);
1107 }
1108
1109 outw(0, iobase+VLSI_PIO_PROMPT);
1110
1111 if (netif_queue_stopped(ndev) && !idev->new_baud) {
1112 netif_wake_queue(ndev);
1113 pr_debug("%s: queue awoken\n", __func__);
1114 }
1115 }
1116
1117 /* caller must have stopped the controller from busmastering */
1118
1119 static void vlsi_unarm_tx(vlsi_irda_dev_t *idev)
1120 {
1121 struct net_device *ndev = pci_get_drvdata(idev->pdev);
1122 struct vlsi_ring *r = idev->tx_ring;
1123 struct ring_descr *rd;
1124 int ret;
1125
1126 for (rd = ring_first(r); rd != NULL; rd = ring_get(r)) {
1127
1128 ret = 0;
1129 if (rd_is_active(rd)) {
1130 rd_set_status(rd, 0);
1131 rd_set_count(rd, 0);
1132 pci_dma_sync_single_for_cpu(r->pdev, rd_get_addr(rd), r->len, r->dir);
1133 if (rd->skb) {
1134 dev_kfree_skb_any(rd->skb);
1135 rd->skb = NULL;
1136 }
1137 pr_debug("%s - dropping tx packet\n", __func__);
1138 ret = -VLSI_TX_DROP;
1139 }
1140 else
1141 ret = vlsi_process_tx(r, rd);
1142
1143 if (ret < 0) {
1144 ret = -ret;
1145 ndev->stats.tx_errors++;
1146 if (ret & VLSI_TX_DROP)
1147 ndev->stats.tx_dropped++;
1148 if (ret & VLSI_TX_FIFO)
1149 ndev->stats.tx_fifo_errors++;
1150 }
1151 else if (ret > 0){
1152 ndev->stats.tx_packets++;
1153 ndev->stats.tx_bytes += ret;
1154 }
1155 }
1156
1157 }
1158
1159 /********************************************************/
1160
1161 static int vlsi_start_clock(struct pci_dev *pdev)
1162 {
1163 u8 clkctl, lock;
1164 int i, count;
1165
1166 if (clksrc < 2) { /* auto or PLL: try PLL */
1167 clkctl = CLKCTL_PD_INV | CLKCTL_CLKSTP;
1168 pci_write_config_byte(pdev, VLSI_PCI_CLKCTL, clkctl);
1169
1170 /* procedure to detect PLL lock synchronisation:
1171 * after 0.5 msec initial delay we expect to find 3 PLL lock
1172 * indications within 10 msec for successful PLL detection.
1173 */
1174 udelay(500);
1175 count = 0;
1176 for (i = 500; i <= 10000; i += 50) { /* max 10 msec */
1177 pci_read_config_byte(pdev, VLSI_PCI_CLKCTL, &lock);
1178 if (lock&CLKCTL_LOCK) {
1179 if (++count >= 3)
1180 break;
1181 }
1182 udelay(50);
1183 }
1184 if (count < 3) {
1185 if (clksrc == 1) { /* explicitly asked for PLL hence bail out */
1186 net_err_ratelimited("%s: no PLL or failed to lock!\n",
1187 __func__);
1188 clkctl = CLKCTL_CLKSTP;
1189 pci_write_config_byte(pdev, VLSI_PCI_CLKCTL, clkctl);
1190 return -1;
1191 }
1192 else /* was: clksrc=0(auto) */
1193 clksrc = 3; /* fallback to 40MHz XCLK (OB800) */
1194
1195 pr_debug("%s: PLL not locked, fallback to clksrc=%d\n",
1196 __func__, clksrc);
1197 }
1198 else
1199 clksrc = 1; /* got successful PLL lock */
1200 }
1201
1202 if (clksrc != 1) {
1203 /* we get here if either no PLL detected in auto-mode or
1204 an external clock source was explicitly specified */
1205
1206 clkctl = CLKCTL_EXTCLK | CLKCTL_CLKSTP;
1207 if (clksrc == 3)
1208 clkctl |= CLKCTL_XCKSEL;
1209 pci_write_config_byte(pdev, VLSI_PCI_CLKCTL, clkctl);
1210
1211 /* no way to test for working XCLK */
1212 }
1213 else
1214 pci_read_config_byte(pdev, VLSI_PCI_CLKCTL, &clkctl);
1215
1216 /* ok, now going to connect the chip with the clock source */
1217
1218 clkctl &= ~CLKCTL_CLKSTP;
1219 pci_write_config_byte(pdev, VLSI_PCI_CLKCTL, clkctl);
1220
1221 return 0;
1222 }
1223
1224 static void vlsi_stop_clock(struct pci_dev *pdev)
1225 {
1226 u8 clkctl;
1227
1228 /* disconnect chip from clock source */
1229 pci_read_config_byte(pdev, VLSI_PCI_CLKCTL, &clkctl);
1230 clkctl |= CLKCTL_CLKSTP;
1231 pci_write_config_byte(pdev, VLSI_PCI_CLKCTL, clkctl);
1232
1233 /* disable all clock sources */
1234 clkctl &= ~(CLKCTL_EXTCLK | CLKCTL_PD_INV);
1235 pci_write_config_byte(pdev, VLSI_PCI_CLKCTL, clkctl);
1236 }
1237
1238 /********************************************************/
1239
1240 /* writing all-zero to the VLSI PCI IO register area seems to prevent
1241 * some occasional situations where the hardware fails (symptoms are
1242 * what appears as stalled tx/rx state machines, i.e. everything ok for
1243 * receive or transmit but hw makes no progress or is unable to access
1244 * the bus memory locations).
1245 * Best place to call this is immediately after/before the internal clock
1246 * gets started/stopped.
1247 */
1248
1249 static inline void vlsi_clear_regs(unsigned iobase)
1250 {
1251 unsigned i;
1252 const unsigned chip_io_extent = 32;
1253
1254 for (i = 0; i < chip_io_extent; i += sizeof(u16))
1255 outw(0, iobase + i);
1256 }
1257
1258 static int vlsi_init_chip(struct pci_dev *pdev)
1259 {
1260 struct net_device *ndev = pci_get_drvdata(pdev);
1261 vlsi_irda_dev_t *idev = netdev_priv(ndev);
1262 unsigned iobase;
1263 u16 ptr;
1264
1265 /* start the clock and clean the registers */
1266
1267 if (vlsi_start_clock(pdev)) {
1268 net_err_ratelimited("%s: no valid clock source\n", __func__);
1269 return -1;
1270 }
1271 iobase = ndev->base_addr;
1272 vlsi_clear_regs(iobase);
1273
1274 outb(IRINTR_INT_MASK, iobase+VLSI_PIO_IRINTR); /* w/c pending IRQ, disable all INT */
1275
1276 outw(0, iobase+VLSI_PIO_IRENABLE); /* disable IrPHY-interface */
1277
1278 /* disable everything, particularly IRCFG_MSTR - (also resetting the RING_PTR) */
1279
1280 outw(0, iobase+VLSI_PIO_IRCFG);
1281 wmb();
1282
1283 outw(MAX_PACKET_LENGTH, iobase+VLSI_PIO_MAXPKT); /* max possible value=0x0fff */
1284
1285 outw(BUS_TO_RINGBASE(idev->busaddr), iobase+VLSI_PIO_RINGBASE);
1286
1287 outw(TX_RX_TO_RINGSIZE(idev->tx_ring->size, idev->rx_ring->size),
1288 iobase+VLSI_PIO_RINGSIZE);
1289
1290 ptr = inw(iobase+VLSI_PIO_RINGPTR);
1291 atomic_set(&idev->rx_ring->head, RINGPTR_GET_RX(ptr));
1292 atomic_set(&idev->rx_ring->tail, RINGPTR_GET_RX(ptr));
1293 atomic_set(&idev->tx_ring->head, RINGPTR_GET_TX(ptr));
1294 atomic_set(&idev->tx_ring->tail, RINGPTR_GET_TX(ptr));
1295
1296 vlsi_set_baud(idev, iobase); /* idev->new_baud used as provided by caller */
1297
1298 outb(IRINTR_INT_MASK, iobase+VLSI_PIO_IRINTR); /* just in case - w/c pending IRQ's */
1299 wmb();
1300
1301 /* DO NOT BLINDLY ENABLE IRINTR_ACTEN!
1302 * basically every received pulse fires an ACTIVITY-INT
1303 * leading to >>1000 INT's per second instead of few 10
1304 */
1305
1306 outb(IRINTR_RPKTEN|IRINTR_TPKTEN, iobase+VLSI_PIO_IRINTR);
1307
1308 return 0;
1309 }
1310
1311 static int vlsi_start_hw(vlsi_irda_dev_t *idev)
1312 {
1313 struct pci_dev *pdev = idev->pdev;
1314 struct net_device *ndev = pci_get_drvdata(pdev);
1315 unsigned iobase = ndev->base_addr;
1316 u8 byte;
1317
1318 /* we don't use the legacy UART, disable its address decoding */
1319
1320 pci_read_config_byte(pdev, VLSI_PCI_IRMISC, &byte);
1321 byte &= ~(IRMISC_UARTEN | IRMISC_UARTTST);
1322 pci_write_config_byte(pdev, VLSI_PCI_IRMISC, byte);
1323
1324 /* enable PCI busmaster access to our 16MB page */
1325
1326 pci_write_config_byte(pdev, VLSI_PCI_MSTRPAGE, MSTRPAGE_VALUE);
1327 pci_set_master(pdev);
1328
1329 if (vlsi_init_chip(pdev) < 0) {
1330 pci_disable_device(pdev);
1331 return -1;
1332 }
1333
1334 vlsi_fill_rx(idev->rx_ring);
1335
1336 do_gettimeofday(&idev->last_rx); /* first mtt may start from now on */
1337
1338 outw(0, iobase+VLSI_PIO_PROMPT); /* kick hw state machine */
1339
1340 return 0;
1341 }
1342
1343 static int vlsi_stop_hw(vlsi_irda_dev_t *idev)
1344 {
1345 struct pci_dev *pdev = idev->pdev;
1346 struct net_device *ndev = pci_get_drvdata(pdev);
1347 unsigned iobase = ndev->base_addr;
1348 unsigned long flags;
1349
1350 spin_lock_irqsave(&idev->lock,flags);
1351 outw(0, iobase+VLSI_PIO_IRENABLE);
1352 outw(0, iobase+VLSI_PIO_IRCFG); /* disable everything */
1353
1354 /* disable and w/c irqs */
1355 outb(0, iobase+VLSI_PIO_IRINTR);
1356 wmb();
1357 outb(IRINTR_INT_MASK, iobase+VLSI_PIO_IRINTR);
1358 spin_unlock_irqrestore(&idev->lock,flags);
1359
1360 vlsi_unarm_tx(idev);
1361 vlsi_unarm_rx(idev);
1362
1363 vlsi_clear_regs(iobase);
1364 vlsi_stop_clock(pdev);
1365
1366 pci_disable_device(pdev);
1367
1368 return 0;
1369 }
1370
1371 /**************************************************************/
1372
1373 static void vlsi_tx_timeout(struct net_device *ndev)
1374 {
1375 vlsi_irda_dev_t *idev = netdev_priv(ndev);
1376
1377
1378 vlsi_reg_debug(ndev->base_addr, __func__);
1379 vlsi_ring_debug(idev->tx_ring);
1380
1381 if (netif_running(ndev))
1382 netif_stop_queue(ndev);
1383
1384 vlsi_stop_hw(idev);
1385
1386 /* now simply restart the whole thing */
1387
1388 if (!idev->new_baud)
1389 idev->new_baud = idev->baud; /* keep current baudrate */
1390
1391 if (vlsi_start_hw(idev))
1392 net_err_ratelimited("%s: failed to restart hw - %s(%s) unusable!\n",
1393 __func__, pci_name(idev->pdev), ndev->name);
1394 else
1395 netif_start_queue(ndev);
1396 }
1397
1398 static int vlsi_ioctl(struct net_device *ndev, struct ifreq *rq, int cmd)
1399 {
1400 vlsi_irda_dev_t *idev = netdev_priv(ndev);
1401 struct if_irda_req *irq = (struct if_irda_req *) rq;
1402 unsigned long flags;
1403 u16 fifocnt;
1404 int ret = 0;
1405
1406 switch (cmd) {
1407 case SIOCSBANDWIDTH:
1408 if (!capable(CAP_NET_ADMIN)) {
1409 ret = -EPERM;
1410 break;
1411 }
1412 spin_lock_irqsave(&idev->lock, flags);
1413 idev->new_baud = irq->ifr_baudrate;
1414 /* when called from userland there might be a minor race window here
1415 * if the stack tries to change speed concurrently - which would be
1416 * pretty strange anyway with the userland having full control...
1417 */
1418 vlsi_set_baud(idev, ndev->base_addr);
1419 spin_unlock_irqrestore(&idev->lock, flags);
1420 break;
1421 case SIOCSMEDIABUSY:
1422 if (!capable(CAP_NET_ADMIN)) {
1423 ret = -EPERM;
1424 break;
1425 }
1426 irda_device_set_media_busy(ndev, TRUE);
1427 break;
1428 case SIOCGRECEIVING:
1429 /* the best we can do: check whether there are any bytes in rx fifo.
1430 * The trustable window (in case some data arrives just afterwards)
1431 * may be as short as 1usec or so at 4Mbps.
1432 */
1433 fifocnt = inw(ndev->base_addr+VLSI_PIO_RCVBCNT) & RCVBCNT_MASK;
1434 irq->ifr_receiving = (fifocnt!=0) ? 1 : 0;
1435 break;
1436 default:
1437 net_warn_ratelimited("%s: notsupp - cmd=%04x\n",
1438 __func__, cmd);
1439 ret = -EOPNOTSUPP;
1440 }
1441
1442 return ret;
1443 }
1444
1445 /********************************************************/
1446
1447 static irqreturn_t vlsi_interrupt(int irq, void *dev_instance)
1448 {
1449 struct net_device *ndev = dev_instance;
1450 vlsi_irda_dev_t *idev = netdev_priv(ndev);
1451 unsigned iobase;
1452 u8 irintr;
1453 int boguscount = 5;
1454 unsigned long flags;
1455 int handled = 0;
1456
1457 iobase = ndev->base_addr;
1458 spin_lock_irqsave(&idev->lock,flags);
1459 do {
1460 irintr = inb(iobase+VLSI_PIO_IRINTR);
1461 mb();
1462 outb(irintr, iobase+VLSI_PIO_IRINTR); /* acknowledge asap */
1463
1464 if (!(irintr&=IRINTR_INT_MASK)) /* not our INT - probably shared */
1465 break;
1466
1467 handled = 1;
1468
1469 if (unlikely(!(irintr & ~IRINTR_ACTIVITY)))
1470 break; /* nothing todo if only activity */
1471
1472 if (irintr&IRINTR_RPKTINT)
1473 vlsi_rx_interrupt(ndev);
1474
1475 if (irintr&IRINTR_TPKTINT)
1476 vlsi_tx_interrupt(ndev);
1477
1478 } while (--boguscount > 0);
1479 spin_unlock_irqrestore(&idev->lock,flags);
1480
1481 if (boguscount <= 0)
1482 net_info_ratelimited("%s: too much work in interrupt!\n",
1483 __func__);
1484 return IRQ_RETVAL(handled);
1485 }
1486
1487 /********************************************************/
1488
1489 static int vlsi_open(struct net_device *ndev)
1490 {
1491 vlsi_irda_dev_t *idev = netdev_priv(ndev);
1492 int err = -EAGAIN;
1493 char hwname[32];
1494
1495 if (pci_request_regions(idev->pdev, drivername)) {
1496 net_warn_ratelimited("%s: io resource busy\n", __func__);
1497 goto errout;
1498 }
1499 ndev->base_addr = pci_resource_start(idev->pdev,0);
1500 ndev->irq = idev->pdev->irq;
1501
1502 /* under some rare occasions the chip apparently comes up with
1503 * IRQ's pending. We better w/c pending IRQ and disable them all
1504 */
1505
1506 outb(IRINTR_INT_MASK, ndev->base_addr+VLSI_PIO_IRINTR);
1507
1508 if (request_irq(ndev->irq, vlsi_interrupt, IRQF_SHARED,
1509 drivername, ndev)) {
1510 net_warn_ratelimited("%s: couldn't get IRQ: %d\n",
1511 __func__, ndev->irq);
1512 goto errout_io;
1513 }
1514
1515 if ((err = vlsi_create_hwif(idev)) != 0)
1516 goto errout_irq;
1517
1518 sprintf(hwname, "VLSI-FIR @ 0x%04x", (unsigned)ndev->base_addr);
1519 idev->irlap = irlap_open(ndev,&idev->qos,hwname);
1520 if (!idev->irlap)
1521 goto errout_free_ring;
1522
1523 do_gettimeofday(&idev->last_rx); /* first mtt may start from now on */
1524
1525 idev->new_baud = 9600; /* start with IrPHY using 9600(SIR) mode */
1526
1527 if ((err = vlsi_start_hw(idev)) != 0)
1528 goto errout_close_irlap;
1529
1530 netif_start_queue(ndev);
1531
1532 net_info_ratelimited("%s: device %s operational\n",
1533 __func__, ndev->name);
1534
1535 return 0;
1536
1537 errout_close_irlap:
1538 irlap_close(idev->irlap);
1539 errout_free_ring:
1540 vlsi_destroy_hwif(idev);
1541 errout_irq:
1542 free_irq(ndev->irq,ndev);
1543 errout_io:
1544 pci_release_regions(idev->pdev);
1545 errout:
1546 return err;
1547 }
1548
1549 static int vlsi_close(struct net_device *ndev)
1550 {
1551 vlsi_irda_dev_t *idev = netdev_priv(ndev);
1552
1553 netif_stop_queue(ndev);
1554
1555 if (idev->irlap)
1556 irlap_close(idev->irlap);
1557 idev->irlap = NULL;
1558
1559 vlsi_stop_hw(idev);
1560
1561 vlsi_destroy_hwif(idev);
1562
1563 free_irq(ndev->irq,ndev);
1564
1565 pci_release_regions(idev->pdev);
1566
1567 net_info_ratelimited("%s: device %s stopped\n", __func__, ndev->name);
1568
1569 return 0;
1570 }
1571
1572 static const struct net_device_ops vlsi_netdev_ops = {
1573 .ndo_open = vlsi_open,
1574 .ndo_stop = vlsi_close,
1575 .ndo_start_xmit = vlsi_hard_start_xmit,
1576 .ndo_do_ioctl = vlsi_ioctl,
1577 .ndo_tx_timeout = vlsi_tx_timeout,
1578 };
1579
1580 static int vlsi_irda_init(struct net_device *ndev)
1581 {
1582 vlsi_irda_dev_t *idev = netdev_priv(ndev);
1583 struct pci_dev *pdev = idev->pdev;
1584
1585 ndev->irq = pdev->irq;
1586 ndev->base_addr = pci_resource_start(pdev,0);
1587
1588 /* PCI busmastering
1589 * see include file for details why we need these 2 masks, in this order!
1590 */
1591
1592 if (pci_set_dma_mask(pdev,DMA_MASK_USED_BY_HW) ||
1593 pci_set_dma_mask(pdev,DMA_MASK_MSTRPAGE)) {
1594 net_err_ratelimited("%s: aborting due to PCI BM-DMA address limitations\n",
1595 __func__);
1596 return -1;
1597 }
1598
1599 irda_init_max_qos_capabilies(&idev->qos);
1600
1601 /* the VLSI82C147 does not support 576000! */
1602
1603 idev->qos.baud_rate.bits = IR_2400 | IR_9600
1604 | IR_19200 | IR_38400 | IR_57600 | IR_115200
1605 | IR_1152000 | (IR_4000000 << 8);
1606
1607 idev->qos.min_turn_time.bits = qos_mtt_bits;
1608
1609 irda_qos_bits_to_value(&idev->qos);
1610
1611 /* currently no public media definitions for IrDA */
1612
1613 ndev->flags |= IFF_PORTSEL | IFF_AUTOMEDIA;
1614 ndev->if_port = IF_PORT_UNKNOWN;
1615
1616 ndev->netdev_ops = &vlsi_netdev_ops;
1617 ndev->watchdog_timeo = 500*HZ/1000; /* max. allowed turn time for IrLAP */
1618
1619 SET_NETDEV_DEV(ndev, &pdev->dev);
1620
1621 return 0;
1622 }
1623
1624 /**************************************************************/
1625
1626 static int
1627 vlsi_irda_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1628 {
1629 struct net_device *ndev;
1630 vlsi_irda_dev_t *idev;
1631
1632 if (pci_enable_device(pdev))
1633 goto out;
1634 else
1635 pdev->current_state = 0; /* hw must be running now */
1636
1637 net_info_ratelimited("%s: IrDA PCI controller %s detected\n",
1638 drivername, pci_name(pdev));
1639
1640 if ( !pci_resource_start(pdev,0) ||
1641 !(pci_resource_flags(pdev,0) & IORESOURCE_IO) ) {
1642 net_err_ratelimited("%s: bar 0 invalid", __func__);
1643 goto out_disable;
1644 }
1645
1646 ndev = alloc_irdadev(sizeof(*idev));
1647 if (ndev==NULL) {
1648 net_err_ratelimited("%s: Unable to allocate device memory.\n",
1649 __func__);
1650 goto out_disable;
1651 }
1652
1653 idev = netdev_priv(ndev);
1654
1655 spin_lock_init(&idev->lock);
1656 mutex_init(&idev->mtx);
1657 mutex_lock(&idev->mtx);
1658 idev->pdev = pdev;
1659
1660 if (vlsi_irda_init(ndev) < 0)
1661 goto out_freedev;
1662
1663 if (register_netdev(ndev) < 0) {
1664 net_err_ratelimited("%s: register_netdev failed\n", __func__);
1665 goto out_freedev;
1666 }
1667
1668 if (vlsi_proc_root != NULL) {
1669 struct proc_dir_entry *ent;
1670
1671 ent = proc_create_data(ndev->name, S_IFREG|S_IRUGO,
1672 vlsi_proc_root, VLSI_PROC_FOPS, ndev);
1673 if (!ent) {
1674 net_warn_ratelimited("%s: failed to create proc entry\n",
1675 __func__);
1676 } else {
1677 proc_set_size(ent, 0);
1678 }
1679 idev->proc_entry = ent;
1680 }
1681 net_info_ratelimited("%s: registered device %s\n",
1682 drivername, ndev->name);
1683
1684 pci_set_drvdata(pdev, ndev);
1685 mutex_unlock(&idev->mtx);
1686
1687 return 0;
1688
1689 out_freedev:
1690 mutex_unlock(&idev->mtx);
1691 free_netdev(ndev);
1692 out_disable:
1693 pci_disable_device(pdev);
1694 out:
1695 return -ENODEV;
1696 }
1697
1698 static void vlsi_irda_remove(struct pci_dev *pdev)
1699 {
1700 struct net_device *ndev = pci_get_drvdata(pdev);
1701 vlsi_irda_dev_t *idev;
1702
1703 if (!ndev) {
1704 net_err_ratelimited("%s: lost netdevice?\n", drivername);
1705 return;
1706 }
1707
1708 unregister_netdev(ndev);
1709
1710 idev = netdev_priv(ndev);
1711 mutex_lock(&idev->mtx);
1712 if (idev->proc_entry) {
1713 remove_proc_entry(ndev->name, vlsi_proc_root);
1714 idev->proc_entry = NULL;
1715 }
1716 mutex_unlock(&idev->mtx);
1717
1718 free_netdev(ndev);
1719
1720 net_info_ratelimited("%s: %s removed\n", drivername, pci_name(pdev));
1721 }
1722
1723 #ifdef CONFIG_PM
1724
1725 /* The Controller doesn't provide PCI PM capabilities as defined by PCI specs.
1726 * Some of the Linux PCI-PM code however depends on this, for example in
1727 * pci_set_power_state(). So we have to take care to perform the required
1728 * operations on our own (particularly reflecting the pdev->current_state)
1729 * otherwise we might get cheated by pci-pm.
1730 */
1731
1732
1733 static int vlsi_irda_suspend(struct pci_dev *pdev, pm_message_t state)
1734 {
1735 struct net_device *ndev = pci_get_drvdata(pdev);
1736 vlsi_irda_dev_t *idev;
1737
1738 if (!ndev) {
1739 net_err_ratelimited("%s - %s: no netdevice\n",
1740 __func__, pci_name(pdev));
1741 return 0;
1742 }
1743 idev = netdev_priv(ndev);
1744 mutex_lock(&idev->mtx);
1745 if (pdev->current_state != 0) { /* already suspended */
1746 if (state.event > pdev->current_state) { /* simply go deeper */
1747 pci_set_power_state(pdev, pci_choose_state(pdev, state));
1748 pdev->current_state = state.event;
1749 }
1750 else
1751 net_err_ratelimited("%s - %s: invalid suspend request %u -> %u\n",
1752 __func__, pci_name(pdev),
1753 pdev->current_state, state.event);
1754 mutex_unlock(&idev->mtx);
1755 return 0;
1756 }
1757
1758 if (netif_running(ndev)) {
1759 netif_device_detach(ndev);
1760 vlsi_stop_hw(idev);
1761 pci_save_state(pdev);
1762 if (!idev->new_baud)
1763 /* remember speed settings to restore on resume */
1764 idev->new_baud = idev->baud;
1765 }
1766
1767 pci_set_power_state(pdev, pci_choose_state(pdev, state));
1768 pdev->current_state = state.event;
1769 idev->resume_ok = 1;
1770 mutex_unlock(&idev->mtx);
1771 return 0;
1772 }
1773
1774 static int vlsi_irda_resume(struct pci_dev *pdev)
1775 {
1776 struct net_device *ndev = pci_get_drvdata(pdev);
1777 vlsi_irda_dev_t *idev;
1778
1779 if (!ndev) {
1780 net_err_ratelimited("%s - %s: no netdevice\n",
1781 __func__, pci_name(pdev));
1782 return 0;
1783 }
1784 idev = netdev_priv(ndev);
1785 mutex_lock(&idev->mtx);
1786 if (pdev->current_state == 0) {
1787 mutex_unlock(&idev->mtx);
1788 net_warn_ratelimited("%s - %s: already resumed\n",
1789 __func__, pci_name(pdev));
1790 return 0;
1791 }
1792
1793 pci_set_power_state(pdev, PCI_D0);
1794 pdev->current_state = PM_EVENT_ON;
1795
1796 if (!idev->resume_ok) {
1797 /* should be obsolete now - but used to happen due to:
1798 * - pci layer initially setting pdev->current_state = 4 (unknown)
1799 * - pci layer did not walk the save_state-tree (might be APM problem)
1800 * so we could not refuse to suspend from undefined state
1801 * - vlsi_irda_suspend detected invalid state and refused to save
1802 * configuration for resume - but was too late to stop suspending
1803 * - vlsi_irda_resume got screwed when trying to resume from garbage
1804 *
1805 * now we explicitly set pdev->current_state = 0 after enabling the
1806 * device and independently resume_ok should catch any garbage config.
1807 */
1808 net_warn_ratelimited("%s - hm, nothing to resume?\n", __func__);
1809 mutex_unlock(&idev->mtx);
1810 return 0;
1811 }
1812
1813 if (netif_running(ndev)) {
1814 pci_restore_state(pdev);
1815 vlsi_start_hw(idev);
1816 netif_device_attach(ndev);
1817 }
1818 idev->resume_ok = 0;
1819 mutex_unlock(&idev->mtx);
1820 return 0;
1821 }
1822
1823 #endif /* CONFIG_PM */
1824
1825 /*********************************************************/
1826
1827 static struct pci_driver vlsi_irda_driver = {
1828 .name = drivername,
1829 .id_table = vlsi_irda_table,
1830 .probe = vlsi_irda_probe,
1831 .remove = vlsi_irda_remove,
1832 #ifdef CONFIG_PM
1833 .suspend = vlsi_irda_suspend,
1834 .resume = vlsi_irda_resume,
1835 #endif
1836 };
1837
1838 #define PROC_DIR ("driver/" DRIVER_NAME)
1839
1840 static int __init vlsi_mod_init(void)
1841 {
1842 int i, ret;
1843
1844 if (clksrc < 0 || clksrc > 3) {
1845 net_err_ratelimited("%s: invalid clksrc=%d\n",
1846 drivername, clksrc);
1847 return -1;
1848 }
1849
1850 for (i = 0; i < 2; i++) {
1851 switch(ringsize[i]) {
1852 case 4:
1853 case 8:
1854 case 16:
1855 case 32:
1856 case 64:
1857 break;
1858 default:
1859 net_warn_ratelimited("%s: invalid %s ringsize %d, using default=8\n",
1860 drivername,
1861 i ? "rx" : "tx",
1862 ringsize[i]);
1863 ringsize[i] = 8;
1864 break;
1865 }
1866 }
1867
1868 sirpulse = !!sirpulse;
1869
1870 /* proc_mkdir returns NULL if !CONFIG_PROC_FS.
1871 * Failure to create the procfs entry is handled like running
1872 * without procfs - it's not required for the driver to work.
1873 */
1874 vlsi_proc_root = proc_mkdir(PROC_DIR, NULL);
1875
1876 ret = pci_register_driver(&vlsi_irda_driver);
1877
1878 if (ret && vlsi_proc_root)
1879 remove_proc_entry(PROC_DIR, NULL);
1880 return ret;
1881
1882 }
1883
1884 static void __exit vlsi_mod_exit(void)
1885 {
1886 pci_unregister_driver(&vlsi_irda_driver);
1887 if (vlsi_proc_root)
1888 remove_proc_entry(PROC_DIR, NULL);
1889 }
1890
1891 module_init(vlsi_mod_init);
1892 module_exit(vlsi_mod_exit);
Linux with added FPC-III support