1 // SPDX-License-Identifier: GPL-2.0
3 * dwc3-pci.c - PCI Specific glue layer
5 * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com
7 * Authors: Felipe Balbi <balbi@ti.com>,
8 * Sebastian Andrzej Siewior <bigeasy@linutronix.de>
11 #include <linux/kernel.h>
12 #include <linux/module.h>
13 #include <linux/slab.h>
14 #include <linux/pci.h>
15 #include <linux/workqueue.h>
16 #include <linux/pm_runtime.h>
17 #include <linux/platform_device.h>
18 #include <linux/gpio/consumer.h>
19 #include <linux/acpi.h>
20 #include <linux/delay.h>
22 #define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3 0xabcd
23 #define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3_AXI 0xabce
24 #define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB31 0xabcf
25 #define PCI_DEVICE_ID_INTEL_BYT 0x0f37
26 #define PCI_DEVICE_ID_INTEL_MRFLD 0x119e
27 #define PCI_DEVICE_ID_INTEL_BSW 0x22b7
28 #define PCI_DEVICE_ID_INTEL_SPTLP 0x9d30
29 #define PCI_DEVICE_ID_INTEL_SPTH 0xa130
30 #define PCI_DEVICE_ID_INTEL_BXT 0x0aaa
31 #define PCI_DEVICE_ID_INTEL_BXT_M 0x1aaa
32 #define PCI_DEVICE_ID_INTEL_APL 0x5aaa
33 #define PCI_DEVICE_ID_INTEL_KBP 0xa2b0
34 #define PCI_DEVICE_ID_INTEL_GLK 0x31aa
35 #define PCI_DEVICE_ID_INTEL_CNPLP 0x9dee
36 #define PCI_DEVICE_ID_INTEL_CNPH 0xa36e
38 #define PCI_INTEL_BXT_DSM_GUID "732b85d5-b7a7-4a1b-9ba0-4bbd00ffd511"
39 #define PCI_INTEL_BXT_FUNC_PMU_PWR 4
40 #define PCI_INTEL_BXT_STATE_D0 0
41 #define PCI_INTEL_BXT_STATE_D3 3
44 * struct dwc3_pci - Driver private structure
45 * @dwc3: child dwc3 platform_device
46 * @pci: our link to PCI bus
48 * @has_dsm_for_pm: true for devices which need to run _DSM on runtime PM
51 struct platform_device
*dwc3
;
56 unsigned int has_dsm_for_pm
:1;
57 struct work_struct wakeup_work
;
60 static const struct acpi_gpio_params reset_gpios
= { 0, 0, false };
61 static const struct acpi_gpio_params cs_gpios
= { 1, 0, false };
63 static const struct acpi_gpio_mapping acpi_dwc3_byt_gpios
[] = {
64 { "reset-gpios", &reset_gpios
, 1 },
65 { "cs-gpios", &cs_gpios
, 1 },
69 static int dwc3_pci_quirks(struct dwc3_pci
*dwc
)
71 struct platform_device
*dwc3
= dwc
->dwc3
;
72 struct pci_dev
*pdev
= dwc
->pci
;
74 if (pdev
->vendor
== PCI_VENDOR_ID_AMD
&&
75 pdev
->device
== PCI_DEVICE_ID_AMD_NL_USB
) {
76 struct property_entry properties
[] = {
77 PROPERTY_ENTRY_BOOL("snps,has-lpm-erratum"),
78 PROPERTY_ENTRY_U8("snps,lpm-nyet-threshold", 0xf),
79 PROPERTY_ENTRY_BOOL("snps,u2exit_lfps_quirk"),
80 PROPERTY_ENTRY_BOOL("snps,u2ss_inp3_quirk"),
81 PROPERTY_ENTRY_BOOL("snps,req_p1p2p3_quirk"),
82 PROPERTY_ENTRY_BOOL("snps,del_p1p2p3_quirk"),
83 PROPERTY_ENTRY_BOOL("snps,del_phy_power_chg_quirk"),
84 PROPERTY_ENTRY_BOOL("snps,lfps_filter_quirk"),
85 PROPERTY_ENTRY_BOOL("snps,rx_detect_poll_quirk"),
86 PROPERTY_ENTRY_BOOL("snps,tx_de_emphasis_quirk"),
87 PROPERTY_ENTRY_U8("snps,tx_de_emphasis", 1),
89 * FIXME these quirks should be removed when AMD NL
92 PROPERTY_ENTRY_BOOL("snps,disable_scramble_quirk"),
93 PROPERTY_ENTRY_BOOL("snps,dis_u3_susphy_quirk"),
94 PROPERTY_ENTRY_BOOL("snps,dis_u2_susphy_quirk"),
95 PROPERTY_ENTRY_BOOL("linux,sysdev_is_parent"),
99 return platform_device_add_properties(dwc3
, properties
);
102 if (pdev
->vendor
== PCI_VENDOR_ID_INTEL
) {
105 struct property_entry properties
[] = {
106 PROPERTY_ENTRY_STRING("dr_mode", "peripheral"),
107 PROPERTY_ENTRY_BOOL("linux,sysdev_is_parent"),
111 ret
= platform_device_add_properties(dwc3
, properties
);
115 if (pdev
->device
== PCI_DEVICE_ID_INTEL_BXT
||
116 pdev
->device
== PCI_DEVICE_ID_INTEL_BXT_M
) {
117 guid_parse(PCI_INTEL_BXT_DSM_GUID
, &dwc
->guid
);
118 dwc
->has_dsm_for_pm
= true;
121 if (pdev
->device
== PCI_DEVICE_ID_INTEL_BYT
) {
122 struct gpio_desc
*gpio
;
124 ret
= devm_acpi_dev_add_driver_gpios(&pdev
->dev
,
125 acpi_dwc3_byt_gpios
);
127 dev_dbg(&pdev
->dev
, "failed to add mapping table\n");
130 * These GPIOs will turn on the USB2 PHY. Note that we have to
131 * put the gpio descriptors again here because the phy driver
132 * might want to grab them, too.
134 gpio
= gpiod_get_optional(&pdev
->dev
, "cs", GPIOD_OUT_LOW
);
136 return PTR_ERR(gpio
);
138 gpiod_set_value_cansleep(gpio
, 1);
141 gpio
= gpiod_get_optional(&pdev
->dev
, "reset", GPIOD_OUT_LOW
);
143 return PTR_ERR(gpio
);
146 gpiod_set_value_cansleep(gpio
, 1);
148 usleep_range(10000, 11000);
153 if (pdev
->vendor
== PCI_VENDOR_ID_SYNOPSYS
&&
154 (pdev
->device
== PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3
||
155 pdev
->device
== PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3_AXI
||
156 pdev
->device
== PCI_DEVICE_ID_SYNOPSYS_HAPSUSB31
)) {
157 struct property_entry properties
[] = {
158 PROPERTY_ENTRY_BOOL("snps,usb3_lpm_capable"),
159 PROPERTY_ENTRY_BOOL("snps,has-lpm-erratum"),
160 PROPERTY_ENTRY_BOOL("snps,dis_enblslpm_quirk"),
161 PROPERTY_ENTRY_BOOL("linux,sysdev_is_parent"),
165 return platform_device_add_properties(dwc3
, properties
);
172 static void dwc3_pci_resume_work(struct work_struct
*work
)
174 struct dwc3_pci
*dwc
= container_of(work
, struct dwc3_pci
, wakeup_work
);
175 struct platform_device
*dwc3
= dwc
->dwc3
;
178 ret
= pm_runtime_get_sync(&dwc3
->dev
);
182 pm_runtime_mark_last_busy(&dwc3
->dev
);
183 pm_runtime_put_sync_autosuspend(&dwc3
->dev
);
187 static int dwc3_pci_probe(struct pci_dev
*pci
,
188 const struct pci_device_id
*id
)
190 struct dwc3_pci
*dwc
;
191 struct resource res
[2];
193 struct device
*dev
= &pci
->dev
;
195 ret
= pcim_enable_device(pci
);
197 dev_err(dev
, "failed to enable pci device\n");
203 dwc
= devm_kzalloc(dev
, sizeof(*dwc
), GFP_KERNEL
);
207 dwc
->dwc3
= platform_device_alloc("dwc3", PLATFORM_DEVID_AUTO
);
211 memset(res
, 0x00, sizeof(struct resource
) * ARRAY_SIZE(res
));
213 res
[0].start
= pci_resource_start(pci
, 0);
214 res
[0].end
= pci_resource_end(pci
, 0);
215 res
[0].name
= "dwc_usb3";
216 res
[0].flags
= IORESOURCE_MEM
;
218 res
[1].start
= pci
->irq
;
219 res
[1].name
= "dwc_usb3";
220 res
[1].flags
= IORESOURCE_IRQ
;
222 ret
= platform_device_add_resources(dwc
->dwc3
, res
, ARRAY_SIZE(res
));
224 dev_err(dev
, "couldn't add resources to dwc3 device\n");
229 dwc
->dwc3
->dev
.parent
= dev
;
230 ACPI_COMPANION_SET(&dwc
->dwc3
->dev
, ACPI_COMPANION(dev
));
232 ret
= dwc3_pci_quirks(dwc
);
236 ret
= platform_device_add(dwc
->dwc3
);
238 dev_err(dev
, "failed to register dwc3 device\n");
242 device_init_wakeup(dev
, true);
243 pci_set_drvdata(pci
, dwc
);
246 INIT_WORK(&dwc
->wakeup_work
, dwc3_pci_resume_work
);
251 platform_device_put(dwc
->dwc3
);
255 static void dwc3_pci_remove(struct pci_dev
*pci
)
257 struct dwc3_pci
*dwc
= pci_get_drvdata(pci
);
260 cancel_work_sync(&dwc
->wakeup_work
);
262 device_init_wakeup(&pci
->dev
, false);
263 pm_runtime_get(&pci
->dev
);
264 platform_device_unregister(dwc
->dwc3
);
267 static const struct pci_device_id dwc3_pci_id_table
[] = {
269 PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS
,
270 PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3
),
273 PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS
,
274 PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3_AXI
),
277 PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS
,
278 PCI_DEVICE_ID_SYNOPSYS_HAPSUSB31
),
280 { PCI_DEVICE(PCI_VENDOR_ID_INTEL
, PCI_DEVICE_ID_INTEL_BSW
), },
281 { PCI_DEVICE(PCI_VENDOR_ID_INTEL
, PCI_DEVICE_ID_INTEL_BYT
), },
282 { PCI_DEVICE(PCI_VENDOR_ID_INTEL
, PCI_DEVICE_ID_INTEL_MRFLD
), },
283 { PCI_DEVICE(PCI_VENDOR_ID_INTEL
, PCI_DEVICE_ID_INTEL_SPTLP
), },
284 { PCI_DEVICE(PCI_VENDOR_ID_INTEL
, PCI_DEVICE_ID_INTEL_SPTH
), },
285 { PCI_DEVICE(PCI_VENDOR_ID_INTEL
, PCI_DEVICE_ID_INTEL_BXT
), },
286 { PCI_DEVICE(PCI_VENDOR_ID_INTEL
, PCI_DEVICE_ID_INTEL_BXT_M
), },
287 { PCI_DEVICE(PCI_VENDOR_ID_INTEL
, PCI_DEVICE_ID_INTEL_APL
), },
288 { PCI_DEVICE(PCI_VENDOR_ID_INTEL
, PCI_DEVICE_ID_INTEL_KBP
), },
289 { PCI_DEVICE(PCI_VENDOR_ID_INTEL
, PCI_DEVICE_ID_INTEL_GLK
), },
290 { PCI_DEVICE(PCI_VENDOR_ID_INTEL
, PCI_DEVICE_ID_INTEL_CNPLP
), },
291 { PCI_DEVICE(PCI_VENDOR_ID_INTEL
, PCI_DEVICE_ID_INTEL_CNPH
), },
292 { PCI_DEVICE(PCI_VENDOR_ID_AMD
, PCI_DEVICE_ID_AMD_NL_USB
), },
293 { } /* Terminating Entry */
295 MODULE_DEVICE_TABLE(pci
, dwc3_pci_id_table
);
297 #if defined(CONFIG_PM) || defined(CONFIG_PM_SLEEP)
298 static int dwc3_pci_dsm(struct dwc3_pci
*dwc
, int param
)
300 union acpi_object
*obj
;
301 union acpi_object tmp
;
302 union acpi_object argv4
= ACPI_INIT_DSM_ARGV4(1, &tmp
);
304 if (!dwc
->has_dsm_for_pm
)
307 tmp
.type
= ACPI_TYPE_INTEGER
;
308 tmp
.integer
.value
= param
;
310 obj
= acpi_evaluate_dsm(ACPI_HANDLE(&dwc
->pci
->dev
), &dwc
->guid
,
311 1, PCI_INTEL_BXT_FUNC_PMU_PWR
, &argv4
);
313 dev_err(&dwc
->pci
->dev
, "failed to evaluate _DSM\n");
321 #endif /* CONFIG_PM || CONFIG_PM_SLEEP */
324 static int dwc3_pci_runtime_suspend(struct device
*dev
)
326 struct dwc3_pci
*dwc
= dev_get_drvdata(dev
);
328 if (device_can_wakeup(dev
))
329 return dwc3_pci_dsm(dwc
, PCI_INTEL_BXT_STATE_D3
);
334 static int dwc3_pci_runtime_resume(struct device
*dev
)
336 struct dwc3_pci
*dwc
= dev_get_drvdata(dev
);
339 ret
= dwc3_pci_dsm(dwc
, PCI_INTEL_BXT_STATE_D0
);
343 queue_work(pm_wq
, &dwc
->wakeup_work
);
347 #endif /* CONFIG_PM */
349 #ifdef CONFIG_PM_SLEEP
350 static int dwc3_pci_suspend(struct device
*dev
)
352 struct dwc3_pci
*dwc
= dev_get_drvdata(dev
);
354 return dwc3_pci_dsm(dwc
, PCI_INTEL_BXT_STATE_D3
);
357 static int dwc3_pci_resume(struct device
*dev
)
359 struct dwc3_pci
*dwc
= dev_get_drvdata(dev
);
361 return dwc3_pci_dsm(dwc
, PCI_INTEL_BXT_STATE_D0
);
363 #endif /* CONFIG_PM_SLEEP */
365 static const struct dev_pm_ops dwc3_pci_dev_pm_ops
= {
366 SET_SYSTEM_SLEEP_PM_OPS(dwc3_pci_suspend
, dwc3_pci_resume
)
367 SET_RUNTIME_PM_OPS(dwc3_pci_runtime_suspend
, dwc3_pci_runtime_resume
,
371 static struct pci_driver dwc3_pci_driver
= {
373 .id_table
= dwc3_pci_id_table
,
374 .probe
= dwc3_pci_probe
,
375 .remove
= dwc3_pci_remove
,
377 .pm
= &dwc3_pci_dev_pm_ops
,
381 MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
382 MODULE_LICENSE("GPL v2");
383 MODULE_DESCRIPTION("DesignWare USB3 PCI Glue Layer");
385 module_pci_driver(dwc3_pci_driver
);