mm/hmm.c: remove superfluous RCU protection around radix tree lookup
[linux/fpc-iii.git] / kernel / irq / msi.c
blob2a8571f72b173b2d06ef14d8576536b8052056b9
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (C) 2014 Intel Corp.
4 * Author: Jiang Liu <jiang.liu@linux.intel.com>
6 * This file is licensed under GPLv2.
8 * This file contains common code to support Message Signalled Interrupt for
9 * PCI compatible and non PCI compatible devices.
11 #include <linux/types.h>
12 #include <linux/device.h>
13 #include <linux/irq.h>
14 #include <linux/irqdomain.h>
15 #include <linux/msi.h>
16 #include <linux/slab.h>
18 #include "internals.h"
20 /**
21 * alloc_msi_entry - Allocate an initialize msi_entry
22 * @dev: Pointer to the device for which this is allocated
23 * @nvec: The number of vectors used in this entry
24 * @affinity: Optional pointer to an affinity mask array size of @nvec
26 * If @affinity is not NULL then a an affinity array[@nvec] is allocated
27 * and the affinity masks from @affinity are copied.
29 struct msi_desc *
30 alloc_msi_entry(struct device *dev, int nvec, const struct cpumask *affinity)
32 struct msi_desc *desc;
34 desc = kzalloc(sizeof(*desc), GFP_KERNEL);
35 if (!desc)
36 return NULL;
38 INIT_LIST_HEAD(&desc->list);
39 desc->dev = dev;
40 desc->nvec_used = nvec;
41 if (affinity) {
42 desc->affinity = kmemdup(affinity,
43 nvec * sizeof(*desc->affinity), GFP_KERNEL);
44 if (!desc->affinity) {
45 kfree(desc);
46 return NULL;
50 return desc;
53 void free_msi_entry(struct msi_desc *entry)
55 kfree(entry->affinity);
56 kfree(entry);
59 void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
61 *msg = entry->msg;
64 void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg)
66 struct msi_desc *entry = irq_get_msi_desc(irq);
68 __get_cached_msi_msg(entry, msg);
70 EXPORT_SYMBOL_GPL(get_cached_msi_msg);
72 #ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN
73 static inline void irq_chip_write_msi_msg(struct irq_data *data,
74 struct msi_msg *msg)
76 data->chip->irq_write_msi_msg(data, msg);
79 /**
80 * msi_domain_set_affinity - Generic affinity setter function for MSI domains
81 * @irq_data: The irq data associated to the interrupt
82 * @mask: The affinity mask to set
83 * @force: Flag to enforce setting (disable online checks)
85 * Intended to be used by MSI interrupt controllers which are
86 * implemented with hierarchical domains.
88 int msi_domain_set_affinity(struct irq_data *irq_data,
89 const struct cpumask *mask, bool force)
91 struct irq_data *parent = irq_data->parent_data;
92 struct msi_msg msg;
93 int ret;
95 ret = parent->chip->irq_set_affinity(parent, mask, force);
96 if (ret >= 0 && ret != IRQ_SET_MASK_OK_DONE) {
97 BUG_ON(irq_chip_compose_msi_msg(irq_data, &msg));
98 irq_chip_write_msi_msg(irq_data, &msg);
101 return ret;
104 static int msi_domain_activate(struct irq_domain *domain,
105 struct irq_data *irq_data, bool early)
107 struct msi_msg msg;
109 BUG_ON(irq_chip_compose_msi_msg(irq_data, &msg));
110 irq_chip_write_msi_msg(irq_data, &msg);
111 return 0;
114 static void msi_domain_deactivate(struct irq_domain *domain,
115 struct irq_data *irq_data)
117 struct msi_msg msg;
119 memset(&msg, 0, sizeof(msg));
120 irq_chip_write_msi_msg(irq_data, &msg);
123 static int msi_domain_alloc(struct irq_domain *domain, unsigned int virq,
124 unsigned int nr_irqs, void *arg)
126 struct msi_domain_info *info = domain->host_data;
127 struct msi_domain_ops *ops = info->ops;
128 irq_hw_number_t hwirq = ops->get_hwirq(info, arg);
129 int i, ret;
131 if (irq_find_mapping(domain, hwirq) > 0)
132 return -EEXIST;
134 if (domain->parent) {
135 ret = irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, arg);
136 if (ret < 0)
137 return ret;
140 for (i = 0; i < nr_irqs; i++) {
141 ret = ops->msi_init(domain, info, virq + i, hwirq + i, arg);
142 if (ret < 0) {
143 if (ops->msi_free) {
144 for (i--; i > 0; i--)
145 ops->msi_free(domain, info, virq + i);
147 irq_domain_free_irqs_top(domain, virq, nr_irqs);
148 return ret;
152 return 0;
155 static void msi_domain_free(struct irq_domain *domain, unsigned int virq,
156 unsigned int nr_irqs)
158 struct msi_domain_info *info = domain->host_data;
159 int i;
161 if (info->ops->msi_free) {
162 for (i = 0; i < nr_irqs; i++)
163 info->ops->msi_free(domain, info, virq + i);
165 irq_domain_free_irqs_top(domain, virq, nr_irqs);
168 static const struct irq_domain_ops msi_domain_ops = {
169 .alloc = msi_domain_alloc,
170 .free = msi_domain_free,
171 .activate = msi_domain_activate,
172 .deactivate = msi_domain_deactivate,
175 #ifdef GENERIC_MSI_DOMAIN_OPS
176 static irq_hw_number_t msi_domain_ops_get_hwirq(struct msi_domain_info *info,
177 msi_alloc_info_t *arg)
179 return arg->hwirq;
182 static int msi_domain_ops_prepare(struct irq_domain *domain, struct device *dev,
183 int nvec, msi_alloc_info_t *arg)
185 memset(arg, 0, sizeof(*arg));
186 return 0;
189 static void msi_domain_ops_set_desc(msi_alloc_info_t *arg,
190 struct msi_desc *desc)
192 arg->desc = desc;
194 #else
195 #define msi_domain_ops_get_hwirq NULL
196 #define msi_domain_ops_prepare NULL
197 #define msi_domain_ops_set_desc NULL
198 #endif /* !GENERIC_MSI_DOMAIN_OPS */
200 static int msi_domain_ops_init(struct irq_domain *domain,
201 struct msi_domain_info *info,
202 unsigned int virq, irq_hw_number_t hwirq,
203 msi_alloc_info_t *arg)
205 irq_domain_set_hwirq_and_chip(domain, virq, hwirq, info->chip,
206 info->chip_data);
207 if (info->handler && info->handler_name) {
208 __irq_set_handler(virq, info->handler, 0, info->handler_name);
209 if (info->handler_data)
210 irq_set_handler_data(virq, info->handler_data);
212 return 0;
215 static int msi_domain_ops_check(struct irq_domain *domain,
216 struct msi_domain_info *info,
217 struct device *dev)
219 return 0;
222 static struct msi_domain_ops msi_domain_ops_default = {
223 .get_hwirq = msi_domain_ops_get_hwirq,
224 .msi_init = msi_domain_ops_init,
225 .msi_check = msi_domain_ops_check,
226 .msi_prepare = msi_domain_ops_prepare,
227 .set_desc = msi_domain_ops_set_desc,
230 static void msi_domain_update_dom_ops(struct msi_domain_info *info)
232 struct msi_domain_ops *ops = info->ops;
234 if (ops == NULL) {
235 info->ops = &msi_domain_ops_default;
236 return;
239 if (ops->get_hwirq == NULL)
240 ops->get_hwirq = msi_domain_ops_default.get_hwirq;
241 if (ops->msi_init == NULL)
242 ops->msi_init = msi_domain_ops_default.msi_init;
243 if (ops->msi_check == NULL)
244 ops->msi_check = msi_domain_ops_default.msi_check;
245 if (ops->msi_prepare == NULL)
246 ops->msi_prepare = msi_domain_ops_default.msi_prepare;
247 if (ops->set_desc == NULL)
248 ops->set_desc = msi_domain_ops_default.set_desc;
251 static void msi_domain_update_chip_ops(struct msi_domain_info *info)
253 struct irq_chip *chip = info->chip;
255 BUG_ON(!chip || !chip->irq_mask || !chip->irq_unmask);
256 if (!chip->irq_set_affinity)
257 chip->irq_set_affinity = msi_domain_set_affinity;
261 * msi_create_irq_domain - Create a MSI interrupt domain
262 * @fwnode: Optional fwnode of the interrupt controller
263 * @info: MSI domain info
264 * @parent: Parent irq domain
266 struct irq_domain *msi_create_irq_domain(struct fwnode_handle *fwnode,
267 struct msi_domain_info *info,
268 struct irq_domain *parent)
270 struct irq_domain *domain;
272 if (info->flags & MSI_FLAG_USE_DEF_DOM_OPS)
273 msi_domain_update_dom_ops(info);
274 if (info->flags & MSI_FLAG_USE_DEF_CHIP_OPS)
275 msi_domain_update_chip_ops(info);
277 domain = irq_domain_create_hierarchy(parent, IRQ_DOMAIN_FLAG_MSI, 0,
278 fwnode, &msi_domain_ops, info);
280 if (domain && !domain->name && info->chip)
281 domain->name = info->chip->name;
283 return domain;
286 int msi_domain_prepare_irqs(struct irq_domain *domain, struct device *dev,
287 int nvec, msi_alloc_info_t *arg)
289 struct msi_domain_info *info = domain->host_data;
290 struct msi_domain_ops *ops = info->ops;
291 int ret;
293 ret = ops->msi_check(domain, info, dev);
294 if (ret == 0)
295 ret = ops->msi_prepare(domain, dev, nvec, arg);
297 return ret;
300 int msi_domain_populate_irqs(struct irq_domain *domain, struct device *dev,
301 int virq, int nvec, msi_alloc_info_t *arg)
303 struct msi_domain_info *info = domain->host_data;
304 struct msi_domain_ops *ops = info->ops;
305 struct msi_desc *desc;
306 int ret = 0;
308 for_each_msi_entry(desc, dev) {
309 /* Don't even try the multi-MSI brain damage. */
310 if (WARN_ON(!desc->irq || desc->nvec_used != 1)) {
311 ret = -EINVAL;
312 break;
315 if (!(desc->irq >= virq && desc->irq < (virq + nvec)))
316 continue;
318 ops->set_desc(arg, desc);
319 /* Assumes the domain mutex is held! */
320 ret = irq_domain_alloc_irqs_hierarchy(domain, desc->irq, 1,
321 arg);
322 if (ret)
323 break;
325 irq_set_msi_desc_off(desc->irq, 0, desc);
328 if (ret) {
329 /* Mop up the damage */
330 for_each_msi_entry(desc, dev) {
331 if (!(desc->irq >= virq && desc->irq < (virq + nvec)))
332 continue;
334 irq_domain_free_irqs_common(domain, desc->irq, 1);
338 return ret;
342 * Carefully check whether the device can use reservation mode. If
343 * reservation mode is enabled then the early activation will assign a
344 * dummy vector to the device. If the PCI/MSI device does not support
345 * masking of the entry then this can result in spurious interrupts when
346 * the device driver is not absolutely careful. But even then a malfunction
347 * of the hardware could result in a spurious interrupt on the dummy vector
348 * and render the device unusable. If the entry can be masked then the core
349 * logic will prevent the spurious interrupt and reservation mode can be
350 * used. For now reservation mode is restricted to PCI/MSI.
352 static bool msi_check_reservation_mode(struct irq_domain *domain,
353 struct msi_domain_info *info,
354 struct device *dev)
356 struct msi_desc *desc;
358 if (domain->bus_token != DOMAIN_BUS_PCI_MSI)
359 return false;
361 if (!(info->flags & MSI_FLAG_MUST_REACTIVATE))
362 return false;
364 if (IS_ENABLED(CONFIG_PCI_MSI) && pci_msi_ignore_mask)
365 return false;
368 * Checking the first MSI descriptor is sufficient. MSIX supports
369 * masking and MSI does so when the maskbit is set.
371 desc = first_msi_entry(dev);
372 return desc->msi_attrib.is_msix || desc->msi_attrib.maskbit;
376 * msi_domain_alloc_irqs - Allocate interrupts from a MSI interrupt domain
377 * @domain: The domain to allocate from
378 * @dev: Pointer to device struct of the device for which the interrupts
379 * are allocated
380 * @nvec: The number of interrupts to allocate
382 * Returns 0 on success or an error code.
384 int msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev,
385 int nvec)
387 struct msi_domain_info *info = domain->host_data;
388 struct msi_domain_ops *ops = info->ops;
389 struct irq_data *irq_data;
390 struct msi_desc *desc;
391 msi_alloc_info_t arg;
392 int i, ret, virq;
393 bool can_reserve;
395 ret = msi_domain_prepare_irqs(domain, dev, nvec, &arg);
396 if (ret)
397 return ret;
399 for_each_msi_entry(desc, dev) {
400 ops->set_desc(&arg, desc);
402 virq = __irq_domain_alloc_irqs(domain, -1, desc->nvec_used,
403 dev_to_node(dev), &arg, false,
404 desc->affinity);
405 if (virq < 0) {
406 ret = -ENOSPC;
407 if (ops->handle_error)
408 ret = ops->handle_error(domain, desc, ret);
409 if (ops->msi_finish)
410 ops->msi_finish(&arg, ret);
411 return ret;
414 for (i = 0; i < desc->nvec_used; i++) {
415 irq_set_msi_desc_off(virq, i, desc);
416 irq_debugfs_copy_devname(virq + i, dev);
420 if (ops->msi_finish)
421 ops->msi_finish(&arg, 0);
423 can_reserve = msi_check_reservation_mode(domain, info, dev);
425 for_each_msi_entry(desc, dev) {
426 virq = desc->irq;
427 if (desc->nvec_used == 1)
428 dev_dbg(dev, "irq %d for MSI\n", virq);
429 else
430 dev_dbg(dev, "irq [%d-%d] for MSI\n",
431 virq, virq + desc->nvec_used - 1);
433 * This flag is set by the PCI layer as we need to activate
434 * the MSI entries before the PCI layer enables MSI in the
435 * card. Otherwise the card latches a random msi message.
437 if (!(info->flags & MSI_FLAG_ACTIVATE_EARLY))
438 continue;
440 irq_data = irq_domain_get_irq_data(domain, desc->irq);
441 if (!can_reserve)
442 irqd_clr_can_reserve(irq_data);
443 ret = irq_domain_activate_irq(irq_data, can_reserve);
444 if (ret)
445 goto cleanup;
449 * If these interrupts use reservation mode, clear the activated bit
450 * so request_irq() will assign the final vector.
452 if (can_reserve) {
453 for_each_msi_entry(desc, dev) {
454 irq_data = irq_domain_get_irq_data(domain, desc->irq);
455 irqd_clr_activated(irq_data);
458 return 0;
460 cleanup:
461 for_each_msi_entry(desc, dev) {
462 struct irq_data *irqd;
464 if (desc->irq == virq)
465 break;
467 irqd = irq_domain_get_irq_data(domain, desc->irq);
468 if (irqd_is_activated(irqd))
469 irq_domain_deactivate_irq(irqd);
471 msi_domain_free_irqs(domain, dev);
472 return ret;
476 * msi_domain_free_irqs - Free interrupts from a MSI interrupt @domain associated tp @dev
477 * @domain: The domain to managing the interrupts
478 * @dev: Pointer to device struct of the device for which the interrupts
479 * are free
481 void msi_domain_free_irqs(struct irq_domain *domain, struct device *dev)
483 struct msi_desc *desc;
485 for_each_msi_entry(desc, dev) {
487 * We might have failed to allocate an MSI early
488 * enough that there is no IRQ associated to this
489 * entry. If that's the case, don't do anything.
491 if (desc->irq) {
492 irq_domain_free_irqs(desc->irq, desc->nvec_used);
493 desc->irq = 0;
499 * msi_get_domain_info - Get the MSI interrupt domain info for @domain
500 * @domain: The interrupt domain to retrieve data from
502 * Returns the pointer to the msi_domain_info stored in
503 * @domain->host_data.
505 struct msi_domain_info *msi_get_domain_info(struct irq_domain *domain)
507 return (struct msi_domain_info *)domain->host_data;
510 #endif /* CONFIG_GENERIC_MSI_IRQ_DOMAIN */