arch/arm/mach-s5pc100/include/mach/map.h

   1 /* linux/arch/arm/mach-s5pc100/include/mach/map.h
   2  *
   3  * Copyright 2009 Samsung Electronics Co.
   4  *      Byungho Min <bhmin@samsung.com>
   5  *
   6  * Based on mach-s3c6400/include/mach/map.h
   7  *
   8  * S5PC1XX - Memory map definitions
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License version 2 as
  12  * published by the Free Software Foundation.
  13 */
  14
  15 #ifndef __ASM_ARCH_MAP_H
  16 #define __ASM_ARCH_MAP_H __FILE__
  17
  18 #include <plat/map-base.h>
  19
  20
  21 /* Chip ID */
  22 #define S5PC100_PA_CHIPID       (0xE0000000)
  23 #define S5PC1XX_PA_CHIPID       S5PC100_PA_CHIPID
  24 #define S5PC1XX_VA_CHIPID       S3C_VA_SYS
  25
  26 /* System */
  27 #define S5PC100_PA_SYS          (0xE0100000)
  28 #define S5PC100_PA_CLK          (S5PC100_PA_SYS + 0x0)
  29 #define S5PC100_PA_PWR          (S5PC100_PA_SYS + 0x8000)
  30 #define S5PC1XX_PA_CLK          S5PC100_PA_CLK
  31 #define S5PC1XX_PA_PWR          S5PC100_PA_PWR
  32 #define S5PC1XX_VA_CLK          (S3C_VA_SYS + 0x10000)
  33 #define S5PC1XX_VA_PWR          (S3C_VA_SYS + 0x20000)
  34
  35 /* Interrupt */
  36 #define S5PC100_PA_VIC          (0xE4000000)
  37 #define S5PC100_VA_VIC          S3C_VA_IRQ
  38 #define S5PC100_PA_VIC_OFFSET   0x100000
  39 #define S5PC100_VA_VIC_OFFSET   0x10000
  40 #define S5PC1XX_PA_VIC(x)       (S5PC100_PA_VIC + ((x) * S5PC100_PA_VIC_OFFSET))
  41 #define S5PC1XX_VA_VIC(x)       (S5PC100_VA_VIC + ((x) * S5PC100_VA_VIC_OFFSET))
  42
  43 /* Timer */
  44 #define S5PC100_PA_TIMER        (0xEA000000)
  45 #define S5PC1XX_PA_TIMER        S5PC100_PA_TIMER
  46 #define S5PC1XX_VA_TIMER        S3C_VA_TIMER
  47
  48 /* UART */
  49 #define S5PC100_PA_UART         (0xEC000000)
  50 #define S5PC1XX_PA_UART         S5PC100_PA_UART
  51 #define S5PC1XX_VA_UART         S3C_VA_UART
  52
  53 /* IIC */
  54 #define S5PC100_PA_IIC          (0xEC100000)
  55
  56 /* ETC */
  57 #define S5PC100_PA_SDRAM        (0x20000000)
  58
  59 /* compatibility defines. */
  60 #define S3C_PA_UART             S5PC100_PA_UART
  61 #define S3C_PA_UART0            (S5PC100_PA_UART + 0x0)
  62 #define S3C_PA_UART1            (S5PC100_PA_UART + 0x400)
  63 #define S3C_PA_UART2            (S5PC100_PA_UART + 0x800)
  64 #define S3C_PA_UART3            (S5PC100_PA_UART + 0xC00)
  65 #define S3C_VA_UART0            (S3C_VA_UART + 0x0)
  66 #define S3C_VA_UART1            (S3C_VA_UART + 0x400)
  67 #define S3C_VA_UART2            (S3C_VA_UART + 0x800)
  68 #define S3C_VA_UART3            (S3C_VA_UART + 0xC00)
  69 #define S3C_UART_OFFSET         0x400
  70 #define S3C_VA_VIC0             (S3C_VA_IRQ + 0x0)
  71 #define S3C_VA_VIC1             (S3C_VA_IRQ + 0x10000)
  72 #define S3C_VA_VIC2             (S3C_VA_IRQ + 0x20000)
  73 #define S3C_PA_IIC              S5PC100_PA_IIC
  74
  75 #endif /* __ASM_ARCH_C100_MAP_H */