arch/arm/plat-omap/include/mach/io.h

   1 /*
   2  * arch/arm/plat-omap/include/mach/io.h
   3  *
   4  * IO definitions for TI OMAP processors and boards
   5  *
   6  * Copied from arch/arm/mach-sa1100/include/mach/io.h
   7  * Copyright (C) 1997-1999 Russell King
   8  *
   9  * Copyright (C) 2009 Texas Instruments
  10  * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
  11  *
  12  * This program is free software; you can redistribute it and/or modify it
  13  * under the terms of the GNU General Public License as published by the
  14  * Free Software Foundation; either version 2 of the License, or (at your
  15  * option) any later version.
  16  *
  17  * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  18  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  19  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
  20  * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  23  * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  24  * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * You should have received a copy of the GNU General Public License along
  29  * with this program; if not, write to the Free Software Foundation, Inc.,
  30  * 675 Mass Ave, Cambridge, MA 02139, USA.
  31  *
  32  * Modifications:
  33  *  06-12-1997  RMK     Created.
  34  *  07-04-1999  RMK     Major cleanup
  35  */
  36
  37 #ifndef __ASM_ARM_ARCH_IO_H
  38 #define __ASM_ARM_ARCH_IO_H
  39
  40 #include <mach/hardware.h>
  41
  42 #define IO_SPACE_LIMIT 0xffffffff
  43
  44 /*
  45  * We don't actually have real ISA nor PCI buses, but there is so many
  46  * drivers out there that might just work if we fake them...
  47  */
  48 #define __io(a)         __typesafe_io(a)
  49 #define __mem_pci(a)    (a)
  50
  51 /*
  52  * ----------------------------------------------------------------------------
  53  * I/O mapping
  54  * ----------------------------------------------------------------------------
  55  */
  56
  57 #if defined(CONFIG_ARCH_OMAP1)
  58
  59 #define IO_PHYS                 0xFFFB0000
  60 #define IO_OFFSET               0x01000000      /* Virtual IO = 0xfefb0000 */
  61 #define IO_SIZE                 0x40000
  62 #define IO_VIRT                 (IO_PHYS - IO_OFFSET)
  63 #define __IO_ADDRESS(pa)        ((pa) - IO_OFFSET)
  64 #define __OMAP1_IO_ADDRESS(pa)  ((pa) - IO_OFFSET)
  65 #define io_v2p(va)              ((va) + IO_OFFSET)
  66
  67 #elif defined(CONFIG_ARCH_OMAP2)
  68
  69 /* We map both L3 and L4 on OMAP2 */
  70 #define L3_24XX_PHYS    L3_24XX_BASE    /* 0x68000000 */
  71 #define L3_24XX_VIRT    0xf8000000
  72 #define L3_24XX_SIZE    SZ_1M           /* 44kB of 128MB used, want 1MB sect */
  73 #define L4_24XX_PHYS    L4_24XX_BASE    /* 0x48000000 */
  74 #define L4_24XX_VIRT    0xd8000000
  75 #define L4_24XX_SIZE    SZ_1M           /* 1MB of 128MB used, want 1MB sect */
  76
  77 #define L4_WK_243X_PHYS         L4_WK_243X_BASE         /* 0x49000000 */
  78 #define L4_WK_243X_VIRT         0xd9000000
  79 #define L4_WK_243X_SIZE         SZ_1M
  80 #define OMAP243X_GPMC_PHYS      OMAP243X_GPMC_BASE      /* 0x49000000 */
  81 #define OMAP243X_GPMC_VIRT      0xFE000000
  82 #define OMAP243X_GPMC_SIZE      SZ_1M
  83 #define OMAP243X_SDRC_PHYS      OMAP243X_SDRC_BASE
  84 #define OMAP243X_SDRC_VIRT      0xFD000000
  85 #define OMAP243X_SDRC_SIZE      SZ_1M
  86 #define OMAP243X_SMS_PHYS       OMAP243X_SMS_BASE
  87 #define OMAP243X_SMS_VIRT       0xFC000000
  88 #define OMAP243X_SMS_SIZE       SZ_1M
  89
  90 #define IO_OFFSET               0x90000000
  91 #define __IO_ADDRESS(pa)        ((pa) + IO_OFFSET)      /* Works for L3 and L4 */
  92 #define __OMAP2_IO_ADDRESS(pa)  ((pa) + IO_OFFSET)      /* Works for L3 and L4 */
  93 #define io_v2p(va)              ((va) - IO_OFFSET)      /* Works for L3 and L4 */
  94
  95 /* DSP */
  96 #define DSP_MEM_24XX_PHYS       OMAP2420_DSP_MEM_BASE   /* 0x58000000 */
  97 #define DSP_MEM_24XX_VIRT       0xe0000000
  98 #define DSP_MEM_24XX_SIZE       0x28000
  99 #define DSP_IPI_24XX_PHYS       OMAP2420_DSP_IPI_BASE   /* 0x59000000 */
 100 #define DSP_IPI_24XX_VIRT       0xe1000000
 101 #define DSP_IPI_24XX_SIZE       SZ_4K
 102 #define DSP_MMU_24XX_PHYS       OMAP2420_DSP_MMU_BASE   /* 0x5a000000 */
 103 #define DSP_MMU_24XX_VIRT       0xe2000000
 104 #define DSP_MMU_24XX_SIZE       SZ_4K
 105
 106 #elif defined(CONFIG_ARCH_OMAP3)
 107
 108 /* We map both L3 and L4 on OMAP3 */
 109 #define L3_34XX_PHYS            L3_34XX_BASE    /* 0x68000000 */
 110 #define L3_34XX_VIRT            0xf8000000
 111 #define L3_34XX_SIZE            SZ_1M   /* 44kB of 128MB used, want 1MB sect */
 112
 113 #define L4_34XX_PHYS            L4_34XX_BASE    /* 0x48000000 */
 114 #define L4_34XX_VIRT            0xd8000000
 115 #define L4_34XX_SIZE            SZ_4M   /* 1MB of 128MB used, want 1MB sect */
 116
 117 /*
 118  * Need to look at the Size 4M for L4.
 119  * VPOM3430 was not working for Int controller
 120  */
 121
 122 #define L4_WK_34XX_PHYS         L4_WK_34XX_BASE /* 0x48300000 */
 123 #define L4_WK_34XX_VIRT         0xd8300000
 124 #define L4_WK_34XX_SIZE         SZ_1M
 125
 126 #define L4_PER_34XX_PHYS        L4_PER_34XX_BASE /* 0x49000000 */
 127 #define L4_PER_34XX_VIRT        0xd9000000
 128 #define L4_PER_34XX_SIZE        SZ_1M
 129
 130 #define L4_EMU_34XX_PHYS        L4_EMU_34XX_BASE /* 0x54000000 */
 131 #define L4_EMU_34XX_VIRT        0xe4000000
 132 #define L4_EMU_34XX_SIZE        SZ_64M
 133
 134 #define OMAP34XX_GPMC_PHYS      OMAP34XX_GPMC_BASE /* 0x6E000000 */
 135 #define OMAP34XX_GPMC_VIRT      0xFE000000
 136 #define OMAP34XX_GPMC_SIZE      SZ_1M
 137
 138 #define OMAP343X_SMS_PHYS       OMAP343X_SMS_BASE /* 0x6C000000 */
 139 #define OMAP343X_SMS_VIRT       0xFC000000
 140 #define OMAP343X_SMS_SIZE       SZ_1M
 141
 142 #define OMAP343X_SDRC_PHYS      OMAP343X_SDRC_BASE /* 0x6D000000 */
 143 #define OMAP343X_SDRC_VIRT      0xFD000000
 144 #define OMAP343X_SDRC_SIZE      SZ_1M
 145
 146
 147 #define IO_OFFSET               0x90000000
 148 #define __IO_ADDRESS(pa)        ((pa) + IO_OFFSET)/* Works for L3 and L4 */
 149 #define __OMAP2_IO_ADDRESS(pa)  ((pa) + IO_OFFSET)/* Works for L3 and L4 */
 150 #define io_v2p(va)              ((va) - IO_OFFSET)/* Works for L3 and L4 */
 151
 152 /* DSP */
 153 #define DSP_MEM_34XX_PHYS       OMAP34XX_DSP_MEM_BASE   /* 0x58000000 */
 154 #define DSP_MEM_34XX_VIRT       0xe0000000
 155 #define DSP_MEM_34XX_SIZE       0x28000
 156 #define DSP_IPI_34XX_PHYS       OMAP34XX_DSP_IPI_BASE   /* 0x59000000 */
 157 #define DSP_IPI_34XX_VIRT       0xe1000000
 158 #define DSP_IPI_34XX_SIZE       SZ_4K
 159 #define DSP_MMU_34XX_PHYS       OMAP34XX_DSP_MMU_BASE   /* 0x5a000000 */
 160 #define DSP_MMU_34XX_VIRT       0xe2000000
 161 #define DSP_MMU_34XX_SIZE       SZ_4K
 162
 163
 164 #elif defined(CONFIG_ARCH_OMAP4)
 165 /* We map both L3 and L4 on OMAP4 */
 166 #define L3_44XX_PHYS            L3_44XX_BASE
 167 #define L3_44XX_VIRT            0xd4000000
 168 #define L3_44XX_SIZE            SZ_1M
 169
 170 #define L4_44XX_PHYS            L4_44XX_BASE
 171 #define L4_44XX_VIRT            0xda000000
 172 #define L4_44XX_SIZE            SZ_4M
 173
 174
 175 #define L4_WK_44XX_PHYS         L4_WK_44XX_BASE
 176 #define L4_WK_44XX_VIRT         0xda300000
 177 #define L4_WK_44XX_SIZE         SZ_1M
 178
 179 #define L4_PER_44XX_PHYS        L4_PER_44XX_BASE
 180 #define L4_PER_44XX_VIRT        0xd8000000
 181 #define L4_PER_44XX_SIZE        SZ_4M
 182
 183 #define L4_EMU_44XX_PHYS        L4_EMU_44XX_BASE
 184 #define L4_EMU_44XX_VIRT        0xe4000000
 185 #define L4_EMU_44XX_SIZE        SZ_64M
 186
 187 #define OMAP44XX_GPMC_PHYS      OMAP44XX_GPMC_BASE
 188 #define OMAP44XX_GPMC_VIRT      0xe0000000
 189 #define OMAP44XX_GPMC_SIZE      SZ_1M
 190
 191
 192 #define IO_OFFSET               0x90000000
 193 #define __IO_ADDRESS(pa)        ((pa) + IO_OFFSET)/* Works for L3 and L4 */
 194 #define __OMAP2_IO_ADDRESS(pa)  ((pa) + IO_OFFSET)/* Works for L3 and L4 */
 195 #define io_v2p(va)              ((va) - IO_OFFSET)/* Works for L3 and L4 */
 196
 197 #endif
 198
 199 #define IO_ADDRESS(pa)          IOMEM(__IO_ADDRESS(pa))
 200 #define OMAP1_IO_ADDRESS(pa)    IOMEM(__OMAP1_IO_ADDRESS(pa))
 201 #define OMAP2_IO_ADDRESS(pa)    IOMEM(__OMAP2_IO_ADDRESS(pa))
 202
 203 #ifdef __ASSEMBLER__
 204 #define IOMEM(x)                (x)
 205 #else
 206 #define IOMEM(x)                ((void __force __iomem *)(x))
 207
 208 /*
 209  * Functions to access the OMAP IO region
 210  *
 211  * NOTE: - Use omap_read/write[bwl] for physical register addresses
 212  *       - Use __raw_read/write[bwl]() for virtual register addresses
 213  *       - Use IO_ADDRESS(phys_addr) to convert registers to virtual addresses
 214  *       - DO NOT use hardcoded virtual addresses to allow changing the
 215  *         IO address space again if needed
 216  */
 217 #define omap_readb(a)           __raw_readb(IO_ADDRESS(a))
 218 #define omap_readw(a)           __raw_readw(IO_ADDRESS(a))
 219 #define omap_readl(a)           __raw_readl(IO_ADDRESS(a))
 220
 221 #define omap_writeb(v,a)        __raw_writeb(v, IO_ADDRESS(a))
 222 #define omap_writew(v,a)        __raw_writew(v, IO_ADDRESS(a))
 223 #define omap_writel(v,a)        __raw_writel(v, IO_ADDRESS(a))
 224
 225 struct omap_sdrc_params;
 226
 227 extern void omap1_map_common_io(void);
 228 extern void omap1_init_common_hw(void);
 229
 230 extern void omap2_map_common_io(void);
 231 extern void omap2_init_common_hw(struct omap_sdrc_params *sdrc_cs0,
 232                                  struct omap_sdrc_params *sdrc_cs1);
 233
 234 #define __arch_ioremap(p,s,t)   omap_ioremap(p,s,t)
 235 #define __arch_iounmap(v)       omap_iounmap(v)
 236
 237 void __iomem *omap_ioremap(unsigned long phys, size_t size, unsigned int type);
 238 void omap_iounmap(volatile void __iomem *addr);
 239
 240 #endif
 241
 242 #endif