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ext3: Update MAINTAINERS for ext3 and JBD
[linux/fpc-iii.git] / drivers / media / video / cx23885 / cx23885-cards.c
blob3143d85ef31d03236345fd4ec7a7c9391942404a
1 /*
2 * Driver for the Conexant CX23885 PCIe bridge
3 *
4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 *
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22 #include <linux/init.h>
23 #include <linux/module.h>
24 #include <linux/pci.h>
25 #include <linux/delay.h>
26 #include <media/cx25840.h>
27
28 #include "cx23885.h"
29 #include "tuner-xc2028.h"
30 #include "netup-init.h"
31
32 /* ------------------------------------------------------------------ */
33 /* board config info */
34
35 struct cx23885_board cx23885_boards[] = {
36 [CX23885_BOARD_UNKNOWN] = {
37 .name = "UNKNOWN/GENERIC",
38 /* Ensure safe default for unknown boards */
39 .clk_freq = 0,
40 .input = {{
41 .type = CX23885_VMUX_COMPOSITE1,
42 .vmux = 0,
43 }, {
44 .type = CX23885_VMUX_COMPOSITE2,
45 .vmux = 1,
46 }, {
47 .type = CX23885_VMUX_COMPOSITE3,
48 .vmux = 2,
49 }, {
50 .type = CX23885_VMUX_COMPOSITE4,
51 .vmux = 3,
52 } },
53 },
54 [CX23885_BOARD_HAUPPAUGE_HVR1800lp] = {
55 .name = "Hauppauge WinTV-HVR1800lp",
56 .portc = CX23885_MPEG_DVB,
57 .input = {{
58 .type = CX23885_VMUX_TELEVISION,
59 .vmux = 0,
60 .gpio0 = 0xff00,
61 }, {
62 .type = CX23885_VMUX_DEBUG,
63 .vmux = 0,
64 .gpio0 = 0xff01,
65 }, {
66 .type = CX23885_VMUX_COMPOSITE1,
67 .vmux = 1,
68 .gpio0 = 0xff02,
69 }, {
70 .type = CX23885_VMUX_SVIDEO,
71 .vmux = 2,
72 .gpio0 = 0xff02,
73 } },
74 },
75 [CX23885_BOARD_HAUPPAUGE_HVR1800] = {
76 .name = "Hauppauge WinTV-HVR1800",
77 .porta = CX23885_ANALOG_VIDEO,
78 .portb = CX23885_MPEG_ENCODER,
79 .portc = CX23885_MPEG_DVB,
80 .tuner_type = TUNER_PHILIPS_TDA8290,
81 .tuner_addr = 0x42, /* 0x84 >> 1 */
82 .input = {{
83 .type = CX23885_VMUX_TELEVISION,
84 .vmux = CX25840_VIN7_CH3 |
85 CX25840_VIN5_CH2 |
86 CX25840_VIN2_CH1,
87 .gpio0 = 0,
88 }, {
89 .type = CX23885_VMUX_COMPOSITE1,
90 .vmux = CX25840_VIN7_CH3 |
91 CX25840_VIN4_CH2 |
92 CX25840_VIN6_CH1,
93 .gpio0 = 0,
94 }, {
95 .type = CX23885_VMUX_SVIDEO,
96 .vmux = CX25840_VIN7_CH3 |
97 CX25840_VIN4_CH2 |
98 CX25840_VIN8_CH1 |
99 CX25840_SVIDEO_ON,
100 .gpio0 = 0,
101 } },
102 },
103 [CX23885_BOARD_HAUPPAUGE_HVR1250] = {
104 .name = "Hauppauge WinTV-HVR1250",
105 .portc = CX23885_MPEG_DVB,
106 .input = {{
107 .type = CX23885_VMUX_TELEVISION,
108 .vmux = 0,
109 .gpio0 = 0xff00,
110 }, {
111 .type = CX23885_VMUX_DEBUG,
112 .vmux = 0,
113 .gpio0 = 0xff01,
114 }, {
115 .type = CX23885_VMUX_COMPOSITE1,
116 .vmux = 1,
117 .gpio0 = 0xff02,
118 }, {
119 .type = CX23885_VMUX_SVIDEO,
120 .vmux = 2,
121 .gpio0 = 0xff02,
122 } },
123 },
124 [CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP] = {
125 .name = "DViCO FusionHDTV5 Express",
126 .portb = CX23885_MPEG_DVB,
127 },
128 [CX23885_BOARD_HAUPPAUGE_HVR1500Q] = {
129 .name = "Hauppauge WinTV-HVR1500Q",
130 .portc = CX23885_MPEG_DVB,
131 },
132 [CX23885_BOARD_HAUPPAUGE_HVR1500] = {
133 .name = "Hauppauge WinTV-HVR1500",
134 .portc = CX23885_MPEG_DVB,
135 },
136 [CX23885_BOARD_HAUPPAUGE_HVR1200] = {
137 .name = "Hauppauge WinTV-HVR1200",
138 .portc = CX23885_MPEG_DVB,
139 },
140 [CX23885_BOARD_HAUPPAUGE_HVR1700] = {
141 .name = "Hauppauge WinTV-HVR1700",
142 .portc = CX23885_MPEG_DVB,
143 },
144 [CX23885_BOARD_HAUPPAUGE_HVR1400] = {
145 .name = "Hauppauge WinTV-HVR1400",
146 .portc = CX23885_MPEG_DVB,
147 },
148 [CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP] = {
149 .name = "DViCO FusionHDTV7 Dual Express",
150 .portb = CX23885_MPEG_DVB,
151 .portc = CX23885_MPEG_DVB,
152 },
153 [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP] = {
154 .name = "DViCO FusionHDTV DVB-T Dual Express",
155 .portb = CX23885_MPEG_DVB,
156 .portc = CX23885_MPEG_DVB,
157 },
158 [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H] = {
159 .name = "Leadtek Winfast PxDVR3200 H",
160 .portc = CX23885_MPEG_DVB,
161 },
162 [CX23885_BOARD_COMPRO_VIDEOMATE_E650F] = {
163 .name = "Compro VideoMate E650F",
164 .portc = CX23885_MPEG_DVB,
165 },
166 [CX23885_BOARD_TBS_6920] = {
167 .name = "TurboSight TBS 6920",
168 .portb = CX23885_MPEG_DVB,
169 },
170 [CX23885_BOARD_TEVII_S470] = {
171 .name = "TeVii S470",
172 .portb = CX23885_MPEG_DVB,
173 },
174 [CX23885_BOARD_DVBWORLD_2005] = {
175 .name = "DVBWorld DVB-S2 2005",
176 .portb = CX23885_MPEG_DVB,
177 },
178 [CX23885_BOARD_NETUP_DUAL_DVBS2_CI] = {
179 .cimax = 1,
180 .name = "NetUP Dual DVB-S2 CI",
181 .portb = CX23885_MPEG_DVB,
182 .portc = CX23885_MPEG_DVB,
183 },
184 [CX23885_BOARD_HAUPPAUGE_HVR1270] = {
185 .name = "Hauppauge WinTV-HVR1270",
186 .portc = CX23885_MPEG_DVB,
187 },
188 [CX23885_BOARD_HAUPPAUGE_HVR1275] = {
189 .name = "Hauppauge WinTV-HVR1275",
190 .portc = CX23885_MPEG_DVB,
191 },
192 [CX23885_BOARD_HAUPPAUGE_HVR1255] = {
193 .name = "Hauppauge WinTV-HVR1255",
194 .portc = CX23885_MPEG_DVB,
195 },
196 [CX23885_BOARD_HAUPPAUGE_HVR1210] = {
197 .name = "Hauppauge WinTV-HVR1210",
198 .portc = CX23885_MPEG_DVB,
199 },
200 [CX23885_BOARD_MYGICA_X8506] = {
201 .name = "Mygica X8506 DMB-TH",
202 .portb = CX23885_MPEG_DVB,
203 },
204 [CX23885_BOARD_MAGICPRO_PROHDTVE2] = {
205 .name = "Magic-Pro ProHDTV Extreme 2",
206 .portb = CX23885_MPEG_DVB,
207 },
208 [CX23885_BOARD_HAUPPAUGE_HVR1850] = {
209 .name = "Hauppauge WinTV-HVR1850",
210 .portb = CX23885_MPEG_ENCODER,
211 .portc = CX23885_MPEG_DVB,
212 },
213 };
214 const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards);
215
216 /* ------------------------------------------------------------------ */
217 /* PCI subsystem IDs */
218
219 struct cx23885_subid cx23885_subids[] = {
220 {
221 .subvendor = 0x0070,
222 .subdevice = 0x3400,
223 .card = CX23885_BOARD_UNKNOWN,
224 }, {
225 .subvendor = 0x0070,
226 .subdevice = 0x7600,
227 .card = CX23885_BOARD_HAUPPAUGE_HVR1800lp,
228 }, {
229 .subvendor = 0x0070,
230 .subdevice = 0x7800,
231 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
232 }, {
233 .subvendor = 0x0070,
234 .subdevice = 0x7801,
235 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
236 }, {
237 .subvendor = 0x0070,
238 .subdevice = 0x7809,
239 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
240 }, {
241 .subvendor = 0x0070,
242 .subdevice = 0x7911,
243 .card = CX23885_BOARD_HAUPPAUGE_HVR1250,
244 }, {
245 .subvendor = 0x18ac,
246 .subdevice = 0xd500,
247 .card = CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP,
248 }, {
249 .subvendor = 0x0070,
250 .subdevice = 0x7790,
251 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
252 }, {
253 .subvendor = 0x0070,
254 .subdevice = 0x7797,
255 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
256 }, {
257 .subvendor = 0x0070,
258 .subdevice = 0x7710,
259 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
260 }, {
261 .subvendor = 0x0070,
262 .subdevice = 0x7717,
263 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
264 }, {
265 .subvendor = 0x0070,
266 .subdevice = 0x71d1,
267 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
268 }, {
269 .subvendor = 0x0070,
270 .subdevice = 0x71d3,
271 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
272 }, {
273 .subvendor = 0x0070,
274 .subdevice = 0x8101,
275 .card = CX23885_BOARD_HAUPPAUGE_HVR1700,
276 }, {
277 .subvendor = 0x0070,
278 .subdevice = 0x8010,
279 .card = CX23885_BOARD_HAUPPAUGE_HVR1400,
280 }, {
281 .subvendor = 0x18ac,
282 .subdevice = 0xd618,
283 .card = CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP,
284 }, {
285 .subvendor = 0x18ac,
286 .subdevice = 0xdb78,
287 .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP,
288 }, {
289 .subvendor = 0x107d,
290 .subdevice = 0x6681,
291 .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H,
292 }, {
293 .subvendor = 0x185b,
294 .subdevice = 0xe800,
295 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E650F,
296 }, {
297 .subvendor = 0x6920,
298 .subdevice = 0x8888,
299 .card = CX23885_BOARD_TBS_6920,
300 }, {
301 .subvendor = 0xd470,
302 .subdevice = 0x9022,
303 .card = CX23885_BOARD_TEVII_S470,
304 }, {
305 .subvendor = 0x0001,
306 .subdevice = 0x2005,
307 .card = CX23885_BOARD_DVBWORLD_2005,
308 }, {
309 .subvendor = 0x1b55,
310 .subdevice = 0x2a2c,
311 .card = CX23885_BOARD_NETUP_DUAL_DVBS2_CI,
312 }, {
313 .subvendor = 0x0070,
314 .subdevice = 0x2211,
315 .card = CX23885_BOARD_HAUPPAUGE_HVR1270,
316 }, {
317 .subvendor = 0x0070,
318 .subdevice = 0x2215,
319 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
320 }, {
321 .subvendor = 0x0070,
322 .subdevice = 0x2251,
323 .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
324 }, {
325 .subvendor = 0x0070,
326 .subdevice = 0x2291,
327 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
328 }, {
329 .subvendor = 0x0070,
330 .subdevice = 0x2295,
331 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
332 }, {
333 .subvendor = 0x14f1,
334 .subdevice = 0x8651,
335 .card = CX23885_BOARD_MYGICA_X8506,
336 }, {
337 .subvendor = 0x14f1,
338 .subdevice = 0x8657,
339 .card = CX23885_BOARD_MAGICPRO_PROHDTVE2,
340 }, {
341 .subvendor = 0x0070,
342 .subdevice = 0x8541,
343 .card = CX23885_BOARD_HAUPPAUGE_HVR1850,
344 },
345 };
346 const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids);
347
348 void cx23885_card_list(struct cx23885_dev *dev)
349 {
350 int i;
351
352 if (0 == dev->pci->subsystem_vendor &&
353 0 == dev->pci->subsystem_device) {
354 printk(KERN_INFO
355 "%s: Board has no valid PCIe Subsystem ID and can't\n"
356 "%s: be autodetected. Pass card=<n> insmod option\n"
357 "%s: to workaround that. Redirect complaints to the\n"
358 "%s: vendor of the TV card. Best regards,\n"
359 "%s: -- tux\n",
360 dev->name, dev->name, dev->name, dev->name, dev->name);
361 } else {
362 printk(KERN_INFO
363 "%s: Your board isn't known (yet) to the driver.\n"
364 "%s: Try to pick one of the existing card configs via\n"
365 "%s: card=<n> insmod option. Updating to the latest\n"
366 "%s: version might help as well.\n",
367 dev->name, dev->name, dev->name, dev->name);
368 }
369 printk(KERN_INFO "%s: Here is a list of valid choices for the card=<n> insmod option:\n",
370 dev->name);
371 for (i = 0; i < cx23885_bcount; i++)
372 printk(KERN_INFO "%s: card=%d -> %s\n",
373 dev->name, i, cx23885_boards[i].name);
374 }
375
376 static void hauppauge_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
377 {
378 struct tveeprom tv;
379
380 tveeprom_hauppauge_analog(&dev->i2c_bus[0].i2c_client, &tv,
381 eeprom_data);
382
383 /* Make sure we support the board model */
384 switch (tv.model) {
385 case 22001:
386 /* WinTV-HVR1270 (PCIe, Retail, half height)
387 * ATSC/QAM and basic analog, IR Blast */
388 case 22009:
389 /* WinTV-HVR1210 (PCIe, Retail, half height)
390 * DVB-T and basic analog, IR Blast */
391 case 22011:
392 /* WinTV-HVR1270 (PCIe, Retail, half height)
393 * ATSC/QAM and basic analog, IR Recv */
394 case 22019:
395 /* WinTV-HVR1210 (PCIe, Retail, half height)
396 * DVB-T and basic analog, IR Recv */
397 case 22021:
398 /* WinTV-HVR1275 (PCIe, Retail, half height)
399 * ATSC/QAM and basic analog, IR Recv */
400 case 22029:
401 /* WinTV-HVR1210 (PCIe, Retail, half height)
402 * DVB-T and basic analog, IR Recv */
403 case 22101:
404 /* WinTV-HVR1270 (PCIe, Retail, full height)
405 * ATSC/QAM and basic analog, IR Blast */
406 case 22109:
407 /* WinTV-HVR1210 (PCIe, Retail, full height)
408 * DVB-T and basic analog, IR Blast */
409 case 22111:
410 /* WinTV-HVR1270 (PCIe, Retail, full height)
411 * ATSC/QAM and basic analog, IR Recv */
412 case 22119:
413 /* WinTV-HVR1210 (PCIe, Retail, full height)
414 * DVB-T and basic analog, IR Recv */
415 case 22121:
416 /* WinTV-HVR1275 (PCIe, Retail, full height)
417 * ATSC/QAM and basic analog, IR Recv */
418 case 22129:
419 /* WinTV-HVR1210 (PCIe, Retail, full height)
420 * DVB-T and basic analog, IR Recv */
421 case 71009:
422 /* WinTV-HVR1200 (PCIe, Retail, full height)
423 * DVB-T and basic analog */
424 case 71359:
425 /* WinTV-HVR1200 (PCIe, OEM, half height)
426 * DVB-T and basic analog */
427 case 71439:
428 /* WinTV-HVR1200 (PCIe, OEM, half height)
429 * DVB-T and basic analog */
430 case 71449:
431 /* WinTV-HVR1200 (PCIe, OEM, full height)
432 * DVB-T and basic analog */
433 case 71939:
434 /* WinTV-HVR1200 (PCIe, OEM, half height)
435 * DVB-T and basic analog */
436 case 71949:
437 /* WinTV-HVR1200 (PCIe, OEM, full height)
438 * DVB-T and basic analog */
439 case 71959:
440 /* WinTV-HVR1200 (PCIe, OEM, full height)
441 * DVB-T and basic analog */
442 case 71979:
443 /* WinTV-HVR1200 (PCIe, OEM, half height)
444 * DVB-T and basic analog */
445 case 71999:
446 /* WinTV-HVR1200 (PCIe, OEM, full height)
447 * DVB-T and basic analog */
448 case 76601:
449 /* WinTV-HVR1800lp (PCIe, Retail, No IR, Dual
450 channel ATSC and MPEG2 HW Encoder */
451 case 77001:
452 /* WinTV-HVR1500 (Express Card, OEM, No IR, ATSC
453 and Basic analog */
454 case 77011:
455 /* WinTV-HVR1500 (Express Card, Retail, No IR, ATSC
456 and Basic analog */
457 case 77041:
458 /* WinTV-HVR1500Q (Express Card, OEM, No IR, ATSC/QAM
459 and Basic analog */
460 case 77051:
461 /* WinTV-HVR1500Q (Express Card, Retail, No IR, ATSC/QAM
462 and Basic analog */
463 case 78011:
464 /* WinTV-HVR1800 (PCIe, Retail, 3.5mm in, IR, No FM,
465 Dual channel ATSC and MPEG2 HW Encoder */
466 case 78501:
467 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
468 Dual channel ATSC and MPEG2 HW Encoder */
469 case 78521:
470 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
471 Dual channel ATSC and MPEG2 HW Encoder */
472 case 78531:
473 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, No FM,
474 Dual channel ATSC and MPEG2 HW Encoder */
475 case 78631:
476 /* WinTV-HVR1800 (PCIe, OEM, No IR, No FM,
477 Dual channel ATSC and MPEG2 HW Encoder */
478 case 79001:
479 /* WinTV-HVR1250 (PCIe, Retail, IR, full height,
480 ATSC and Basic analog */
481 case 79101:
482 /* WinTV-HVR1250 (PCIe, Retail, IR, half height,
483 ATSC and Basic analog */
484 case 79561:
485 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
486 ATSC and Basic analog */
487 case 79571:
488 /* WinTV-HVR1250 (PCIe, OEM, No IR, full height,
489 ATSC and Basic analog */
490 case 79671:
491 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
492 ATSC and Basic analog */
493 case 80019:
494 /* WinTV-HVR1400 (Express Card, Retail, IR,
495 * DVB-T and Basic analog */
496 case 81509:
497 /* WinTV-HVR1700 (PCIe, OEM, No IR, half height)
498 * DVB-T and MPEG2 HW Encoder */
499 case 81519:
500 /* WinTV-HVR1700 (PCIe, OEM, No IR, full height)
501 * DVB-T and MPEG2 HW Encoder */
502 break;
503 case 85021:
504 /* WinTV-HVR1850 (PCIe, OEM, RCA in, IR, FM,
505 Dual channel ATSC and MPEG2 HW Encoder */
506 break;
507 default:
508 printk(KERN_WARNING "%s: warning: "
509 "unknown hauppauge model #%d\n",
510 dev->name, tv.model);
511 break;
512 }
513
514 printk(KERN_INFO "%s: hauppauge eeprom: model=%d\n",
515 dev->name, tv.model);
516 }
517
518 int cx23885_tuner_callback(void *priv, int component, int command, int arg)
519 {
520 struct cx23885_tsport *port = priv;
521 struct cx23885_dev *dev = port->dev;
522 u32 bitmask = 0;
523
524 if (command == XC2028_RESET_CLK)
525 return 0;
526
527 if (command != 0) {
528 printk(KERN_ERR "%s(): Unknown command 0x%x.\n",
529 __func__, command);
530 return -EINVAL;
531 }
532
533 switch (dev->board) {
534 case CX23885_BOARD_HAUPPAUGE_HVR1400:
535 case CX23885_BOARD_HAUPPAUGE_HVR1500:
536 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
537 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
538 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
539 /* Tuner Reset Command */
540 bitmask = 0x04;
541 break;
542 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
543 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
544 /* Two identical tuners on two different i2c buses,
545 * we need to reset the correct gpio. */
546 if (port->nr == 1)
547 bitmask = 0x01;
548 else if (port->nr == 2)
549 bitmask = 0x04;
550 break;
551 }
552
553 if (bitmask) {
554 /* Drive the tuner into reset and back out */
555 cx_clear(GP0_IO, bitmask);
556 mdelay(200);
557 cx_set(GP0_IO, bitmask);
558 }
559
560 return 0;
561 }
562
563 void cx23885_gpio_setup(struct cx23885_dev *dev)
564 {
565 switch (dev->board) {
566 case CX23885_BOARD_HAUPPAUGE_HVR1250:
567 /* GPIO-0 cx24227 demodulator reset */
568 cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
569 break;
570 case CX23885_BOARD_HAUPPAUGE_HVR1500:
571 /* GPIO-0 cx24227 demodulator */
572 /* GPIO-2 xc3028 tuner */
573
574 /* Put the parts into reset */
575 cx_set(GP0_IO, 0x00050000);
576 cx_clear(GP0_IO, 0x00000005);
577 msleep(5);
578
579 /* Bring the parts out of reset */
580 cx_set(GP0_IO, 0x00050005);
581 break;
582 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
583 /* GPIO-0 cx24227 demodulator reset */
584 /* GPIO-2 xc5000 tuner reset */
585 cx_set(GP0_IO, 0x00050005); /* Bring the part out of reset */
586 break;
587 case CX23885_BOARD_HAUPPAUGE_HVR1800:
588 /* GPIO-0 656_CLK */
589 /* GPIO-1 656_D0 */
590 /* GPIO-2 8295A Reset */
591 /* GPIO-3-10 cx23417 data0-7 */
592 /* GPIO-11-14 cx23417 addr0-3 */
593 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
594 /* GPIO-19 IR_RX */
595
596 /* CX23417 GPIO's */
597 /* EIO15 Zilog Reset */
598 /* EIO14 S5H1409/CX24227 Reset */
599 mc417_gpio_enable(dev, GPIO_15 | GPIO_14, 1);
600
601 /* Put the demod into reset and protect the eeprom */
602 mc417_gpio_clear(dev, GPIO_15 | GPIO_14);
603 mdelay(100);
604
605 /* Bring the demod and blaster out of reset */
606 mc417_gpio_set(dev, GPIO_15 | GPIO_14);
607 mdelay(100);
608
609 /* Force the TDA8295A into reset and back */
610 cx23885_gpio_enable(dev, GPIO_2, 1);
611 cx23885_gpio_set(dev, GPIO_2);
612 mdelay(20);
613 cx23885_gpio_clear(dev, GPIO_2);
614 mdelay(20);
615 cx23885_gpio_set(dev, GPIO_2);
616 mdelay(20);
617 break;
618 case CX23885_BOARD_HAUPPAUGE_HVR1200:
619 /* GPIO-0 tda10048 demodulator reset */
620 /* GPIO-2 tda18271 tuner reset */
621
622 /* Put the parts into reset and back */
623 cx_set(GP0_IO, 0x00050000);
624 mdelay(20);
625 cx_clear(GP0_IO, 0x00000005);
626 mdelay(20);
627 cx_set(GP0_IO, 0x00050005);
628 break;
629 case CX23885_BOARD_HAUPPAUGE_HVR1700:
630 /* GPIO-0 TDA10048 demodulator reset */
631 /* GPIO-2 TDA8295A Reset */
632 /* GPIO-3-10 cx23417 data0-7 */
633 /* GPIO-11-14 cx23417 addr0-3 */
634 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
635
636 /* The following GPIO's are on the interna AVCore (cx25840) */
637 /* GPIO-19 IR_RX */
638 /* GPIO-20 IR_TX 416/DVBT Select */
639 /* GPIO-21 IIS DAT */
640 /* GPIO-22 IIS WCLK */
641 /* GPIO-23 IIS BCLK */
642
643 /* Put the parts into reset and back */
644 cx_set(GP0_IO, 0x00050000);
645 mdelay(20);
646 cx_clear(GP0_IO, 0x00000005);
647 mdelay(20);
648 cx_set(GP0_IO, 0x00050005);
649 break;
650 case CX23885_BOARD_HAUPPAUGE_HVR1400:
651 /* GPIO-0 Dibcom7000p demodulator reset */
652 /* GPIO-2 xc3028L tuner reset */
653 /* GPIO-13 LED */
654
655 /* Put the parts into reset and back */
656 cx_set(GP0_IO, 0x00050000);
657 mdelay(20);
658 cx_clear(GP0_IO, 0x00000005);
659 mdelay(20);
660 cx_set(GP0_IO, 0x00050005);
661 break;
662 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
663 /* GPIO-0 xc5000 tuner reset i2c bus 0 */
664 /* GPIO-1 s5h1409 demod reset i2c bus 0 */
665 /* GPIO-2 xc5000 tuner reset i2c bus 1 */
666 /* GPIO-3 s5h1409 demod reset i2c bus 0 */
667
668 /* Put the parts into reset and back */
669 cx_set(GP0_IO, 0x000f0000);
670 mdelay(20);
671 cx_clear(GP0_IO, 0x0000000f);
672 mdelay(20);
673 cx_set(GP0_IO, 0x000f000f);
674 break;
675 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
676 /* GPIO-0 portb xc3028 reset */
677 /* GPIO-1 portb zl10353 reset */
678 /* GPIO-2 portc xc3028 reset */
679 /* GPIO-3 portc zl10353 reset */
680
681 /* Put the parts into reset and back */
682 cx_set(GP0_IO, 0x000f0000);
683 mdelay(20);
684 cx_clear(GP0_IO, 0x0000000f);
685 mdelay(20);
686 cx_set(GP0_IO, 0x000f000f);
687 break;
688 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
689 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
690 /* GPIO-2 xc3028 tuner reset */
691
692 /* The following GPIO's are on the internal AVCore (cx25840) */
693 /* GPIO-? zl10353 demod reset */
694
695 /* Put the parts into reset and back */
696 cx_set(GP0_IO, 0x00040000);
697 mdelay(20);
698 cx_clear(GP0_IO, 0x00000004);
699 mdelay(20);
700 cx_set(GP0_IO, 0x00040004);
701 break;
702 case CX23885_BOARD_TBS_6920:
703 case CX23885_BOARD_TEVII_S470:
704 cx_write(MC417_CTL, 0x00000036);
705 cx_write(MC417_OEN, 0x00001000);
706 cx_write(MC417_RWD, 0x00001800);
707 break;
708 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
709 /* GPIO-0 INTA from CiMax1
710 GPIO-1 INTB from CiMax2
711 GPIO-2 reset chips
712 GPIO-3 to GPIO-10 data/addr for CA
713 GPIO-11 ~CS0 to CiMax1
714 GPIO-12 ~CS1 to CiMax2
715 GPIO-13 ADL0 load LSB addr
716 GPIO-14 ADL1 load MSB addr
717 GPIO-15 ~RDY from CiMax
718 GPIO-17 ~RD to CiMax
719 GPIO-18 ~WR to CiMax
720 */
721 cx_set(GP0_IO, 0x00040000); /* GPIO as out */
722 /* GPIO1 and GPIO2 as INTA and INTB from CiMaxes, reset low */
723 cx_clear(GP0_IO, 0x00030004);
724 mdelay(100);/* reset delay */
725 cx_set(GP0_IO, 0x00040004); /* GPIO as out, reset high */
726 cx_write(MC417_CTL, 0x00000037);/* enable GPIO3-18 pins */
727 /* GPIO-15 IN as ~ACK, rest as OUT */
728 cx_write(MC417_OEN, 0x00001000);
729 /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
730 cx_write(MC417_RWD, 0x0000c300);
731 /* enable irq */
732 cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
733 break;
734 case CX23885_BOARD_HAUPPAUGE_HVR1270:
735 case CX23885_BOARD_HAUPPAUGE_HVR1275:
736 case CX23885_BOARD_HAUPPAUGE_HVR1255:
737 case CX23885_BOARD_HAUPPAUGE_HVR1210:
738 /* GPIO-5 RF Control: 0 = RF1 Terrestrial, 1 = RF2 Cable */
739 /* GPIO-6 I2C Gate which can isolate the demod from the bus */
740 /* GPIO-9 Demod reset */
741
742 /* Put the parts into reset and back */
743 cx23885_gpio_enable(dev, GPIO_9 | GPIO_6 | GPIO_5, 1);
744 cx23885_gpio_set(dev, GPIO_9 | GPIO_6 | GPIO_5);
745 cx23885_gpio_clear(dev, GPIO_9);
746 mdelay(20);
747 cx23885_gpio_set(dev, GPIO_9);
748 break;
749 case CX23885_BOARD_MYGICA_X8506:
750 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
751 /* GPIO-1 reset XC5000 */
752 /* GPIO-2 reset LGS8GL5 / LGS8G75 */
753 cx_set(GP0_IO, 0x00060000);
754 cx_clear(GP0_IO, 0x00000006);
755 mdelay(100);
756 cx_set(GP0_IO, 0x00060006);
757 mdelay(100);
758 break;
759 case CX23885_BOARD_HAUPPAUGE_HVR1850:
760 /* GPIO-0 656_CLK */
761 /* GPIO-1 656_D0 */
762 /* GPIO-2 Wake# */
763 /* GPIO-3-10 cx23417 data0-7 */
764 /* GPIO-11-14 cx23417 addr0-3 */
765 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
766 /* GPIO-19 IR_RX */
767 /* GPIO-20 C_IR_TX */
768 /* GPIO-21 I2S DAT */
769 /* GPIO-22 I2S WCLK */
770 /* GPIO-23 I2S BCLK */
771 /* ALT GPIO: EXP GPIO LATCH */
772
773 /* CX23417 GPIO's */
774 /* GPIO-14 S5H1411/CX24228 Reset */
775 /* GPIO-13 EEPROM write protect */
776 mc417_gpio_enable(dev, GPIO_14 | GPIO_13, 1);
777
778 /* Put the demod into reset and protect the eeprom */
779 mc417_gpio_clear(dev, GPIO_14 | GPIO_13);
780 mdelay(100);
781
782 /* Bring the demod out of reset */
783 mc417_gpio_set(dev, GPIO_14);
784 mdelay(100);
785
786 /* CX24228 GPIO */
787 /* Connected to IF / Mux */
788 break;
789 }
790 }
791
792 int cx23885_ir_init(struct cx23885_dev *dev)
793 {
794 switch (dev->board) {
795 case CX23885_BOARD_HAUPPAUGE_HVR1250:
796 case CX23885_BOARD_HAUPPAUGE_HVR1500:
797 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
798 case CX23885_BOARD_HAUPPAUGE_HVR1800:
799 case CX23885_BOARD_HAUPPAUGE_HVR1200:
800 case CX23885_BOARD_HAUPPAUGE_HVR1400:
801 case CX23885_BOARD_HAUPPAUGE_HVR1270:
802 case CX23885_BOARD_HAUPPAUGE_HVR1275:
803 case CX23885_BOARD_HAUPPAUGE_HVR1255:
804 case CX23885_BOARD_HAUPPAUGE_HVR1210:
805 case CX23885_BOARD_HAUPPAUGE_HVR1850:
806 /* FIXME: Implement me */
807 break;
808 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
809 request_module("ir-kbd-i2c");
810 break;
811 }
812
813 return 0;
814 }
815
816 void cx23885_card_setup(struct cx23885_dev *dev)
817 {
818 struct cx23885_tsport *ts1 = &dev->ts1;
819 struct cx23885_tsport *ts2 = &dev->ts2;
820
821 static u8 eeprom[256];
822
823 if (dev->i2c_bus[0].i2c_rc == 0) {
824 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
825 tveeprom_read(&dev->i2c_bus[0].i2c_client,
826 eeprom, sizeof(eeprom));
827 }
828
829 switch (dev->board) {
830 case CX23885_BOARD_HAUPPAUGE_HVR1250:
831 case CX23885_BOARD_HAUPPAUGE_HVR1500:
832 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
833 case CX23885_BOARD_HAUPPAUGE_HVR1400:
834 if (dev->i2c_bus[0].i2c_rc == 0)
835 hauppauge_eeprom(dev, eeprom+0x80);
836 break;
837 case CX23885_BOARD_HAUPPAUGE_HVR1800:
838 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
839 case CX23885_BOARD_HAUPPAUGE_HVR1200:
840 case CX23885_BOARD_HAUPPAUGE_HVR1700:
841 case CX23885_BOARD_HAUPPAUGE_HVR1270:
842 case CX23885_BOARD_HAUPPAUGE_HVR1275:
843 case CX23885_BOARD_HAUPPAUGE_HVR1255:
844 case CX23885_BOARD_HAUPPAUGE_HVR1210:
845 case CX23885_BOARD_HAUPPAUGE_HVR1850:
846 if (dev->i2c_bus[0].i2c_rc == 0)
847 hauppauge_eeprom(dev, eeprom+0xc0);
848 break;
849 }
850
851 switch (dev->board) {
852 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
853 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
854 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
855 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
856 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
857 /* break omitted intentionally */
858 case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
859 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
860 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
861 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
862 break;
863 case CX23885_BOARD_HAUPPAUGE_HVR1800:
864 /* Defaults for VID B - Analog encoder */
865 /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
866 ts1->gen_ctrl_val = 0x10e;
867 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
868 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
869
870 /* APB_TSVALERR_POL (active low)*/
871 ts1->vld_misc_val = 0x2000;
872 ts1->hw_sop_ctrl_val = (0x47 << 16 | 188 << 4 | 0xc);
873
874 /* Defaults for VID C */
875 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
876 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
877 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
878 break;
879 case CX23885_BOARD_TEVII_S470:
880 case CX23885_BOARD_TBS_6920:
881 case CX23885_BOARD_DVBWORLD_2005:
882 ts1->gen_ctrl_val = 0x5; /* Parallel */
883 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
884 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
885 break;
886 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
887 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
888 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
889 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
890 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
891 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
892 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
893 break;
894 case CX23885_BOARD_MYGICA_X8506:
895 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
896 ts1->gen_ctrl_val = 0x5; /* Parallel */
897 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
898 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
899 break;
900 case CX23885_BOARD_HAUPPAUGE_HVR1250:
901 case CX23885_BOARD_HAUPPAUGE_HVR1500:
902 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
903 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
904 case CX23885_BOARD_HAUPPAUGE_HVR1200:
905 case CX23885_BOARD_HAUPPAUGE_HVR1700:
906 case CX23885_BOARD_HAUPPAUGE_HVR1400:
907 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
908 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
909 case CX23885_BOARD_HAUPPAUGE_HVR1270:
910 case CX23885_BOARD_HAUPPAUGE_HVR1275:
911 case CX23885_BOARD_HAUPPAUGE_HVR1255:
912 case CX23885_BOARD_HAUPPAUGE_HVR1210:
913 case CX23885_BOARD_HAUPPAUGE_HVR1850:
914 default:
915 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
916 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
917 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
918 }
919
920 /* Certain boards support analog, or require the avcore to be
921 * loaded, ensure this happens.
922 */
923 switch (dev->board) {
924 case CX23885_BOARD_HAUPPAUGE_HVR1800:
925 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
926 case CX23885_BOARD_HAUPPAUGE_HVR1700:
927 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
928 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
929 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
930 dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev,
931 &dev->i2c_bus[2].i2c_adap,
932 "cx25840", "cx25840", 0x88 >> 1);
933 v4l2_subdev_call(dev->sd_cx25840, core, load_fw);
934 break;
935 }
936
937 /* AUX-PLL 27MHz CLK */
938 switch (dev->board) {
939 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
940 netup_initialize(dev);
941 break;
942 }
943 }
944
945 /* ------------------------------------------------------------------ */
Linux with added FPC-III support