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ext3: Update MAINTAINERS for ext3 and JBD
[linux/fpc-iii.git] / drivers / media / video / cx23885 / cx23885.h
blob86f26947bb78ca5bce6fa8cc63c6b9b429c2e01f
1 /*
2 * Driver for the Conexant CX23885 PCIe bridge
3 *
4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 *
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22 #include <linux/pci.h>
23 #include <linux/i2c.h>
24 #include <linux/i2c-algo-bit.h>
25 #include <linux/kdev_t.h>
26
27 #include <media/v4l2-device.h>
28 #include <media/tuner.h>
29 #include <media/tveeprom.h>
30 #include <media/videobuf-dma-sg.h>
31 #include <media/videobuf-dvb.h>
32
33 #include "btcx-risc.h"
34 #include "cx23885-reg.h"
35 #include "media/cx2341x.h"
36
37 #include <linux/version.h>
38 #include <linux/mutex.h>
39
40 #define CX23885_VERSION_CODE KERNEL_VERSION(0, 0, 2)
41
42 #define UNSET (-1U)
43
44 #define CX23885_MAXBOARDS 8
45
46 /* Max number of inputs by card */
47 #define MAX_CX23885_INPUT 8
48 #define INPUT(nr) (&cx23885_boards[dev->board].input[nr])
49 #define RESOURCE_OVERLAY 1
50 #define RESOURCE_VIDEO 2
51 #define RESOURCE_VBI 4
52
53 #define BUFFER_TIMEOUT (HZ) /* 0.5 seconds */
54
55 #define CX23885_BOARD_NOAUTO UNSET
56 #define CX23885_BOARD_UNKNOWN 0
57 #define CX23885_BOARD_HAUPPAUGE_HVR1800lp 1
58 #define CX23885_BOARD_HAUPPAUGE_HVR1800 2
59 #define CX23885_BOARD_HAUPPAUGE_HVR1250 3
60 #define CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP 4
61 #define CX23885_BOARD_HAUPPAUGE_HVR1500Q 5
62 #define CX23885_BOARD_HAUPPAUGE_HVR1500 6
63 #define CX23885_BOARD_HAUPPAUGE_HVR1200 7
64 #define CX23885_BOARD_HAUPPAUGE_HVR1700 8
65 #define CX23885_BOARD_HAUPPAUGE_HVR1400 9
66 #define CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP 10
67 #define CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP 11
68 #define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H 12
69 #define CX23885_BOARD_COMPRO_VIDEOMATE_E650F 13
70 #define CX23885_BOARD_TBS_6920 14
71 #define CX23885_BOARD_TEVII_S470 15
72 #define CX23885_BOARD_DVBWORLD_2005 16
73 #define CX23885_BOARD_NETUP_DUAL_DVBS2_CI 17
74 #define CX23885_BOARD_HAUPPAUGE_HVR1270 18
75 #define CX23885_BOARD_HAUPPAUGE_HVR1275 19
76 #define CX23885_BOARD_HAUPPAUGE_HVR1255 20
77 #define CX23885_BOARD_HAUPPAUGE_HVR1210 21
78 #define CX23885_BOARD_MYGICA_X8506 22
79 #define CX23885_BOARD_MAGICPRO_PROHDTVE2 23
80 #define CX23885_BOARD_HAUPPAUGE_HVR1850 24
81
82 #define GPIO_0 0x00000001
83 #define GPIO_1 0x00000002
84 #define GPIO_2 0x00000004
85 #define GPIO_3 0x00000008
86 #define GPIO_4 0x00000010
87 #define GPIO_5 0x00000020
88 #define GPIO_6 0x00000040
89 #define GPIO_7 0x00000080
90 #define GPIO_8 0x00000100
91 #define GPIO_9 0x00000200
92 #define GPIO_10 0x00000400
93 #define GPIO_11 0x00000800
94 #define GPIO_12 0x00001000
95 #define GPIO_13 0x00002000
96 #define GPIO_14 0x00004000
97 #define GPIO_15 0x00008000
98
99 /* Currently unsupported by the driver: PAL/H, NTSC/Kr, SECAM B/G/H/LC */
100 #define CX23885_NORMS (\
101 V4L2_STD_NTSC_M | V4L2_STD_NTSC_M_JP | V4L2_STD_NTSC_443 | \
102 V4L2_STD_PAL_BG | V4L2_STD_PAL_DK | V4L2_STD_PAL_I | \
103 V4L2_STD_PAL_M | V4L2_STD_PAL_N | V4L2_STD_PAL_Nc | \
104 V4L2_STD_PAL_60 | V4L2_STD_SECAM_L | V4L2_STD_SECAM_DK)
105
106 struct cx23885_fmt {
107 char *name;
108 u32 fourcc; /* v4l2 format id */
109 int depth;
110 int flags;
111 u32 cxformat;
112 };
113
114 struct cx23885_ctrl {
115 struct v4l2_queryctrl v;
116 u32 off;
117 u32 reg;
118 u32 mask;
119 u32 shift;
120 };
121
122 struct cx23885_tvnorm {
123 char *name;
124 v4l2_std_id id;
125 u32 cxiformat;
126 u32 cxoformat;
127 };
128
129 struct cx23885_fh {
130 struct cx23885_dev *dev;
131 enum v4l2_buf_type type;
132 int radio;
133 u32 resources;
134
135 /* video overlay */
136 struct v4l2_window win;
137 struct v4l2_clip *clips;
138 unsigned int nclips;
139
140 /* video capture */
141 struct cx23885_fmt *fmt;
142 unsigned int width, height;
143
144 /* vbi capture */
145 struct videobuf_queue vidq;
146 struct videobuf_queue vbiq;
147
148 /* MPEG Encoder specifics ONLY */
149 struct videobuf_queue mpegq;
150 atomic_t v4l_reading;
151 };
152
153 enum cx23885_itype {
154 CX23885_VMUX_COMPOSITE1 = 1,
155 CX23885_VMUX_COMPOSITE2,
156 CX23885_VMUX_COMPOSITE3,
157 CX23885_VMUX_COMPOSITE4,
158 CX23885_VMUX_SVIDEO,
159 CX23885_VMUX_TELEVISION,
160 CX23885_VMUX_CABLE,
161 CX23885_VMUX_DVB,
162 CX23885_VMUX_DEBUG,
163 CX23885_RADIO,
164 };
165
166 enum cx23885_src_sel_type {
167 CX23885_SRC_SEL_EXT_656_VIDEO = 0,
168 CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO
169 };
170
171 /* buffer for one video frame */
172 struct cx23885_buffer {
173 /* common v4l buffer stuff -- must be first */
174 struct videobuf_buffer vb;
175
176 /* cx23885 specific */
177 unsigned int bpl;
178 struct btcx_riscmem risc;
179 struct cx23885_fmt *fmt;
180 u32 count;
181 };
182
183 struct cx23885_input {
184 enum cx23885_itype type;
185 unsigned int vmux;
186 u32 gpio0, gpio1, gpio2, gpio3;
187 };
188
189 typedef enum {
190 CX23885_MPEG_UNDEFINED = 0,
191 CX23885_MPEG_DVB,
192 CX23885_ANALOG_VIDEO,
193 CX23885_MPEG_ENCODER,
194 } port_t;
195
196 struct cx23885_board {
197 char *name;
198 port_t porta, portb, portc;
199 unsigned int tuner_type;
200 unsigned int radio_type;
201 unsigned char tuner_addr;
202 unsigned char radio_addr;
203
204 /* Vendors can and do run the PCIe bridge at different
205 * clock rates, driven physically by crystals on the PCBs.
206 * The core has to accomodate this. This allows the user
207 * to add new boards with new frequencys. The value is
208 * expressed in Hz.
209 *
210 * The core framework will default this value based on
211 * current designs, but it can vary.
212 */
213 u32 clk_freq;
214 struct cx23885_input input[MAX_CX23885_INPUT];
215 int cimax; /* for NetUP */
216 };
217
218 struct cx23885_subid {
219 u16 subvendor;
220 u16 subdevice;
221 u32 card;
222 };
223
224 struct cx23885_i2c {
225 struct cx23885_dev *dev;
226
227 int nr;
228
229 /* i2c i/o */
230 struct i2c_adapter i2c_adap;
231 struct i2c_algo_bit_data i2c_algo;
232 struct i2c_client i2c_client;
233 u32 i2c_rc;
234
235 /* 885 registers used for raw addess */
236 u32 i2c_period;
237 u32 reg_ctrl;
238 u32 reg_stat;
239 u32 reg_addr;
240 u32 reg_rdata;
241 u32 reg_wdata;
242 };
243
244 struct cx23885_dmaqueue {
245 struct list_head active;
246 struct list_head queued;
247 struct timer_list timeout;
248 struct btcx_riscmem stopper;
249 u32 count;
250 };
251
252 struct cx23885_tsport {
253 struct cx23885_dev *dev;
254
255 int nr;
256 int sram_chno;
257
258 struct videobuf_dvb_frontends frontends;
259
260 /* dma queues */
261 struct cx23885_dmaqueue mpegq;
262 u32 ts_packet_size;
263 u32 ts_packet_count;
264
265 int width;
266 int height;
267
268 spinlock_t slock;
269
270 /* registers */
271 u32 reg_gpcnt;
272 u32 reg_gpcnt_ctl;
273 u32 reg_dma_ctl;
274 u32 reg_lngth;
275 u32 reg_hw_sop_ctrl;
276 u32 reg_gen_ctrl;
277 u32 reg_bd_pkt_status;
278 u32 reg_sop_status;
279 u32 reg_fifo_ovfl_stat;
280 u32 reg_vld_misc;
281 u32 reg_ts_clk_en;
282 u32 reg_ts_int_msk;
283 u32 reg_ts_int_stat;
284 u32 reg_src_sel;
285
286 /* Default register vals */
287 int pci_irqmask;
288 u32 dma_ctl_val;
289 u32 ts_int_msk_val;
290 u32 gen_ctrl_val;
291 u32 ts_clk_en_val;
292 u32 src_sel_val;
293 u32 vld_misc_val;
294 u32 hw_sop_ctrl_val;
295
296 /* Allow a single tsport to have multiple frontends */
297 u32 num_frontends;
298 void *port_priv;
299
300 /* FIXME: temporary hack */
301 int (*set_frontend_save) (struct dvb_frontend *,
302 struct dvb_frontend_parameters *);
303 };
304
305 struct cx23885_dev {
306 struct list_head devlist;
307 atomic_t refcount;
308 struct v4l2_device v4l2_dev;
309
310 /* pci stuff */
311 struct pci_dev *pci;
312 unsigned char pci_rev, pci_lat;
313 int pci_bus, pci_slot;
314 u32 __iomem *lmmio;
315 u8 __iomem *bmmio;
316 int pci_irqmask;
317 int hwrevision;
318
319 /* This valud is board specific and is used to configure the
320 * AV core so we see nice clean and stable video and audio. */
321 u32 clk_freq;
322
323 /* I2C adapters: Master 1 & 2 (External) & Master 3 (Internal only) */
324 struct cx23885_i2c i2c_bus[3];
325
326 int nr;
327 struct mutex lock;
328
329 /* board details */
330 unsigned int board;
331 char name[32];
332
333 struct cx23885_tsport ts1, ts2;
334
335 /* sram configuration */
336 struct sram_channel *sram_channels;
337
338 enum {
339 CX23885_BRIDGE_UNDEFINED = 0,
340 CX23885_BRIDGE_885 = 885,
341 CX23885_BRIDGE_887 = 887,
342 CX23885_BRIDGE_888 = 888,
343 } bridge;
344
345 /* Analog video */
346 u32 resources;
347 unsigned int input;
348 u32 tvaudio;
349 v4l2_std_id tvnorm;
350 unsigned int tuner_type;
351 unsigned char tuner_addr;
352 unsigned int radio_type;
353 unsigned char radio_addr;
354 unsigned int has_radio;
355 struct v4l2_subdev *sd_cx25840;
356
357 /* V4l */
358 u32 freq;
359 struct video_device *video_dev;
360 struct video_device *vbi_dev;
361 struct video_device *radio_dev;
362
363 struct cx23885_dmaqueue vidq;
364 struct cx23885_dmaqueue vbiq;
365 spinlock_t slock;
366
367 /* MPEG Encoder ONLY settings */
368 u32 cx23417_mailbox;
369 struct cx2341x_mpeg_params mpeg_params;
370 struct video_device *v4l_device;
371 atomic_t v4l_reader_count;
372 struct cx23885_tvnorm encodernorm;
373
374 };
375
376 static inline struct cx23885_dev *to_cx23885(struct v4l2_device *v4l2_dev)
377 {
378 return container_of(v4l2_dev, struct cx23885_dev, v4l2_dev);
379 }
380
381 #define call_all(dev, o, f, args...) \
382 v4l2_device_call_all(&dev->v4l2_dev, 0, o, f, ##args)
383
384 extern struct list_head cx23885_devlist;
385
386 #define SRAM_CH01 0 /* Video A */
387 #define SRAM_CH02 1 /* VBI A */
388 #define SRAM_CH03 2 /* Video B */
389 #define SRAM_CH04 3 /* Transport via B */
390 #define SRAM_CH05 4 /* VBI B */
391 #define SRAM_CH06 5 /* Video C */
392 #define SRAM_CH07 6 /* Transport via C */
393 #define SRAM_CH08 7 /* Audio Internal A */
394 #define SRAM_CH09 8 /* Audio Internal B */
395 #define SRAM_CH10 9 /* Audio External */
396 #define SRAM_CH11 10 /* COMB_3D_N */
397 #define SRAM_CH12 11 /* Comb 3D N1 */
398 #define SRAM_CH13 12 /* Comb 3D N2 */
399 #define SRAM_CH14 13 /* MOE Vid */
400 #define SRAM_CH15 14 /* MOE RSLT */
401
402 struct sram_channel {
403 char *name;
404 u32 cmds_start;
405 u32 ctrl_start;
406 u32 cdt;
407 u32 fifo_start;
408 u32 fifo_size;
409 u32 ptr1_reg;
410 u32 ptr2_reg;
411 u32 cnt1_reg;
412 u32 cnt2_reg;
413 u32 jumponly;
414 };
415
416 /* ----------------------------------------------------------- */
417
418 #define cx_read(reg) readl(dev->lmmio + ((reg)>>2))
419 #define cx_write(reg, value) writel((value), dev->lmmio + ((reg)>>2))
420
421 #define cx_andor(reg, mask, value) \
422 writel((readl(dev->lmmio+((reg)>>2)) & ~(mask)) |\
423 ((value) & (mask)), dev->lmmio+((reg)>>2))
424
425 #define cx_set(reg, bit) cx_andor((reg), (bit), (bit))
426 #define cx_clear(reg, bit) cx_andor((reg), (bit), 0)
427
428 /* ----------------------------------------------------------- */
429 /* cx23885-core.c */
430
431 extern int cx23885_sram_channel_setup(struct cx23885_dev *dev,
432 struct sram_channel *ch,
433 unsigned int bpl, u32 risc);
434
435 extern void cx23885_sram_channel_dump(struct cx23885_dev *dev,
436 struct sram_channel *ch);
437
438 extern int cx23885_risc_stopper(struct pci_dev *pci, struct btcx_riscmem *risc,
439 u32 reg, u32 mask, u32 value);
440
441 extern int cx23885_risc_buffer(struct pci_dev *pci, struct btcx_riscmem *risc,
442 struct scatterlist *sglist,
443 unsigned int top_offset, unsigned int bottom_offset,
444 unsigned int bpl, unsigned int padding, unsigned int lines);
445
446 void cx23885_cancel_buffers(struct cx23885_tsport *port);
447
448 extern int cx23885_restart_queue(struct cx23885_tsport *port,
449 struct cx23885_dmaqueue *q);
450
451 extern void cx23885_wakeup(struct cx23885_tsport *port,
452 struct cx23885_dmaqueue *q, u32 count);
453
454 extern void cx23885_gpio_set(struct cx23885_dev *dev, u32 mask);
455 extern void cx23885_gpio_clear(struct cx23885_dev *dev, u32 mask);
456 extern void cx23885_gpio_enable(struct cx23885_dev *dev, u32 mask,
457 int asoutput);
458
459
460 /* ----------------------------------------------------------- */
461 /* cx23885-cards.c */
462 extern struct cx23885_board cx23885_boards[];
463 extern const unsigned int cx23885_bcount;
464
465 extern struct cx23885_subid cx23885_subids[];
466 extern const unsigned int cx23885_idcount;
467
468 extern int cx23885_tuner_callback(void *priv, int component,
469 int command, int arg);
470 extern void cx23885_card_list(struct cx23885_dev *dev);
471 extern int cx23885_ir_init(struct cx23885_dev *dev);
472 extern void cx23885_gpio_setup(struct cx23885_dev *dev);
473 extern void cx23885_card_setup(struct cx23885_dev *dev);
474 extern void cx23885_card_setup_pre_i2c(struct cx23885_dev *dev);
475
476 extern int cx23885_dvb_register(struct cx23885_tsport *port);
477 extern int cx23885_dvb_unregister(struct cx23885_tsport *port);
478
479 extern int cx23885_buf_prepare(struct videobuf_queue *q,
480 struct cx23885_tsport *port,
481 struct cx23885_buffer *buf,
482 enum v4l2_field field);
483 extern void cx23885_buf_queue(struct cx23885_tsport *port,
484 struct cx23885_buffer *buf);
485 extern void cx23885_free_buffer(struct videobuf_queue *q,
486 struct cx23885_buffer *buf);
487
488 /* ----------------------------------------------------------- */
489 /* cx23885-video.c */
490 /* Video */
491 extern int cx23885_video_register(struct cx23885_dev *dev);
492 extern void cx23885_video_unregister(struct cx23885_dev *dev);
493 extern int cx23885_video_irq(struct cx23885_dev *dev, u32 status);
494
495 /* ----------------------------------------------------------- */
496 /* cx23885-vbi.c */
497 extern int cx23885_vbi_fmt(struct file *file, void *priv,
498 struct v4l2_format *f);
499 extern void cx23885_vbi_timeout(unsigned long data);
500 extern struct videobuf_queue_ops cx23885_vbi_qops;
501
502 /* cx23885-i2c.c */
503 extern int cx23885_i2c_register(struct cx23885_i2c *bus);
504 extern int cx23885_i2c_unregister(struct cx23885_i2c *bus);
505 extern void cx23885_av_clk(struct cx23885_dev *dev, int enable);
506
507 /* ----------------------------------------------------------- */
508 /* cx23885-417.c */
509 extern int cx23885_417_register(struct cx23885_dev *dev);
510 extern void cx23885_417_unregister(struct cx23885_dev *dev);
511 extern int cx23885_irq_417(struct cx23885_dev *dev, u32 status);
512 extern void cx23885_417_check_encoder(struct cx23885_dev *dev);
513 extern void cx23885_mc417_init(struct cx23885_dev *dev);
514 extern int mc417_memory_read(struct cx23885_dev *dev, u32 address, u32 *value);
515 extern int mc417_memory_write(struct cx23885_dev *dev, u32 address, u32 value);
516 extern void mc417_gpio_set(struct cx23885_dev *dev, u32 mask);
517 extern void mc417_gpio_clear(struct cx23885_dev *dev, u32 mask);
518 extern void mc417_gpio_enable(struct cx23885_dev *dev, u32 mask, int asoutput);
519
520
521 /* ----------------------------------------------------------- */
522 /* tv norms */
523
524 static inline unsigned int norm_maxw(v4l2_std_id norm)
525 {
526 return (norm & (V4L2_STD_MN & ~V4L2_STD_PAL_Nc)) ? 720 : 768;
527 }
528
529 static inline unsigned int norm_maxh(v4l2_std_id norm)
530 {
531 return (norm & V4L2_STD_625_50) ? 576 : 480;
532 }
533
534 static inline unsigned int norm_swidth(v4l2_std_id norm)
535 {
536 return (norm & (V4L2_STD_MN & ~V4L2_STD_PAL_Nc)) ? 754 : 922;
537 }
Linux with added FPC-III support