Merge branch 'work.regset' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs
[linux/fpc-iii.git] / drivers / media / i2c / smiapp / smiapp-quirk.c
blobab96d6067fc35db7e559e49d5e9fdb3613f453ed
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * drivers/media/i2c/smiapp/smiapp-quirk.c
5 * Generic driver for SMIA/SMIA++ compliant camera modules
7 * Copyright (C) 2011--2012 Nokia Corporation
8 * Contact: Sakari Ailus <sakari.ailus@iki.fi>
9 */
11 #include <linux/delay.h>
13 #include "smiapp.h"
15 static int smiapp_write_8(struct smiapp_sensor *sensor, u16 reg, u8 val)
17 return smiapp_write(sensor, SMIAPP_REG_MK_U8(reg), val);
20 static int smiapp_write_8s(struct smiapp_sensor *sensor,
21 const struct smiapp_reg_8 *regs, int len)
23 struct i2c_client *client = v4l2_get_subdevdata(&sensor->src->sd);
24 int rval;
26 for (; len > 0; len--, regs++) {
27 rval = smiapp_write_8(sensor, regs->reg, regs->val);
28 if (rval < 0) {
29 dev_err(&client->dev,
30 "error %d writing reg 0x%4.4x, val 0x%2.2x",
31 rval, regs->reg, regs->val);
32 return rval;
36 return 0;
39 void smiapp_replace_limit(struct smiapp_sensor *sensor,
40 u32 limit, u32 val)
42 struct i2c_client *client = v4l2_get_subdevdata(&sensor->src->sd);
44 dev_dbg(&client->dev, "quirk: 0x%8.8x \"%s\" = %d, 0x%x\n",
45 smiapp_reg_limits[limit].addr,
46 smiapp_reg_limits[limit].what, val, val);
47 sensor->limits[limit] = val;
50 static int jt8ew9_limits(struct smiapp_sensor *sensor)
52 if (sensor->minfo.revision_number_major < 0x03)
53 sensor->frame_skip = 1;
55 /* Below 24 gain doesn't have effect at all, */
56 /* but ~59 is needed for full dynamic range */
57 smiapp_replace_limit(sensor, SMIAPP_LIMIT_ANALOGUE_GAIN_CODE_MIN, 59);
58 smiapp_replace_limit(
59 sensor, SMIAPP_LIMIT_ANALOGUE_GAIN_CODE_MAX, 6000);
61 return 0;
64 static int jt8ew9_post_poweron(struct smiapp_sensor *sensor)
66 static const struct smiapp_reg_8 regs[] = {
67 { 0x30a3, 0xd8 }, /* Output port control : LVDS ports only */
68 { 0x30ae, 0x00 }, /* 0x0307 pll_multiplier maximum value on PLL input 9.6MHz ( 19.2MHz is divided on pre_pll_div) */
69 { 0x30af, 0xd0 }, /* 0x0307 pll_multiplier maximum value on PLL input 9.6MHz ( 19.2MHz is divided on pre_pll_div) */
70 { 0x322d, 0x04 }, /* Adjusting Processing Image Size to Scaler Toshiba Recommendation Setting */
71 { 0x3255, 0x0f }, /* Horizontal Noise Reduction Control Toshiba Recommendation Setting */
72 { 0x3256, 0x15 }, /* Horizontal Noise Reduction Control Toshiba Recommendation Setting */
73 { 0x3258, 0x70 }, /* Analog Gain Control Toshiba Recommendation Setting */
74 { 0x3259, 0x70 }, /* Analog Gain Control Toshiba Recommendation Setting */
75 { 0x325f, 0x7c }, /* Analog Gain Control Toshiba Recommendation Setting */
76 { 0x3302, 0x06 }, /* Pixel Reference Voltage Control Toshiba Recommendation Setting */
77 { 0x3304, 0x00 }, /* Pixel Reference Voltage Control Toshiba Recommendation Setting */
78 { 0x3307, 0x22 }, /* Pixel Reference Voltage Control Toshiba Recommendation Setting */
79 { 0x3308, 0x8d }, /* Pixel Reference Voltage Control Toshiba Recommendation Setting */
80 { 0x331e, 0x0f }, /* Black Hole Sun Correction Control Toshiba Recommendation Setting */
81 { 0x3320, 0x30 }, /* Black Hole Sun Correction Control Toshiba Recommendation Setting */
82 { 0x3321, 0x11 }, /* Black Hole Sun Correction Control Toshiba Recommendation Setting */
83 { 0x3322, 0x98 }, /* Black Hole Sun Correction Control Toshiba Recommendation Setting */
84 { 0x3323, 0x64 }, /* Black Hole Sun Correction Control Toshiba Recommendation Setting */
85 { 0x3325, 0x83 }, /* Read Out Timing Control Toshiba Recommendation Setting */
86 { 0x3330, 0x18 }, /* Read Out Timing Control Toshiba Recommendation Setting */
87 { 0x333c, 0x01 }, /* Read Out Timing Control Toshiba Recommendation Setting */
88 { 0x3345, 0x2f }, /* Black Hole Sun Correction Control Toshiba Recommendation Setting */
89 { 0x33de, 0x38 }, /* Horizontal Noise Reduction Control Toshiba Recommendation Setting */
90 /* Taken from v03. No idea what the rest are. */
91 { 0x32e0, 0x05 },
92 { 0x32e1, 0x05 },
93 { 0x32e2, 0x04 },
94 { 0x32e5, 0x04 },
95 { 0x32e6, 0x04 },
99 return smiapp_write_8s(sensor, regs, ARRAY_SIZE(regs));
102 const struct smiapp_quirk smiapp_jt8ew9_quirk = {
103 .limits = jt8ew9_limits,
104 .post_poweron = jt8ew9_post_poweron,
107 static int imx125es_post_poweron(struct smiapp_sensor *sensor)
109 /* Taken from v02. No idea what the other two are. */
110 static const struct smiapp_reg_8 regs[] = {
112 * 0x3302: clk during frame blanking:
113 * 0x00 - HS mode, 0x01 - LP11
115 { 0x3302, 0x01 },
116 { 0x302d, 0x00 },
117 { 0x3b08, 0x8c },
120 return smiapp_write_8s(sensor, regs, ARRAY_SIZE(regs));
123 const struct smiapp_quirk smiapp_imx125es_quirk = {
124 .post_poweron = imx125es_post_poweron,
127 static int jt8ev1_limits(struct smiapp_sensor *sensor)
129 smiapp_replace_limit(sensor, SMIAPP_LIMIT_X_ADDR_MAX, 4271);
130 smiapp_replace_limit(sensor,
131 SMIAPP_LIMIT_MIN_LINE_BLANKING_PCK_BIN, 184);
133 return 0;
136 static int jt8ev1_post_poweron(struct smiapp_sensor *sensor)
138 struct i2c_client *client = v4l2_get_subdevdata(&sensor->src->sd);
139 int rval;
140 static const struct smiapp_reg_8 regs[] = {
141 { 0x3031, 0xcd }, /* For digital binning (EQ_MONI) */
142 { 0x30a3, 0xd0 }, /* FLASH STROBE enable */
143 { 0x3237, 0x00 }, /* For control of pulse timing for ADC */
144 { 0x3238, 0x43 },
145 { 0x3301, 0x06 }, /* For analog bias for sensor */
146 { 0x3302, 0x06 },
147 { 0x3304, 0x00 },
148 { 0x3305, 0x88 },
149 { 0x332a, 0x14 },
150 { 0x332c, 0x6b },
151 { 0x3336, 0x01 },
152 { 0x333f, 0x1f },
153 { 0x3355, 0x00 },
154 { 0x3356, 0x20 },
155 { 0x33bf, 0x20 }, /* Adjust the FBC speed */
156 { 0x33c9, 0x20 },
157 { 0x33ce, 0x30 }, /* Adjust the parameter for logic function */
158 { 0x33cf, 0xec }, /* For Black sun */
159 { 0x3328, 0x80 }, /* Ugh. No idea what's this. */
161 static const struct smiapp_reg_8 regs_96[] = {
162 { 0x30ae, 0x00 }, /* For control of ADC clock */
163 { 0x30af, 0xd0 },
164 { 0x30b0, 0x01 },
167 rval = smiapp_write_8s(sensor, regs, ARRAY_SIZE(regs));
168 if (rval < 0)
169 return rval;
171 switch (sensor->hwcfg->ext_clk) {
172 case 9600000:
173 return smiapp_write_8s(sensor, regs_96,
174 ARRAY_SIZE(regs_96));
175 default:
176 dev_warn(&client->dev, "no MSRs for %d Hz ext_clk\n",
177 sensor->hwcfg->ext_clk);
178 return 0;
182 static int jt8ev1_pre_streamon(struct smiapp_sensor *sensor)
184 return smiapp_write_8(sensor, 0x3328, 0x00);
187 static int jt8ev1_post_streamoff(struct smiapp_sensor *sensor)
189 int rval;
191 /* Workaround: allows fast standby to work properly */
192 rval = smiapp_write_8(sensor, 0x3205, 0x04);
193 if (rval < 0)
194 return rval;
196 /* Wait for 1 ms + one line => 2 ms is likely enough */
197 usleep_range(2000, 2050);
199 /* Restore it */
200 rval = smiapp_write_8(sensor, 0x3205, 0x00);
201 if (rval < 0)
202 return rval;
204 return smiapp_write_8(sensor, 0x3328, 0x80);
207 static int jt8ev1_init(struct smiapp_sensor *sensor)
209 sensor->pll.flags |= SMIAPP_PLL_FLAG_OP_PIX_CLOCK_PER_LANE;
211 return 0;
214 const struct smiapp_quirk smiapp_jt8ev1_quirk = {
215 .limits = jt8ev1_limits,
216 .post_poweron = jt8ev1_post_poweron,
217 .pre_streamon = jt8ev1_pre_streamon,
218 .post_streamoff = jt8ev1_post_streamoff,
219 .init = jt8ev1_init,
222 static int tcm8500md_limits(struct smiapp_sensor *sensor)
224 smiapp_replace_limit(sensor, SMIAPP_LIMIT_MIN_PLL_IP_FREQ_HZ, 2700000);
226 return 0;
229 const struct smiapp_quirk smiapp_tcm8500md_quirk = {
230 .limits = tcm8500md_limits,