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rename dev_hw_addr_random and remove redundant second
[linux/fpc-iii.git] / drivers / net / tokenring / 3c359.c
blobd7c292aa76b1528f9b979afe3a6c17d48e080a02
1 /*
2 * 3c359.c (c) 2000 Mike Phillips (mikep@linuxtr.net) All Rights Reserved
3 *
4 * Linux driver for 3Com 3c359 Tokenlink Velocity XL PCI NIC
5 *
6 * Base Driver Olympic:
7 * Written 1999 Peter De Schrijver & Mike Phillips
8 *
9 * This software may be used and distributed according to the terms
10 * of the GNU General Public License, incorporated herein by reference.
11 *
12 * 7/17/00 - Clean up, version number 0.9.0. Ready to release to the world.
13 *
14 * 2/16/01 - Port up to kernel 2.4.2 ready for submission into the kernel.
15 * 3/05/01 - Last clean up stuff before submission.
16 * 2/15/01 - Finally, update to new pci api.
17 *
18 * To Do:
19 */
20
21 /*
22 * Technical Card Details
23 *
24 * All access to data is done with 16/8 bit transfers. The transfer
25 * method really sucks. You can only read or write one location at a time.
26 *
27 * Also, the microcode for the card must be uploaded if the card does not have
28 * the flashrom on board. This is a 28K bloat in the driver when compiled
29 * as a module.
30 *
31 * Rx is very simple, status into a ring of descriptors, dma data transfer,
32 * interrupts to tell us when a packet is received.
33 *
34 * Tx is a little more interesting. Similar scenario, descriptor and dma data
35 * transfers, but we don't have to interrupt the card to tell it another packet
36 * is ready for transmission, we are just doing simple memory writes, not io or mmio
37 * writes. The card can be set up to simply poll on the next
38 * descriptor pointer and when this value is non-zero will automatically download
39 * the next packet. The card then interrupts us when the packet is done.
40 *
41 */
42
43 #define XL_DEBUG 0
44
45 #include <linux/jiffies.h>
46 #include <linux/module.h>
47 #include <linux/kernel.h>
48 #include <linux/errno.h>
49 #include <linux/timer.h>
50 #include <linux/in.h>
51 #include <linux/ioport.h>
52 #include <linux/string.h>
53 #include <linux/proc_fs.h>
54 #include <linux/ptrace.h>
55 #include <linux/skbuff.h>
56 #include <linux/interrupt.h>
57 #include <linux/delay.h>
58 #include <linux/netdevice.h>
59 #include <linux/trdevice.h>
60 #include <linux/stddef.h>
61 #include <linux/init.h>
62 #include <linux/pci.h>
63 #include <linux/spinlock.h>
64 #include <linux/bitops.h>
65 #include <linux/firmware.h>
66 #include <linux/slab.h>
67
68 #include <net/checksum.h>
69
70 #include <asm/io.h>
71 #include <asm/system.h>
72
73 #include "3c359.h"
74
75 static char version[] __devinitdata =
76 "3c359.c v1.2.0 2/17/01 - Mike Phillips (mikep@linuxtr.net)" ;
77
78 #define FW_NAME "3com/3C359.bin"
79 MODULE_AUTHOR("Mike Phillips <mikep@linuxtr.net>") ;
80 MODULE_DESCRIPTION("3Com 3C359 Velocity XL Token Ring Adapter Driver\n") ;
81 MODULE_FIRMWARE(FW_NAME);
82
83 /* Module parameters */
84
85 /* Ring Speed 0,4,16
86 * 0 = Autosense
87 * 4,16 = Selected speed only, no autosense
88 * This allows the card to be the first on the ring
89 * and become the active monitor.
90 *
91 * WARNING: Some hubs will allow you to insert
92 * at the wrong speed.
93 *
94 * The adapter will _not_ fail to open if there are no
95 * active monitors on the ring, it will simply open up in
96 * its last known ringspeed if no ringspeed is specified.
97 */
98
99 static int ringspeed[XL_MAX_ADAPTERS] = {0,} ;
100
101 module_param_array(ringspeed, int, NULL, 0);
102 MODULE_PARM_DESC(ringspeed,"3c359: Ringspeed selection - 4,16 or 0") ;
103
104 /* Packet buffer size */
105
106 static int pkt_buf_sz[XL_MAX_ADAPTERS] = {0,} ;
107
108 module_param_array(pkt_buf_sz, int, NULL, 0) ;
109 MODULE_PARM_DESC(pkt_buf_sz,"3c359: Initial buffer size") ;
110 /* Message Level */
111
112 static int message_level[XL_MAX_ADAPTERS] = {0,} ;
113
114 module_param_array(message_level, int, NULL, 0) ;
115 MODULE_PARM_DESC(message_level, "3c359: Level of reported messages") ;
116 /*
117 * This is a real nasty way of doing this, but otherwise you
118 * will be stuck with 1555 lines of hex #'s in the code.
119 */
120
121 static DEFINE_PCI_DEVICE_TABLE(xl_pci_tbl) =
122 {
123 {PCI_VENDOR_ID_3COM,PCI_DEVICE_ID_3COM_3C359, PCI_ANY_ID, PCI_ANY_ID, },
124 { } /* terminate list */
125 };
126 MODULE_DEVICE_TABLE(pci,xl_pci_tbl) ;
127
128 static int xl_init(struct net_device *dev);
129 static int xl_open(struct net_device *dev);
130 static int xl_open_hw(struct net_device *dev) ;
131 static int xl_hw_reset(struct net_device *dev);
132 static netdev_tx_t xl_xmit(struct sk_buff *skb, struct net_device *dev);
133 static void xl_dn_comp(struct net_device *dev);
134 static int xl_close(struct net_device *dev);
135 static void xl_set_rx_mode(struct net_device *dev);
136 static irqreturn_t xl_interrupt(int irq, void *dev_id);
137 static int xl_set_mac_address(struct net_device *dev, void *addr) ;
138 static void xl_arb_cmd(struct net_device *dev);
139 static void xl_asb_cmd(struct net_device *dev) ;
140 static void xl_srb_cmd(struct net_device *dev, int srb_cmd) ;
141 static void xl_wait_misr_flags(struct net_device *dev) ;
142 static int xl_change_mtu(struct net_device *dev, int mtu);
143 static void xl_srb_bh(struct net_device *dev) ;
144 static void xl_asb_bh(struct net_device *dev) ;
145 static void xl_reset(struct net_device *dev) ;
146 static void xl_freemem(struct net_device *dev) ;
147
148
149 /* EEProm Access Functions */
150 static u16 xl_ee_read(struct net_device *dev, int ee_addr) ;
151 static void xl_ee_write(struct net_device *dev, int ee_addr, u16 ee_value) ;
152
153 /* Debugging functions */
154 #if XL_DEBUG
155 static void print_tx_state(struct net_device *dev) ;
156 static void print_rx_state(struct net_device *dev) ;
157
158 static void print_tx_state(struct net_device *dev)
159 {
160
161 struct xl_private *xl_priv = netdev_priv(dev);
162 struct xl_tx_desc *txd ;
163 u8 __iomem *xl_mmio = xl_priv->xl_mmio ;
164 int i ;
165
166 printk("tx_ring_head: %d, tx_ring_tail: %d, free_ent: %d\n",xl_priv->tx_ring_head,
167 xl_priv->tx_ring_tail, xl_priv->free_ring_entries) ;
168 printk("Ring , Address , FSH , DnNextPtr, Buffer, Buffer_Len\n");
169 for (i = 0; i < 16; i++) {
170 txd = &(xl_priv->xl_tx_ring[i]) ;
171 printk("%d, %08lx, %08x, %08x, %08x, %08x\n", i, virt_to_bus(txd),
172 txd->framestartheader, txd->dnnextptr, txd->buffer, txd->buffer_length ) ;
173 }
174
175 printk("DNLISTPTR = %04x\n", readl(xl_mmio + MMIO_DNLISTPTR) );
176
177 printk("DmaCtl = %04x\n", readl(xl_mmio + MMIO_DMA_CTRL) );
178 printk("Queue status = %0x\n",netif_running(dev) ) ;
179 }
180
181 static void print_rx_state(struct net_device *dev)
182 {
183
184 struct xl_private *xl_priv = netdev_priv(dev);
185 struct xl_rx_desc *rxd ;
186 u8 __iomem *xl_mmio = xl_priv->xl_mmio ;
187 int i ;
188
189 printk("rx_ring_tail: %d\n", xl_priv->rx_ring_tail);
190 printk("Ring , Address , FrameState , UPNextPtr, FragAddr, Frag_Len\n");
191 for (i = 0; i < 16; i++) {
192 /* rxd = (struct xl_rx_desc *)xl_priv->rx_ring_dma_addr + (i * sizeof(struct xl_rx_desc)) ; */
193 rxd = &(xl_priv->xl_rx_ring[i]) ;
194 printk("%d, %08lx, %08x, %08x, %08x, %08x\n", i, virt_to_bus(rxd),
195 rxd->framestatus, rxd->upnextptr, rxd->upfragaddr, rxd->upfraglen ) ;
196 }
197
198 printk("UPLISTPTR = %04x\n", readl(xl_mmio + MMIO_UPLISTPTR));
199
200 printk("DmaCtl = %04x\n", readl(xl_mmio + MMIO_DMA_CTRL));
201 printk("Queue status = %0x\n",netif_running(dev));
202 }
203 #endif
204
205 /*
206 * Read values from the on-board EEProm. This looks very strange
207 * but you have to wait for the EEProm to get/set the value before
208 * passing/getting the next value from the nic. As with all requests
209 * on this nic it has to be done in two stages, a) tell the nic which
210 * memory address you want to access and b) pass/get the value from the nic.
211 * With the EEProm, you have to wait before and between access a) and b).
212 * As this is only read at initialization time and the wait period is very
213 * small we shouldn't have to worry about scheduling issues.
214 */
215
216 static u16 xl_ee_read(struct net_device *dev, int ee_addr)
217 {
218 struct xl_private *xl_priv = netdev_priv(dev);
219 u8 __iomem *xl_mmio = xl_priv->xl_mmio ;
220
221 /* Wait for EEProm to not be busy */
222 writel(IO_WORD_READ | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
223 while ( readw(xl_mmio + MMIO_MACDATA) & EEBUSY ) ;
224
225 /* Tell EEProm what we want to do and where */
226 writel(IO_WORD_WRITE | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
227 writew(EEREAD + ee_addr, xl_mmio + MMIO_MACDATA) ;
228
229 /* Wait for EEProm to not be busy */
230 writel(IO_WORD_READ | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
231 while ( readw(xl_mmio + MMIO_MACDATA) & EEBUSY ) ;
232
233 /* Tell EEProm what we want to do and where */
234 writel(IO_WORD_WRITE | EECONTROL , xl_mmio + MMIO_MAC_ACCESS_CMD) ;
235 writew(EEREAD + ee_addr, xl_mmio + MMIO_MACDATA) ;
236
237 /* Finally read the value from the EEProm */
238 writel(IO_WORD_READ | EEDATA , xl_mmio + MMIO_MAC_ACCESS_CMD) ;
239 return readw(xl_mmio + MMIO_MACDATA) ;
240 }
241
242 /*
243 * Write values to the onboard eeprom. As with eeprom read you need to
244 * set which location to write, wait, value to write, wait, with the
245 * added twist of having to enable eeprom writes as well.
246 */
247
248 static void xl_ee_write(struct net_device *dev, int ee_addr, u16 ee_value)
249 {
250 struct xl_private *xl_priv = netdev_priv(dev);
251 u8 __iomem *xl_mmio = xl_priv->xl_mmio ;
252
253 /* Wait for EEProm to not be busy */
254 writel(IO_WORD_READ | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
255 while ( readw(xl_mmio + MMIO_MACDATA) & EEBUSY ) ;
256
257 /* Enable write/erase */
258 writel(IO_WORD_WRITE | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
259 writew(EE_ENABLE_WRITE, xl_mmio + MMIO_MACDATA) ;
260
261 /* Wait for EEProm to not be busy */
262 writel(IO_WORD_READ | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
263 while ( readw(xl_mmio + MMIO_MACDATA) & EEBUSY ) ;
264
265 /* Put the value we want to write into EEDATA */
266 writel(IO_WORD_WRITE | EEDATA, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
267 writew(ee_value, xl_mmio + MMIO_MACDATA) ;
268
269 /* Tell EEProm to write eevalue into ee_addr */
270 writel(IO_WORD_WRITE | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
271 writew(EEWRITE + ee_addr, xl_mmio + MMIO_MACDATA) ;
272
273 /* Wait for EEProm to not be busy, to ensure write gets done */
274 writel(IO_WORD_READ | EECONTROL, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
275 while ( readw(xl_mmio + MMIO_MACDATA) & EEBUSY ) ;
276
277 return ;
278 }
279
280 static const struct net_device_ops xl_netdev_ops = {
281 .ndo_open = xl_open,
282 .ndo_stop = xl_close,
283 .ndo_start_xmit = xl_xmit,
284 .ndo_change_mtu = xl_change_mtu,
285 .ndo_set_rx_mode = xl_set_rx_mode,
286 .ndo_set_mac_address = xl_set_mac_address,
287 };
288
289 static int __devinit xl_probe(struct pci_dev *pdev,
290 const struct pci_device_id *ent)
291 {
292 struct net_device *dev ;
293 struct xl_private *xl_priv ;
294 static int card_no = -1 ;
295 int i ;
296
297 card_no++ ;
298
299 if (pci_enable_device(pdev)) {
300 return -ENODEV ;
301 }
302
303 pci_set_master(pdev);
304
305 if ((i = pci_request_regions(pdev,"3c359"))) {
306 return i ;
307 }
308
309 /*
310 * Allowing init_trdev to allocate the private data will align
311 * xl_private on a 32 bytes boundary which we need for the rx/tx
312 * descriptors
313 */
314
315 dev = alloc_trdev(sizeof(struct xl_private)) ;
316 if (!dev) {
317 pci_release_regions(pdev) ;
318 return -ENOMEM ;
319 }
320 xl_priv = netdev_priv(dev);
321
322 #if XL_DEBUG
323 printk("pci_device: %p, dev:%p, dev->priv: %p, ba[0]: %10x, ba[1]:%10x\n",
324 pdev, dev, netdev_priv(dev), (unsigned int)pdev->resource[0].start, (unsigned int)pdev->resource[1].start);
325 #endif
326
327 dev->irq=pdev->irq;
328 dev->base_addr=pci_resource_start(pdev,0) ;
329 xl_priv->xl_card_name = pci_name(pdev);
330 xl_priv->xl_mmio=ioremap(pci_resource_start(pdev,1), XL_IO_SPACE);
331 xl_priv->pdev = pdev ;
332
333 if ((pkt_buf_sz[card_no] < 100) || (pkt_buf_sz[card_no] > 18000) )
334 xl_priv->pkt_buf_sz = PKT_BUF_SZ ;
335 else
336 xl_priv->pkt_buf_sz = pkt_buf_sz[card_no] ;
337
338 dev->mtu = xl_priv->pkt_buf_sz - TR_HLEN ;
339 xl_priv->xl_ring_speed = ringspeed[card_no] ;
340 xl_priv->xl_message_level = message_level[card_no] ;
341 xl_priv->xl_functional_addr[0] = xl_priv->xl_functional_addr[1] = xl_priv->xl_functional_addr[2] = xl_priv->xl_functional_addr[3] = 0 ;
342 xl_priv->xl_copy_all_options = 0 ;
343
344 if((i = xl_init(dev))) {
345 iounmap(xl_priv->xl_mmio) ;
346 free_netdev(dev) ;
347 pci_release_regions(pdev) ;
348 return i ;
349 }
350
351 dev->netdev_ops = &xl_netdev_ops;
352 SET_NETDEV_DEV(dev, &pdev->dev);
353
354 pci_set_drvdata(pdev,dev) ;
355 if ((i = register_netdev(dev))) {
356 printk(KERN_ERR "3C359, register netdev failed\n") ;
357 pci_set_drvdata(pdev,NULL) ;
358 iounmap(xl_priv->xl_mmio) ;
359 free_netdev(dev) ;
360 pci_release_regions(pdev) ;
361 return i ;
362 }
363
364 printk(KERN_INFO "3C359: %s registered as: %s\n",xl_priv->xl_card_name,dev->name) ;
365
366 return 0;
367 }
368
369 static int xl_init_firmware(struct xl_private *xl_priv)
370 {
371 int err;
372
373 err = request_firmware(&xl_priv->fw, FW_NAME, &xl_priv->pdev->dev);
374 if (err) {
375 printk(KERN_ERR "Failed to load firmware \"%s\"\n", FW_NAME);
376 return err;
377 }
378
379 if (xl_priv->fw->size < 16) {
380 printk(KERN_ERR "Bogus length %zu in \"%s\"\n",
381 xl_priv->fw->size, FW_NAME);
382 release_firmware(xl_priv->fw);
383 err = -EINVAL;
384 }
385
386 return err;
387 }
388
389 static int __devinit xl_init(struct net_device *dev)
390 {
391 struct xl_private *xl_priv = netdev_priv(dev);
392 int err;
393
394 printk(KERN_INFO "%s\n", version);
395 printk(KERN_INFO "%s: I/O at %hx, MMIO at %p, using irq %d\n",
396 xl_priv->xl_card_name, (unsigned int)dev->base_addr ,xl_priv->xl_mmio, dev->irq);
397
398 spin_lock_init(&xl_priv->xl_lock) ;
399
400 err = xl_init_firmware(xl_priv);
401 if (err == 0)
402 err = xl_hw_reset(dev);
403
404 return err;
405 }
406
407
408 /*
409 * Hardware reset. This needs to be a separate entity as we need to reset the card
410 * when we change the EEProm settings.
411 */
412
413 static int xl_hw_reset(struct net_device *dev)
414 {
415 struct xl_private *xl_priv = netdev_priv(dev);
416 u8 __iomem *xl_mmio = xl_priv->xl_mmio ;
417 unsigned long t ;
418 u16 i ;
419 u16 result_16 ;
420 u8 result_8 ;
421 u16 start ;
422 int j ;
423
424 if (xl_priv->fw == NULL)
425 return -EINVAL;
426
427 /*
428 * Reset the card. If the card has got the microcode on board, we have
429 * missed the initialization interrupt, so we must always do this.
430 */
431
432 writew( GLOBAL_RESET, xl_mmio + MMIO_COMMAND ) ;
433
434 /*
435 * Must wait for cmdInProgress bit (12) to clear before continuing with
436 * card configuration.
437 */
438
439 t=jiffies;
440 while (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_CMD_IN_PROGRESS) {
441 schedule();
442 if (time_after(jiffies, t + 40 * HZ)) {
443 printk(KERN_ERR "%s: 3COM 3C359 Velocity XL card not responding to global reset.\n", dev->name);
444 return -ENODEV;
445 }
446 }
447
448 /*
449 * Enable pmbar by setting bit in CPAttention
450 */
451
452 writel( (IO_BYTE_READ | CPATTENTION), xl_mmio + MMIO_MAC_ACCESS_CMD) ;
453 result_8 = readb(xl_mmio + MMIO_MACDATA) ;
454 result_8 = result_8 | CPA_PMBARVIS ;
455 writel( (IO_BYTE_WRITE | CPATTENTION), xl_mmio + MMIO_MAC_ACCESS_CMD) ;
456 writeb(result_8, xl_mmio + MMIO_MACDATA) ;
457
458 /*
459 * Read cpHold bit in pmbar, if cleared we have got Flashrom on board.
460 * If not, we need to upload the microcode to the card
461 */
462
463 writel( (IO_WORD_READ | PMBAR),xl_mmio + MMIO_MAC_ACCESS_CMD);
464
465 #if XL_DEBUG
466 printk(KERN_INFO "Read from PMBAR = %04x\n", readw(xl_mmio + MMIO_MACDATA));
467 #endif
468
469 if ( readw( (xl_mmio + MMIO_MACDATA)) & PMB_CPHOLD ) {
470
471 /* Set PmBar, privateMemoryBase bits (8:2) to 0 */
472
473 writel( (IO_WORD_READ | PMBAR),xl_mmio + MMIO_MAC_ACCESS_CMD);
474 result_16 = readw(xl_mmio + MMIO_MACDATA) ;
475 result_16 = result_16 & ~((0x7F) << 2) ;
476 writel( (IO_WORD_WRITE | PMBAR), xl_mmio + MMIO_MAC_ACCESS_CMD) ;
477 writew(result_16,xl_mmio + MMIO_MACDATA) ;
478
479 /* Set CPAttention, memWrEn bit */
480
481 writel( (IO_BYTE_READ | CPATTENTION), xl_mmio + MMIO_MAC_ACCESS_CMD) ;
482 result_8 = readb(xl_mmio + MMIO_MACDATA) ;
483 result_8 = result_8 | CPA_MEMWREN ;
484 writel( (IO_BYTE_WRITE | CPATTENTION), xl_mmio + MMIO_MAC_ACCESS_CMD) ;
485 writeb(result_8, xl_mmio + MMIO_MACDATA) ;
486
487 /*
488 * Now to write the microcode into the shared ram
489 * The microcode must finish at position 0xFFFF,
490 * so we must subtract to get the start position for the code
491 *
492 * Looks strange but ensures compiler only uses
493 * 16 bit unsigned int
494 */
495 start = (0xFFFF - (xl_priv->fw->size) + 1) ;
496
497 printk(KERN_INFO "3C359: Uploading Microcode: ");
498
499 for (i = start, j = 0; j < xl_priv->fw->size; i++, j++) {
500 writel(MEM_BYTE_WRITE | 0XD0000 | i,
501 xl_mmio + MMIO_MAC_ACCESS_CMD);
502 writeb(xl_priv->fw->data[j], xl_mmio + MMIO_MACDATA);
503 if (j % 1024 == 0)
504 printk(".");
505 }
506 printk("\n") ;
507
508 for (i = 0; i < 16; i++) {
509 writel((MEM_BYTE_WRITE | 0xDFFF0) + i,
510 xl_mmio + MMIO_MAC_ACCESS_CMD);
511 writeb(xl_priv->fw->data[xl_priv->fw->size - 16 + i],
512 xl_mmio + MMIO_MACDATA);
513 }
514
515 /*
516 * Have to write the start address of the upload to FFF4, but
517 * the address must be >> 4. You do not want to know how long
518 * it took me to discover this.
519 */
520
521 writel(MEM_WORD_WRITE | 0xDFFF4, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
522 writew(start >> 4, xl_mmio + MMIO_MACDATA);
523
524 /* Clear the CPAttention, memWrEn Bit */
525
526 writel( (IO_BYTE_READ | CPATTENTION), xl_mmio + MMIO_MAC_ACCESS_CMD) ;
527 result_8 = readb(xl_mmio + MMIO_MACDATA) ;
528 result_8 = result_8 & ~CPA_MEMWREN ;
529 writel( (IO_BYTE_WRITE | CPATTENTION), xl_mmio + MMIO_MAC_ACCESS_CMD) ;
530 writeb(result_8, xl_mmio + MMIO_MACDATA) ;
531
532 /* Clear the cpHold bit in pmbar */
533
534 writel( (IO_WORD_READ | PMBAR),xl_mmio + MMIO_MAC_ACCESS_CMD);
535 result_16 = readw(xl_mmio + MMIO_MACDATA) ;
536 result_16 = result_16 & ~PMB_CPHOLD ;
537 writel( (IO_WORD_WRITE | PMBAR), xl_mmio + MMIO_MAC_ACCESS_CMD) ;
538 writew(result_16,xl_mmio + MMIO_MACDATA) ;
539
540
541 } /* If microcode upload required */
542
543 /*
544 * The card should now go though a self test procedure and get itself ready
545 * to be opened, we must wait for an srb response with the initialization
546 * information.
547 */
548
549 #if XL_DEBUG
550 printk(KERN_INFO "%s: Microcode uploaded, must wait for the self test to complete\n", dev->name);
551 #endif
552
553 writew(SETINDENABLE | 0xFFF, xl_mmio + MMIO_COMMAND) ;
554
555 t=jiffies;
556 while ( !(readw(xl_mmio + MMIO_INTSTATUS_AUTO) & INTSTAT_SRB) ) {
557 schedule();
558 if (time_after(jiffies, t + 15 * HZ)) {
559 printk(KERN_ERR "3COM 3C359 Velocity XL card not responding.\n");
560 return -ENODEV;
561 }
562 }
563
564 /*
565 * Write the RxBufArea with D000, RxEarlyThresh, TxStartThresh,
566 * DnPriReqThresh, read the tech docs if you want to know what
567 * values they need to be.
568 */
569
570 writel(MMIO_WORD_WRITE | RXBUFAREA, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
571 writew(0xD000, xl_mmio + MMIO_MACDATA) ;
572
573 writel(MMIO_WORD_WRITE | RXEARLYTHRESH, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
574 writew(0X0020, xl_mmio + MMIO_MACDATA) ;
575
576 writew( SETTXSTARTTHRESH | 0x40 , xl_mmio + MMIO_COMMAND) ;
577
578 writeb(0x04, xl_mmio + MMIO_DNBURSTTHRESH) ;
579 writeb(0x04, xl_mmio + DNPRIREQTHRESH) ;
580
581 /*
582 * Read WRBR to provide the location of the srb block, have to use byte reads not word reads.
583 * Tech docs have this wrong !!!!
584 */
585
586 writel(MMIO_BYTE_READ | WRBR, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
587 xl_priv->srb = readb(xl_mmio + MMIO_MACDATA) << 8 ;
588 writel( (MMIO_BYTE_READ | WRBR) + 1, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
589 xl_priv->srb = xl_priv->srb | readb(xl_mmio + MMIO_MACDATA) ;
590
591 #if XL_DEBUG
592 writel(IO_WORD_READ | SWITCHSETTINGS, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
593 if ( readw(xl_mmio + MMIO_MACDATA) & 2) {
594 printk(KERN_INFO "Default ring speed 4 mbps\n");
595 } else {
596 printk(KERN_INFO "Default ring speed 16 mbps\n");
597 }
598 printk(KERN_INFO "%s: xl_priv->srb = %04x\n",xl_priv->xl_card_name, xl_priv->srb);
599 #endif
600
601 return 0;
602 }
603
604 static int xl_open(struct net_device *dev)
605 {
606 struct xl_private *xl_priv=netdev_priv(dev);
607 u8 __iomem *xl_mmio = xl_priv->xl_mmio ;
608 u8 i ;
609 __le16 hwaddr[3] ; /* Should be u8[6] but we get word return values */
610 int open_err ;
611
612 u16 switchsettings, switchsettings_eeprom ;
613
614 if (request_irq(dev->irq, xl_interrupt, IRQF_SHARED , "3c359", dev))
615 return -EAGAIN;
616
617 /*
618 * Read the information from the EEPROM that we need.
619 */
620
621 hwaddr[0] = cpu_to_le16(xl_ee_read(dev,0x10));
622 hwaddr[1] = cpu_to_le16(xl_ee_read(dev,0x11));
623 hwaddr[2] = cpu_to_le16(xl_ee_read(dev,0x12));
624
625 /* Ring speed */
626
627 switchsettings_eeprom = xl_ee_read(dev,0x08) ;
628 switchsettings = switchsettings_eeprom ;
629
630 if (xl_priv->xl_ring_speed != 0) {
631 if (xl_priv->xl_ring_speed == 4)
632 switchsettings = switchsettings | 0x02 ;
633 else
634 switchsettings = switchsettings & ~0x02 ;
635 }
636
637 /* Only write EEProm if there has been a change */
638 if (switchsettings != switchsettings_eeprom) {
639 xl_ee_write(dev,0x08,switchsettings) ;
640 /* Hardware reset after changing EEProm */
641 xl_hw_reset(dev) ;
642 }
643
644 memcpy(dev->dev_addr,hwaddr,dev->addr_len) ;
645
646 open_err = xl_open_hw(dev) ;
647
648 /*
649 * This really needs to be cleaned up with better error reporting.
650 */
651
652 if (open_err != 0) { /* Something went wrong with the open command */
653 if (open_err & 0x07) { /* Wrong speed, retry at different speed */
654 printk(KERN_WARNING "%s: Open Error, retrying at different ringspeed\n", dev->name);
655 switchsettings = switchsettings ^ 2 ;
656 xl_ee_write(dev,0x08,switchsettings) ;
657 xl_hw_reset(dev) ;
658 open_err = xl_open_hw(dev) ;
659 if (open_err != 0) {
660 printk(KERN_WARNING "%s: Open error returned a second time, we're bombing out now\n", dev->name);
661 free_irq(dev->irq,dev) ;
662 return -ENODEV ;
663 }
664 } else {
665 printk(KERN_WARNING "%s: Open Error = %04x\n", dev->name, open_err) ;
666 free_irq(dev->irq,dev) ;
667 return -ENODEV ;
668 }
669 }
670
671 /*
672 * Now to set up the Rx and Tx buffer structures
673 */
674 /* These MUST be on 8 byte boundaries */
675 xl_priv->xl_tx_ring = kzalloc((sizeof(struct xl_tx_desc) * XL_TX_RING_SIZE) + 7, GFP_DMA | GFP_KERNEL);
676 if (xl_priv->xl_tx_ring == NULL) {
677 free_irq(dev->irq,dev);
678 return -ENOMEM;
679 }
680 xl_priv->xl_rx_ring = kzalloc((sizeof(struct xl_rx_desc) * XL_RX_RING_SIZE) +7, GFP_DMA | GFP_KERNEL);
681 if (xl_priv->xl_rx_ring == NULL) {
682 free_irq(dev->irq,dev);
683 kfree(xl_priv->xl_tx_ring);
684 return -ENOMEM;
685 }
686
687 /* Setup Rx Ring */
688 for (i=0 ; i < XL_RX_RING_SIZE ; i++) {
689 struct sk_buff *skb ;
690
691 skb = dev_alloc_skb(xl_priv->pkt_buf_sz) ;
692 if (skb==NULL)
693 break ;
694
695 skb->dev = dev ;
696 xl_priv->xl_rx_ring[i].upfragaddr = cpu_to_le32(pci_map_single(xl_priv->pdev, skb->data,xl_priv->pkt_buf_sz, PCI_DMA_FROMDEVICE));
697 xl_priv->xl_rx_ring[i].upfraglen = cpu_to_le32(xl_priv->pkt_buf_sz) | RXUPLASTFRAG;
698 xl_priv->rx_ring_skb[i] = skb ;
699 }
700
701 if (i==0) {
702 printk(KERN_WARNING "%s: Not enough memory to allocate rx buffers. Adapter disabled\n",dev->name);
703 free_irq(dev->irq,dev) ;
704 kfree(xl_priv->xl_tx_ring);
705 kfree(xl_priv->xl_rx_ring);
706 return -EIO ;
707 }
708
709 xl_priv->rx_ring_no = i ;
710 xl_priv->rx_ring_tail = 0 ;
711 xl_priv->rx_ring_dma_addr = pci_map_single(xl_priv->pdev,xl_priv->xl_rx_ring, sizeof(struct xl_rx_desc) * XL_RX_RING_SIZE, PCI_DMA_TODEVICE) ;
712 for (i=0;i<(xl_priv->rx_ring_no-1);i++) {
713 xl_priv->xl_rx_ring[i].upnextptr = cpu_to_le32(xl_priv->rx_ring_dma_addr + (sizeof (struct xl_rx_desc) * (i+1)));
714 }
715 xl_priv->xl_rx_ring[i].upnextptr = 0 ;
716
717 writel(xl_priv->rx_ring_dma_addr, xl_mmio + MMIO_UPLISTPTR) ;
718
719 /* Setup Tx Ring */
720
721 xl_priv->tx_ring_dma_addr = pci_map_single(xl_priv->pdev,xl_priv->xl_tx_ring, sizeof(struct xl_tx_desc) * XL_TX_RING_SIZE,PCI_DMA_TODEVICE) ;
722
723 xl_priv->tx_ring_head = 1 ;
724 xl_priv->tx_ring_tail = 255 ; /* Special marker for first packet */
725 xl_priv->free_ring_entries = XL_TX_RING_SIZE ;
726
727 /*
728 * Setup the first dummy DPD entry for polling to start working.
729 */
730
731 xl_priv->xl_tx_ring[0].framestartheader = TXDPDEMPTY;
732 xl_priv->xl_tx_ring[0].buffer = 0 ;
733 xl_priv->xl_tx_ring[0].buffer_length = 0 ;
734 xl_priv->xl_tx_ring[0].dnnextptr = 0 ;
735
736 writel(xl_priv->tx_ring_dma_addr, xl_mmio + MMIO_DNLISTPTR) ;
737 writel(DNUNSTALL, xl_mmio + MMIO_COMMAND) ;
738 writel(UPUNSTALL, xl_mmio + MMIO_COMMAND) ;
739 writel(DNENABLE, xl_mmio + MMIO_COMMAND) ;
740 writeb(0x40, xl_mmio + MMIO_DNPOLL) ;
741
742 /*
743 * Enable interrupts on the card
744 */
745
746 writel(SETINTENABLE | INT_MASK, xl_mmio + MMIO_COMMAND) ;
747 writel(SETINDENABLE | INT_MASK, xl_mmio + MMIO_COMMAND) ;
748
749 netif_start_queue(dev) ;
750 return 0;
751
752 }
753
754 static int xl_open_hw(struct net_device *dev)
755 {
756 struct xl_private *xl_priv=netdev_priv(dev);
757 u8 __iomem *xl_mmio = xl_priv->xl_mmio ;
758 u16 vsoff ;
759 char ver_str[33];
760 int open_err ;
761 int i ;
762 unsigned long t ;
763
764 /*
765 * Okay, let's build up the Open.NIC srb command
766 *
767 */
768
769 writel( (MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb), xl_mmio + MMIO_MAC_ACCESS_CMD) ;
770 writeb(OPEN_NIC, xl_mmio + MMIO_MACDATA) ;
771
772 /*
773 * Use this as a test byte, if it comes back with the same value, the command didn't work
774 */
775
776 writel( (MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb)+ 2, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
777 writeb(0xff,xl_mmio + MMIO_MACDATA) ;
778
779 /* Open options */
780 writel( (MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb) + 8, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
781 writeb(0x00, xl_mmio + MMIO_MACDATA) ;
782 writel( (MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb) + 9, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
783 writeb(0x00, xl_mmio + MMIO_MACDATA) ;
784
785 /*
786 * Node address, be careful here, the docs say you can just put zeros here and it will use
787 * the hardware address, it doesn't, you must include the node address in the open command.
788 */
789
790 if (xl_priv->xl_laa[0]) { /* If using a LAA address */
791 for (i=10;i<16;i++) {
792 writel( (MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb) + i, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
793 writeb(xl_priv->xl_laa[i-10],xl_mmio + MMIO_MACDATA) ;
794 }
795 memcpy(dev->dev_addr,xl_priv->xl_laa,dev->addr_len) ;
796 } else { /* Regular hardware address */
797 for (i=10;i<16;i++) {
798 writel( (MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb) + i, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
799 writeb(dev->dev_addr[i-10], xl_mmio + MMIO_MACDATA) ;
800 }
801 }
802
803 /* Default everything else to 0 */
804 for (i = 16; i < 34; i++) {
805 writel( (MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb) + i, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
806 writeb(0x00,xl_mmio + MMIO_MACDATA) ;
807 }
808
809 /*
810 * Set the csrb bit in the MISR register
811 */
812
813 xl_wait_misr_flags(dev) ;
814 writel(MEM_BYTE_WRITE | MF_CSRB, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
815 writeb(0xFF, xl_mmio + MMIO_MACDATA) ;
816 writel(MMIO_BYTE_WRITE | MISR_SET, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
817 writeb(MISR_CSRB , xl_mmio + MMIO_MACDATA) ;
818
819 /*
820 * Now wait for the command to run
821 */
822
823 t=jiffies;
824 while (! (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_SRB)) {
825 schedule();
826 if (time_after(jiffies, t + 40 * HZ)) {
827 printk(KERN_ERR "3COM 3C359 Velocity XL card not responding.\n");
828 break ;
829 }
830 }
831
832 /*
833 * Let's interpret the open response
834 */
835
836 writel( (MEM_BYTE_READ | 0xD0000 | xl_priv->srb)+2, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
837 if (readb(xl_mmio + MMIO_MACDATA)!=0) {
838 open_err = readb(xl_mmio + MMIO_MACDATA) << 8 ;
839 writel( (MEM_BYTE_READ | 0xD0000 | xl_priv->srb) + 7, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
840 open_err |= readb(xl_mmio + MMIO_MACDATA) ;
841 return open_err ;
842 } else {
843 writel( (MEM_WORD_READ | 0xD0000 | xl_priv->srb) + 8, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
844 xl_priv->asb = swab16(readw(xl_mmio + MMIO_MACDATA)) ;
845 printk(KERN_INFO "%s: Adapter Opened Details: ",dev->name) ;
846 printk("ASB: %04x",xl_priv->asb ) ;
847 writel( (MEM_WORD_READ | 0xD0000 | xl_priv->srb) + 10, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
848 printk(", SRB: %04x",swab16(readw(xl_mmio + MMIO_MACDATA)) ) ;
849
850 writel( (MEM_WORD_READ | 0xD0000 | xl_priv->srb) + 12, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
851 xl_priv->arb = swab16(readw(xl_mmio + MMIO_MACDATA)) ;
852 printk(", ARB: %04x\n",xl_priv->arb );
853 writel( (MEM_WORD_READ | 0xD0000 | xl_priv->srb) + 14, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
854 vsoff = swab16(readw(xl_mmio + MMIO_MACDATA)) ;
855
856 /*
857 * Interesting, sending the individual characters directly to printk was causing klogd to use
858 * use 100% of processor time, so we build up the string and print that instead.
859 */
860
861 for (i=0;i<0x20;i++) {
862 writel( (MEM_BYTE_READ | 0xD0000 | vsoff) + i, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
863 ver_str[i] = readb(xl_mmio + MMIO_MACDATA) ;
864 }
865 ver_str[i] = '\0' ;
866 printk(KERN_INFO "%s: Microcode version String: %s\n",dev->name,ver_str);
867 }
868
869 /*
870 * Issue the AckInterrupt
871 */
872 writew(ACK_INTERRUPT | SRBRACK | LATCH_ACK, xl_mmio + MMIO_COMMAND) ;
873
874 return 0 ;
875 }
876
877 /*
878 * There are two ways of implementing rx on the 359 NIC, either
879 * interrupt driven or polling. We are going to uses interrupts,
880 * it is the easier way of doing things.
881 *
882 * The Rx works with a ring of Rx descriptors. At initialise time the ring
883 * entries point to the next entry except for the last entry in the ring
884 * which points to 0. The card is programmed with the location of the first
885 * available descriptor and keeps reading the next_ptr until next_ptr is set
886 * to 0. Hopefully with a ring size of 16 the card will never get to read a next_ptr
887 * of 0. As the Rx interrupt is received we copy the frame up to the protocol layers
888 * and then point the end of the ring to our current position and point our current
889 * position to 0, therefore making the current position the last position on the ring.
890 * The last position on the ring therefore loops continually loops around the rx ring.
891 *
892 * rx_ring_tail is the position on the ring to process next. (Think of a snake, the head
893 * expands as the card adds new packets and we go around eating the tail processing the
894 * packets.)
895 *
896 * Undoubtably it could be streamlined and improved upon, but at the moment it works
897 * and the fast path through the routine is fine.
898 *
899 * adv_rx_ring could be inlined to increase performance, but its called a *lot* of times
900 * in xl_rx so would increase the size of the function significantly.
901 */
902
903 static void adv_rx_ring(struct net_device *dev) /* Advance rx_ring, cut down on bloat in xl_rx */
904 {
905 struct xl_private *xl_priv=netdev_priv(dev);
906 int n = xl_priv->rx_ring_tail;
907 int prev_ring_loc;
908
909 prev_ring_loc = (n + XL_RX_RING_SIZE - 1) & (XL_RX_RING_SIZE - 1);
910 xl_priv->xl_rx_ring[prev_ring_loc].upnextptr = cpu_to_le32(xl_priv->rx_ring_dma_addr + (sizeof (struct xl_rx_desc) * n));
911 xl_priv->xl_rx_ring[n].framestatus = 0;
912 xl_priv->xl_rx_ring[n].upnextptr = 0;
913 xl_priv->rx_ring_tail++;
914 xl_priv->rx_ring_tail &= (XL_RX_RING_SIZE-1);
915 }
916
917 static void xl_rx(struct net_device *dev)
918 {
919 struct xl_private *xl_priv=netdev_priv(dev);
920 u8 __iomem * xl_mmio = xl_priv->xl_mmio ;
921 struct sk_buff *skb, *skb2 ;
922 int frame_length = 0, copy_len = 0 ;
923 int temp_ring_loc ;
924
925 /*
926 * Receive the next frame, loop around the ring until all frames
927 * have been received.
928 */
929
930 while (xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].framestatus & (RXUPDCOMPLETE | RXUPDFULL) ) { /* Descriptor to process */
931
932 if (xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].framestatus & RXUPDFULL ) { /* UpdFull, Multiple Descriptors used for the frame */
933
934 /*
935 * This is a pain, you need to go through all the descriptors until the last one
936 * for this frame to find the framelength
937 */
938
939 temp_ring_loc = xl_priv->rx_ring_tail ;
940
941 while (xl_priv->xl_rx_ring[temp_ring_loc].framestatus & RXUPDFULL ) {
942 temp_ring_loc++ ;
943 temp_ring_loc &= (XL_RX_RING_SIZE-1) ;
944 }
945
946 frame_length = le32_to_cpu(xl_priv->xl_rx_ring[temp_ring_loc].framestatus) & 0x7FFF;
947
948 skb = dev_alloc_skb(frame_length) ;
949
950 if (skb==NULL) { /* No memory for frame, still need to roll forward the rx ring */
951 printk(KERN_WARNING "%s: dev_alloc_skb failed - multi buffer !\n", dev->name) ;
952 while (xl_priv->rx_ring_tail != temp_ring_loc)
953 adv_rx_ring(dev) ;
954
955 adv_rx_ring(dev) ; /* One more time just for luck :) */
956 dev->stats.rx_dropped++ ;
957
958 writel(ACK_INTERRUPT | UPCOMPACK | LATCH_ACK , xl_mmio + MMIO_COMMAND) ;
959 return ;
960 }
961
962 while (xl_priv->rx_ring_tail != temp_ring_loc) {
963 copy_len = le32_to_cpu(xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfraglen) & 0x7FFF;
964 frame_length -= copy_len ;
965 pci_dma_sync_single_for_cpu(xl_priv->pdev,le32_to_cpu(xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfragaddr),xl_priv->pkt_buf_sz,PCI_DMA_FROMDEVICE);
966 skb_copy_from_linear_data(xl_priv->rx_ring_skb[xl_priv->rx_ring_tail],
967 skb_put(skb, copy_len),
968 copy_len);
969 pci_dma_sync_single_for_device(xl_priv->pdev,le32_to_cpu(xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfragaddr),xl_priv->pkt_buf_sz,PCI_DMA_FROMDEVICE);
970 adv_rx_ring(dev) ;
971 }
972
973 /* Now we have found the last fragment */
974 pci_dma_sync_single_for_cpu(xl_priv->pdev,le32_to_cpu(xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfragaddr),xl_priv->pkt_buf_sz,PCI_DMA_FROMDEVICE);
975 skb_copy_from_linear_data(xl_priv->rx_ring_skb[xl_priv->rx_ring_tail],
976 skb_put(skb,copy_len), frame_length);
977 /* memcpy(skb_put(skb,frame_length), bus_to_virt(xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfragaddr), frame_length) ; */
978 pci_dma_sync_single_for_device(xl_priv->pdev,le32_to_cpu(xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfragaddr),xl_priv->pkt_buf_sz,PCI_DMA_FROMDEVICE);
979 adv_rx_ring(dev) ;
980 skb->protocol = tr_type_trans(skb,dev) ;
981 netif_rx(skb) ;
982
983 } else { /* Single Descriptor Used, simply swap buffers over, fast path */
984
985 frame_length = le32_to_cpu(xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].framestatus) & 0x7FFF;
986
987 skb = dev_alloc_skb(xl_priv->pkt_buf_sz) ;
988
989 if (skb==NULL) { /* Still need to fix the rx ring */
990 printk(KERN_WARNING "%s: dev_alloc_skb failed in rx, single buffer\n",dev->name);
991 adv_rx_ring(dev) ;
992 dev->stats.rx_dropped++ ;
993 writel(ACK_INTERRUPT | UPCOMPACK | LATCH_ACK , xl_mmio + MMIO_COMMAND) ;
994 return ;
995 }
996
997 skb2 = xl_priv->rx_ring_skb[xl_priv->rx_ring_tail] ;
998 pci_unmap_single(xl_priv->pdev, le32_to_cpu(xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfragaddr), xl_priv->pkt_buf_sz,PCI_DMA_FROMDEVICE) ;
999 skb_put(skb2, frame_length) ;
1000 skb2->protocol = tr_type_trans(skb2,dev) ;
1001
1002 xl_priv->rx_ring_skb[xl_priv->rx_ring_tail] = skb ;
1003 xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfragaddr = cpu_to_le32(pci_map_single(xl_priv->pdev,skb->data,xl_priv->pkt_buf_sz, PCI_DMA_FROMDEVICE));
1004 xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfraglen = cpu_to_le32(xl_priv->pkt_buf_sz) | RXUPLASTFRAG;
1005 adv_rx_ring(dev) ;
1006 dev->stats.rx_packets++ ;
1007 dev->stats.rx_bytes += frame_length ;
1008
1009 netif_rx(skb2) ;
1010 } /* if multiple buffers */
1011 } /* while packet to do */
1012
1013 /* Clear the updComplete interrupt */
1014 writel(ACK_INTERRUPT | UPCOMPACK | LATCH_ACK , xl_mmio + MMIO_COMMAND) ;
1015 return ;
1016 }
1017
1018 /*
1019 * This is ruthless, it doesn't care what state the card is in it will
1020 * completely reset the adapter.
1021 */
1022
1023 static void xl_reset(struct net_device *dev)
1024 {
1025 struct xl_private *xl_priv=netdev_priv(dev);
1026 u8 __iomem * xl_mmio = xl_priv->xl_mmio ;
1027 unsigned long t;
1028
1029 writew( GLOBAL_RESET, xl_mmio + MMIO_COMMAND ) ;
1030
1031 /*
1032 * Must wait for cmdInProgress bit (12) to clear before continuing with
1033 * card configuration.
1034 */
1035
1036 t=jiffies;
1037 while (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_CMD_IN_PROGRESS) {
1038 if (time_after(jiffies, t + 40 * HZ)) {
1039 printk(KERN_ERR "3COM 3C359 Velocity XL card not responding.\n");
1040 break ;
1041 }
1042 }
1043
1044 }
1045
1046 static void xl_freemem(struct net_device *dev)
1047 {
1048 struct xl_private *xl_priv=netdev_priv(dev);
1049 int i ;
1050
1051 for (i=0;i<XL_RX_RING_SIZE;i++) {
1052 dev_kfree_skb_irq(xl_priv->rx_ring_skb[xl_priv->rx_ring_tail]) ;
1053 pci_unmap_single(xl_priv->pdev,le32_to_cpu(xl_priv->xl_rx_ring[xl_priv->rx_ring_tail].upfragaddr),xl_priv->pkt_buf_sz, PCI_DMA_FROMDEVICE);
1054 xl_priv->rx_ring_tail++ ;
1055 xl_priv->rx_ring_tail &= XL_RX_RING_SIZE-1;
1056 }
1057
1058 /* unmap ring */
1059 pci_unmap_single(xl_priv->pdev,xl_priv->rx_ring_dma_addr, sizeof(struct xl_rx_desc) * XL_RX_RING_SIZE, PCI_DMA_FROMDEVICE) ;
1060
1061 pci_unmap_single(xl_priv->pdev,xl_priv->tx_ring_dma_addr, sizeof(struct xl_tx_desc) * XL_TX_RING_SIZE, PCI_DMA_TODEVICE) ;
1062
1063 kfree(xl_priv->xl_rx_ring) ;
1064 kfree(xl_priv->xl_tx_ring) ;
1065
1066 return ;
1067 }
1068
1069 static irqreturn_t xl_interrupt(int irq, void *dev_id)
1070 {
1071 struct net_device *dev = (struct net_device *)dev_id;
1072 struct xl_private *xl_priv =netdev_priv(dev);
1073 u8 __iomem * xl_mmio = xl_priv->xl_mmio ;
1074 u16 intstatus, macstatus ;
1075
1076 intstatus = readw(xl_mmio + MMIO_INTSTATUS) ;
1077
1078 if (!(intstatus & 1)) /* We didn't generate the interrupt */
1079 return IRQ_NONE;
1080
1081 spin_lock(&xl_priv->xl_lock) ;
1082
1083 /*
1084 * Process the interrupt
1085 */
1086 /*
1087 * Something fishy going on here, we shouldn't get 0001 ints, not fatal though.
1088 */
1089 if (intstatus == 0x0001) {
1090 writel(ACK_INTERRUPT | LATCH_ACK, xl_mmio + MMIO_COMMAND) ;
1091 printk(KERN_INFO "%s: 00001 int received\n",dev->name);
1092 } else {
1093 if (intstatus & (HOSTERRINT | SRBRINT | ARBCINT | UPCOMPINT | DNCOMPINT | HARDERRINT | (1<<8) | TXUNDERRUN | ASBFINT)) {
1094
1095 /*
1096 * Host Error.
1097 * It may be possible to recover from this, but usually it means something
1098 * is seriously fubar, so we just close the adapter.
1099 */
1100
1101 if (intstatus & HOSTERRINT) {
1102 printk(KERN_WARNING "%s: Host Error, performing global reset, intstatus = %04x\n",dev->name,intstatus);
1103 writew( GLOBAL_RESET, xl_mmio + MMIO_COMMAND ) ;
1104 printk(KERN_WARNING "%s: Resetting hardware:\n", dev->name);
1105 netif_stop_queue(dev) ;
1106 xl_freemem(dev) ;
1107 free_irq(dev->irq,dev);
1108 xl_reset(dev) ;
1109 writel(ACK_INTERRUPT | LATCH_ACK, xl_mmio + MMIO_COMMAND) ;
1110 spin_unlock(&xl_priv->xl_lock) ;
1111 return IRQ_HANDLED;
1112 } /* Host Error */
1113
1114 if (intstatus & SRBRINT ) { /* Srbc interrupt */
1115 writel(ACK_INTERRUPT | SRBRACK | LATCH_ACK, xl_mmio + MMIO_COMMAND) ;
1116 if (xl_priv->srb_queued)
1117 xl_srb_bh(dev) ;
1118 } /* SRBR Interrupt */
1119
1120 if (intstatus & TXUNDERRUN) { /* Issue DnReset command */
1121 writel(DNRESET, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1122 while (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_CMD_IN_PROGRESS) { /* Wait for command to run */
1123 /* !!! FIX-ME !!!!
1124 Must put a timeout check here ! */
1125 /* Empty Loop */
1126 }
1127 printk(KERN_WARNING "%s: TX Underrun received\n",dev->name);
1128 writel(ACK_INTERRUPT | LATCH_ACK, xl_mmio + MMIO_COMMAND) ;
1129 } /* TxUnderRun */
1130
1131 if (intstatus & ARBCINT ) { /* Arbc interrupt */
1132 xl_arb_cmd(dev) ;
1133 } /* Arbc */
1134
1135 if (intstatus & ASBFINT) {
1136 if (xl_priv->asb_queued == 1) {
1137 xl_asb_cmd(dev) ;
1138 } else if (xl_priv->asb_queued == 2) {
1139 xl_asb_bh(dev) ;
1140 } else {
1141 writel(ACK_INTERRUPT | LATCH_ACK | ASBFACK, xl_mmio + MMIO_COMMAND) ;
1142 }
1143 } /* Asbf */
1144
1145 if (intstatus & UPCOMPINT ) /* UpComplete */
1146 xl_rx(dev) ;
1147
1148 if (intstatus & DNCOMPINT ) /* DnComplete */
1149 xl_dn_comp(dev) ;
1150
1151 if (intstatus & HARDERRINT ) { /* Hardware error */
1152 writel(MMIO_WORD_READ | MACSTATUS, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1153 macstatus = readw(xl_mmio + MMIO_MACDATA) ;
1154 printk(KERN_WARNING "%s: MacStatusError, details: ", dev->name);
1155 if (macstatus & (1<<14))
1156 printk(KERN_WARNING "tchk error: Unrecoverable error\n");
1157 if (macstatus & (1<<3))
1158 printk(KERN_WARNING "eint error: Internal watchdog timer expired\n");
1159 if (macstatus & (1<<2))
1160 printk(KERN_WARNING "aint error: Host tried to perform invalid operation\n");
1161 printk(KERN_WARNING "Instatus = %02x, macstatus = %02x\n",intstatus,macstatus) ;
1162 printk(KERN_WARNING "%s: Resetting hardware:\n", dev->name);
1163 netif_stop_queue(dev) ;
1164 xl_freemem(dev) ;
1165 free_irq(dev->irq,dev);
1166 unregister_netdev(dev) ;
1167 free_netdev(dev) ;
1168 xl_reset(dev) ;
1169 writel(ACK_INTERRUPT | LATCH_ACK, xl_mmio + MMIO_COMMAND) ;
1170 spin_unlock(&xl_priv->xl_lock) ;
1171 return IRQ_HANDLED;
1172 }
1173 } else {
1174 printk(KERN_WARNING "%s: Received Unknown interrupt : %04x\n", dev->name, intstatus);
1175 writel(ACK_INTERRUPT | LATCH_ACK, xl_mmio + MMIO_COMMAND) ;
1176 }
1177 }
1178
1179 /* Turn interrupts back on */
1180
1181 writel( SETINDENABLE | INT_MASK, xl_mmio + MMIO_COMMAND) ;
1182 writel( SETINTENABLE | INT_MASK, xl_mmio + MMIO_COMMAND) ;
1183
1184 spin_unlock(&xl_priv->xl_lock) ;
1185 return IRQ_HANDLED;
1186 }
1187
1188 /*
1189 * Tx - Polling configuration
1190 */
1191
1192 static netdev_tx_t xl_xmit(struct sk_buff *skb, struct net_device *dev)
1193 {
1194 struct xl_private *xl_priv=netdev_priv(dev);
1195 struct xl_tx_desc *txd ;
1196 int tx_head, tx_tail, tx_prev ;
1197 unsigned long flags ;
1198
1199 spin_lock_irqsave(&xl_priv->xl_lock,flags) ;
1200
1201 netif_stop_queue(dev) ;
1202
1203 if (xl_priv->free_ring_entries > 1 ) {
1204 /*
1205 * Set up the descriptor for the packet
1206 */
1207 tx_head = xl_priv->tx_ring_head ;
1208 tx_tail = xl_priv->tx_ring_tail ;
1209
1210 txd = &(xl_priv->xl_tx_ring[tx_head]) ;
1211 txd->dnnextptr = 0 ;
1212 txd->framestartheader = cpu_to_le32(skb->len) | TXDNINDICATE;
1213 txd->buffer = cpu_to_le32(pci_map_single(xl_priv->pdev, skb->data, skb->len, PCI_DMA_TODEVICE));
1214 txd->buffer_length = cpu_to_le32(skb->len) | TXDNFRAGLAST;
1215 xl_priv->tx_ring_skb[tx_head] = skb ;
1216 dev->stats.tx_packets++ ;
1217 dev->stats.tx_bytes += skb->len ;
1218
1219 /*
1220 * Set the nextptr of the previous descriptor equal to this descriptor, add XL_TX_RING_SIZE -1
1221 * to ensure no negative numbers in unsigned locations.
1222 */
1223
1224 tx_prev = (xl_priv->tx_ring_head + XL_TX_RING_SIZE - 1) & (XL_TX_RING_SIZE - 1) ;
1225
1226 xl_priv->tx_ring_head++ ;
1227 xl_priv->tx_ring_head &= (XL_TX_RING_SIZE - 1) ;
1228 xl_priv->free_ring_entries-- ;
1229
1230 xl_priv->xl_tx_ring[tx_prev].dnnextptr = cpu_to_le32(xl_priv->tx_ring_dma_addr + (sizeof (struct xl_tx_desc) * tx_head));
1231
1232 /* Sneaky, by doing a read on DnListPtr we can force the card to poll on the DnNextPtr */
1233 /* readl(xl_mmio + MMIO_DNLISTPTR) ; */
1234
1235 netif_wake_queue(dev) ;
1236
1237 spin_unlock_irqrestore(&xl_priv->xl_lock,flags) ;
1238
1239 return NETDEV_TX_OK;
1240 } else {
1241 spin_unlock_irqrestore(&xl_priv->xl_lock,flags) ;
1242 return NETDEV_TX_BUSY;
1243 }
1244
1245 }
1246
1247 /*
1248 * The NIC has told us that a packet has been downloaded onto the card, we must
1249 * find out which packet it has done, clear the skb and information for the packet
1250 * then advance around the ring for all transmitted packets
1251 */
1252
1253 static void xl_dn_comp(struct net_device *dev)
1254 {
1255 struct xl_private *xl_priv=netdev_priv(dev);
1256 u8 __iomem * xl_mmio = xl_priv->xl_mmio ;
1257 struct xl_tx_desc *txd ;
1258
1259
1260 if (xl_priv->tx_ring_tail == 255) {/* First time */
1261 xl_priv->xl_tx_ring[0].framestartheader = 0 ;
1262 xl_priv->xl_tx_ring[0].dnnextptr = 0 ;
1263 xl_priv->tx_ring_tail = 1 ;
1264 }
1265
1266 while (xl_priv->xl_tx_ring[xl_priv->tx_ring_tail].framestartheader & TXDNCOMPLETE ) {
1267 txd = &(xl_priv->xl_tx_ring[xl_priv->tx_ring_tail]) ;
1268 pci_unmap_single(xl_priv->pdev, le32_to_cpu(txd->buffer), xl_priv->tx_ring_skb[xl_priv->tx_ring_tail]->len, PCI_DMA_TODEVICE);
1269 txd->framestartheader = 0 ;
1270 txd->buffer = cpu_to_le32(0xdeadbeef);
1271 txd->buffer_length = 0 ;
1272 dev_kfree_skb_irq(xl_priv->tx_ring_skb[xl_priv->tx_ring_tail]) ;
1273 xl_priv->tx_ring_tail++ ;
1274 xl_priv->tx_ring_tail &= (XL_TX_RING_SIZE - 1) ;
1275 xl_priv->free_ring_entries++ ;
1276 }
1277
1278 netif_wake_queue(dev) ;
1279
1280 writel(ACK_INTERRUPT | DNCOMPACK | LATCH_ACK , xl_mmio + MMIO_COMMAND) ;
1281 }
1282
1283 /*
1284 * Close the adapter properly.
1285 * This srb reply cannot be handled from interrupt context as we have
1286 * to free the interrupt from the driver.
1287 */
1288
1289 static int xl_close(struct net_device *dev)
1290 {
1291 struct xl_private *xl_priv = netdev_priv(dev);
1292 u8 __iomem * xl_mmio = xl_priv->xl_mmio ;
1293 unsigned long t ;
1294
1295 netif_stop_queue(dev) ;
1296
1297 /*
1298 * Close the adapter, need to stall the rx and tx queues.
1299 */
1300
1301 writew(DNSTALL, xl_mmio + MMIO_COMMAND) ;
1302 t=jiffies;
1303 while (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_CMD_IN_PROGRESS) {
1304 schedule();
1305 if (time_after(jiffies, t + 10 * HZ)) {
1306 printk(KERN_ERR "%s: 3COM 3C359 Velocity XL-DNSTALL not responding.\n", dev->name);
1307 break ;
1308 }
1309 }
1310 writew(DNDISABLE, xl_mmio + MMIO_COMMAND) ;
1311 t=jiffies;
1312 while (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_CMD_IN_PROGRESS) {
1313 schedule();
1314 if (time_after(jiffies, t + 10 * HZ)) {
1315 printk(KERN_ERR "%s: 3COM 3C359 Velocity XL-DNDISABLE not responding.\n", dev->name);
1316 break ;
1317 }
1318 }
1319 writew(UPSTALL, xl_mmio + MMIO_COMMAND) ;
1320 t=jiffies;
1321 while (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_CMD_IN_PROGRESS) {
1322 schedule();
1323 if (time_after(jiffies, t + 10 * HZ)) {
1324 printk(KERN_ERR "%s: 3COM 3C359 Velocity XL-UPSTALL not responding.\n", dev->name);
1325 break ;
1326 }
1327 }
1328
1329 /* Turn off interrupts, we will still get the indication though
1330 * so we can trap it
1331 */
1332
1333 writel(SETINTENABLE, xl_mmio + MMIO_COMMAND) ;
1334
1335 xl_srb_cmd(dev,CLOSE_NIC) ;
1336
1337 t=jiffies;
1338 while (!(readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_SRB)) {
1339 schedule();
1340 if (time_after(jiffies, t + 10 * HZ)) {
1341 printk(KERN_ERR "%s: 3COM 3C359 Velocity XL-CLOSENIC not responding.\n", dev->name);
1342 break ;
1343 }
1344 }
1345 /* Read the srb response from the adapter */
1346
1347 writel(MEM_BYTE_READ | 0xd0000 | xl_priv->srb, xl_mmio + MMIO_MAC_ACCESS_CMD);
1348 if (readb(xl_mmio + MMIO_MACDATA) != CLOSE_NIC) {
1349 printk(KERN_INFO "%s: CLOSE_NIC did not get a CLOSE_NIC response\n",dev->name);
1350 } else {
1351 writel((MEM_BYTE_READ | 0xd0000 | xl_priv->srb) +2, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1352 if (readb(xl_mmio + MMIO_MACDATA)==0) {
1353 printk(KERN_INFO "%s: Adapter has been closed\n",dev->name);
1354 writew(ACK_INTERRUPT | SRBRACK | LATCH_ACK, xl_mmio + MMIO_COMMAND) ;
1355
1356 xl_freemem(dev) ;
1357 free_irq(dev->irq,dev) ;
1358 } else {
1359 printk(KERN_INFO "%s: Close nic command returned error code %02x\n",dev->name, readb(xl_mmio + MMIO_MACDATA)) ;
1360 }
1361 }
1362
1363 /* Reset the upload and download logic */
1364
1365 writew(UPRESET, xl_mmio + MMIO_COMMAND) ;
1366 t=jiffies;
1367 while (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_CMD_IN_PROGRESS) {
1368 schedule();
1369 if (time_after(jiffies, t + 10 * HZ)) {
1370 printk(KERN_ERR "%s: 3COM 3C359 Velocity XL-UPRESET not responding.\n", dev->name);
1371 break ;
1372 }
1373 }
1374 writew(DNRESET, xl_mmio + MMIO_COMMAND) ;
1375 t=jiffies;
1376 while (readw(xl_mmio + MMIO_INTSTATUS) & INTSTAT_CMD_IN_PROGRESS) {
1377 schedule();
1378 if (time_after(jiffies, t + 10 * HZ)) {
1379 printk(KERN_ERR "%s: 3COM 3C359 Velocity XL-DNRESET not responding.\n", dev->name);
1380 break ;
1381 }
1382 }
1383 xl_hw_reset(dev) ;
1384 return 0 ;
1385 }
1386
1387 static void xl_set_rx_mode(struct net_device *dev)
1388 {
1389 struct xl_private *xl_priv = netdev_priv(dev);
1390 struct netdev_hw_addr *ha;
1391 unsigned char dev_mc_address[4] ;
1392 u16 options ;
1393
1394 if (dev->flags & IFF_PROMISC)
1395 options = 0x0004 ;
1396 else
1397 options = 0x0000 ;
1398
1399 if (options ^ xl_priv->xl_copy_all_options) { /* Changed, must send command */
1400 xl_priv->xl_copy_all_options = options ;
1401 xl_srb_cmd(dev, SET_RECEIVE_MODE) ;
1402 return ;
1403 }
1404
1405 dev_mc_address[0] = dev_mc_address[1] = dev_mc_address[2] = dev_mc_address[3] = 0 ;
1406
1407 netdev_for_each_mc_addr(ha, dev) {
1408 dev_mc_address[0] |= ha->addr[2];
1409 dev_mc_address[1] |= ha->addr[3];
1410 dev_mc_address[2] |= ha->addr[4];
1411 dev_mc_address[3] |= ha->addr[5];
1412 }
1413
1414 if (memcmp(xl_priv->xl_functional_addr,dev_mc_address,4) != 0) { /* Options have changed, run the command */
1415 memcpy(xl_priv->xl_functional_addr, dev_mc_address,4) ;
1416 xl_srb_cmd(dev, SET_FUNC_ADDRESS) ;
1417 }
1418 return ;
1419 }
1420
1421
1422 /*
1423 * We issued an srb command and now we must read
1424 * the response from the completed command.
1425 */
1426
1427 static void xl_srb_bh(struct net_device *dev)
1428 {
1429 struct xl_private *xl_priv = netdev_priv(dev);
1430 u8 __iomem * xl_mmio = xl_priv->xl_mmio ;
1431 u8 srb_cmd, ret_code ;
1432 int i ;
1433
1434 writel(MEM_BYTE_READ | 0xd0000 | xl_priv->srb, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1435 srb_cmd = readb(xl_mmio + MMIO_MACDATA) ;
1436 writel((MEM_BYTE_READ | 0xd0000 | xl_priv->srb) +2, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1437 ret_code = readb(xl_mmio + MMIO_MACDATA) ;
1438
1439 /* Ret_code is standard across all commands */
1440
1441 switch (ret_code) {
1442 case 1:
1443 printk(KERN_INFO "%s: Command: %d - Invalid Command code\n",dev->name,srb_cmd) ;
1444 break ;
1445 case 4:
1446 printk(KERN_INFO "%s: Command: %d - Adapter is closed, must be open for this command\n",dev->name,srb_cmd);
1447 break ;
1448
1449 case 6:
1450 printk(KERN_INFO "%s: Command: %d - Options Invalid for command\n",dev->name,srb_cmd);
1451 break ;
1452
1453 case 0: /* Successful command execution */
1454 switch (srb_cmd) {
1455 case READ_LOG: /* Returns 14 bytes of data from the NIC */
1456 if(xl_priv->xl_message_level)
1457 printk(KERN_INFO "%s: READ.LOG 14 bytes of data ",dev->name) ;
1458 /*
1459 * We still have to read the log even if message_level = 0 and we don't want
1460 * to see it
1461 */
1462 for (i=0;i<14;i++) {
1463 writel(MEM_BYTE_READ | 0xd0000 | xl_priv->srb | i, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1464 if(xl_priv->xl_message_level)
1465 printk("%02x:",readb(xl_mmio + MMIO_MACDATA)) ;
1466 }
1467 printk("\n") ;
1468 break ;
1469 case SET_FUNC_ADDRESS:
1470 if(xl_priv->xl_message_level)
1471 printk(KERN_INFO "%s: Functional Address Set\n",dev->name);
1472 break ;
1473 case CLOSE_NIC:
1474 if(xl_priv->xl_message_level)
1475 printk(KERN_INFO "%s: Received CLOSE_NIC interrupt in interrupt handler\n",dev->name);
1476 break ;
1477 case SET_MULTICAST_MODE:
1478 if(xl_priv->xl_message_level)
1479 printk(KERN_INFO "%s: Multicast options successfully changed\n",dev->name) ;
1480 break ;
1481 case SET_RECEIVE_MODE:
1482 if(xl_priv->xl_message_level) {
1483 if (xl_priv->xl_copy_all_options == 0x0004)
1484 printk(KERN_INFO "%s: Entering promiscuous mode\n", dev->name);
1485 else
1486 printk(KERN_INFO "%s: Entering normal receive mode\n",dev->name);
1487 }
1488 break ;
1489
1490 } /* switch */
1491 break ;
1492 } /* switch */
1493 return ;
1494 }
1495
1496 static int xl_set_mac_address (struct net_device *dev, void *addr)
1497 {
1498 struct sockaddr *saddr = addr ;
1499 struct xl_private *xl_priv = netdev_priv(dev);
1500
1501 if (netif_running(dev)) {
1502 printk(KERN_WARNING "%s: Cannot set mac/laa address while card is open\n", dev->name) ;
1503 return -EIO ;
1504 }
1505
1506 memcpy(xl_priv->xl_laa, saddr->sa_data,dev->addr_len) ;
1507
1508 if (xl_priv->xl_message_level) {
1509 printk(KERN_INFO "%s: MAC/LAA Set to = %x.%x.%x.%x.%x.%x\n",dev->name, xl_priv->xl_laa[0],
1510 xl_priv->xl_laa[1], xl_priv->xl_laa[2],
1511 xl_priv->xl_laa[3], xl_priv->xl_laa[4],
1512 xl_priv->xl_laa[5]);
1513 }
1514
1515 return 0 ;
1516 }
1517
1518 static void xl_arb_cmd(struct net_device *dev)
1519 {
1520 struct xl_private *xl_priv = netdev_priv(dev);
1521 u8 __iomem * xl_mmio = xl_priv->xl_mmio ;
1522 u8 arb_cmd ;
1523 u16 lan_status, lan_status_diff ;
1524
1525 writel( ( MEM_BYTE_READ | 0xD0000 | xl_priv->arb), xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1526 arb_cmd = readb(xl_mmio + MMIO_MACDATA) ;
1527
1528 if (arb_cmd == RING_STATUS_CHANGE) { /* Ring.Status.Change */
1529 writel( ( (MEM_WORD_READ | 0xD0000 | xl_priv->arb) + 6), xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1530
1531 printk(KERN_INFO "%s: Ring Status Change: New Status = %04x\n", dev->name, swab16(readw(xl_mmio + MMIO_MACDATA) )) ;
1532
1533 lan_status = swab16(readw(xl_mmio + MMIO_MACDATA));
1534
1535 /* Acknowledge interrupt, this tells nic we are done with the arb */
1536 writel(ACK_INTERRUPT | ARBCACK | LATCH_ACK, xl_mmio + MMIO_COMMAND) ;
1537
1538 lan_status_diff = xl_priv->xl_lan_status ^ lan_status ;
1539
1540 if (lan_status_diff & (LSC_LWF | LSC_ARW | LSC_FPE | LSC_RR) ) {
1541 if (lan_status_diff & LSC_LWF)
1542 printk(KERN_WARNING "%s: Short circuit detected on the lobe\n",dev->name);
1543 if (lan_status_diff & LSC_ARW)
1544 printk(KERN_WARNING "%s: Auto removal error\n",dev->name);
1545 if (lan_status_diff & LSC_FPE)
1546 printk(KERN_WARNING "%s: FDX Protocol Error\n",dev->name);
1547 if (lan_status_diff & LSC_RR)
1548 printk(KERN_WARNING "%s: Force remove MAC frame received\n",dev->name);
1549
1550 /* Adapter has been closed by the hardware */
1551
1552 netif_stop_queue(dev);
1553 xl_freemem(dev) ;
1554 free_irq(dev->irq,dev);
1555
1556 printk(KERN_WARNING "%s: Adapter has been closed\n", dev->name);
1557 } /* If serious error */
1558
1559 if (xl_priv->xl_message_level) {
1560 if (lan_status_diff & LSC_SIG_LOSS)
1561 printk(KERN_WARNING "%s: No receive signal detected\n", dev->name);
1562 if (lan_status_diff & LSC_HARD_ERR)
1563 printk(KERN_INFO "%s: Beaconing\n",dev->name);
1564 if (lan_status_diff & LSC_SOFT_ERR)
1565 printk(KERN_WARNING "%s: Adapter transmitted Soft Error Report Mac Frame\n",dev->name);
1566 if (lan_status_diff & LSC_TRAN_BCN)
1567 printk(KERN_INFO "%s: We are transmitting the beacon, aaah\n",dev->name);
1568 if (lan_status_diff & LSC_SS)
1569 printk(KERN_INFO "%s: Single Station on the ring\n", dev->name);
1570 if (lan_status_diff & LSC_RING_REC)
1571 printk(KERN_INFO "%s: Ring recovery ongoing\n",dev->name);
1572 if (lan_status_diff & LSC_FDX_MODE)
1573 printk(KERN_INFO "%s: Operating in FDX mode\n",dev->name);
1574 }
1575
1576 if (lan_status_diff & LSC_CO) {
1577 if (xl_priv->xl_message_level)
1578 printk(KERN_INFO "%s: Counter Overflow\n", dev->name);
1579 /* Issue READ.LOG command */
1580 xl_srb_cmd(dev, READ_LOG) ;
1581 }
1582
1583 /* There is no command in the tech docs to issue the read_sr_counters */
1584 if (lan_status_diff & LSC_SR_CO) {
1585 if (xl_priv->xl_message_level)
1586 printk(KERN_INFO "%s: Source routing counters overflow\n", dev->name);
1587 }
1588
1589 xl_priv->xl_lan_status = lan_status ;
1590
1591 } /* Lan.change.status */
1592 else if ( arb_cmd == RECEIVE_DATA) { /* Received.Data */
1593 #if XL_DEBUG
1594 printk(KERN_INFO "Received.Data\n");
1595 #endif
1596 writel( ((MEM_WORD_READ | 0xD0000 | xl_priv->arb) + 6), xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1597 xl_priv->mac_buffer = swab16(readw(xl_mmio + MMIO_MACDATA)) ;
1598
1599 /* Now we are going to be really basic here and not do anything
1600 * with the data at all. The tech docs do not give me enough
1601 * information to calculate the buffers properly so we're
1602 * just going to tell the nic that we've dealt with the frame
1603 * anyway.
1604 */
1605
1606 /* Acknowledge interrupt, this tells nic we are done with the arb */
1607 writel(ACK_INTERRUPT | ARBCACK | LATCH_ACK, xl_mmio + MMIO_COMMAND) ;
1608
1609 /* Is the ASB free ? */
1610
1611 xl_priv->asb_queued = 0 ;
1612 writel( ((MEM_BYTE_READ | 0xD0000 | xl_priv->asb) + 2), xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1613 if (readb(xl_mmio + MMIO_MACDATA) != 0xff) {
1614 xl_priv->asb_queued = 1 ;
1615
1616 xl_wait_misr_flags(dev) ;
1617
1618 writel(MEM_BYTE_WRITE | MF_ASBFR, xl_mmio + MMIO_MAC_ACCESS_CMD);
1619 writeb(0xff, xl_mmio + MMIO_MACDATA) ;
1620 writel(MMIO_BYTE_WRITE | MISR_SET, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1621 writeb(MISR_ASBFR, xl_mmio + MMIO_MACDATA) ;
1622 return ;
1623 /* Drop out and wait for the bottom half to be run */
1624 }
1625
1626 xl_asb_cmd(dev) ;
1627
1628 } else {
1629 printk(KERN_WARNING "%s: Received unknown arb (xl_priv) command: %02x\n",dev->name,arb_cmd);
1630 }
1631
1632 /* Acknowledge the arb interrupt */
1633
1634 writel(ACK_INTERRUPT | ARBCACK | LATCH_ACK , xl_mmio + MMIO_COMMAND) ;
1635
1636 return ;
1637 }
1638
1639
1640 /*
1641 * There is only one asb command, but we can get called from different
1642 * places.
1643 */
1644
1645 static void xl_asb_cmd(struct net_device *dev)
1646 {
1647 struct xl_private *xl_priv = netdev_priv(dev);
1648 u8 __iomem * xl_mmio = xl_priv->xl_mmio ;
1649
1650 if (xl_priv->asb_queued == 1)
1651 writel(ACK_INTERRUPT | LATCH_ACK | ASBFACK, xl_mmio + MMIO_COMMAND) ;
1652
1653 writel(MEM_BYTE_WRITE | 0xd0000 | xl_priv->asb, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1654 writeb(0x81, xl_mmio + MMIO_MACDATA) ;
1655
1656 writel(MEM_WORD_WRITE | 0xd0000 | xl_priv->asb | 6, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1657 writew(swab16(xl_priv->mac_buffer), xl_mmio + MMIO_MACDATA) ;
1658
1659 xl_wait_misr_flags(dev) ;
1660
1661 writel(MEM_BYTE_WRITE | MF_RASB, xl_mmio + MMIO_MAC_ACCESS_CMD);
1662 writeb(0xff, xl_mmio + MMIO_MACDATA) ;
1663
1664 writel(MMIO_BYTE_WRITE | MISR_SET, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1665 writeb(MISR_RASB, xl_mmio + MMIO_MACDATA) ;
1666
1667 xl_priv->asb_queued = 2 ;
1668
1669 return ;
1670 }
1671
1672 /*
1673 * This will only get called if there was an error
1674 * from the asb cmd.
1675 */
1676 static void xl_asb_bh(struct net_device *dev)
1677 {
1678 struct xl_private *xl_priv = netdev_priv(dev);
1679 u8 __iomem * xl_mmio = xl_priv->xl_mmio ;
1680 u8 ret_code ;
1681
1682 writel(MMIO_BYTE_READ | 0xd0000 | xl_priv->asb | 2, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1683 ret_code = readb(xl_mmio + MMIO_MACDATA) ;
1684 switch (ret_code) {
1685 case 0x01:
1686 printk(KERN_INFO "%s: ASB Command, unrecognized command code\n",dev->name);
1687 break ;
1688 case 0x26:
1689 printk(KERN_INFO "%s: ASB Command, unexpected receive buffer\n", dev->name);
1690 break ;
1691 case 0x40:
1692 printk(KERN_INFO "%s: ASB Command, Invalid Station ID\n", dev->name);
1693 break ;
1694 }
1695 xl_priv->asb_queued = 0 ;
1696 writel(ACK_INTERRUPT | LATCH_ACK | ASBFACK, xl_mmio + MMIO_COMMAND) ;
1697 return ;
1698 }
1699
1700 /*
1701 * Issue srb commands to the nic
1702 */
1703
1704 static void xl_srb_cmd(struct net_device *dev, int srb_cmd)
1705 {
1706 struct xl_private *xl_priv = netdev_priv(dev);
1707 u8 __iomem * xl_mmio = xl_priv->xl_mmio ;
1708
1709 switch (srb_cmd) {
1710 case READ_LOG:
1711 writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1712 writeb(READ_LOG, xl_mmio + MMIO_MACDATA) ;
1713 break;
1714
1715 case CLOSE_NIC:
1716 writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1717 writeb(CLOSE_NIC, xl_mmio + MMIO_MACDATA) ;
1718 break ;
1719
1720 case SET_RECEIVE_MODE:
1721 writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1722 writeb(SET_RECEIVE_MODE, xl_mmio + MMIO_MACDATA) ;
1723 writel(MEM_WORD_WRITE | 0xD0000 | xl_priv->srb | 4, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1724 writew(xl_priv->xl_copy_all_options, xl_mmio + MMIO_MACDATA) ;
1725 break ;
1726
1727 case SET_FUNC_ADDRESS:
1728 writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1729 writeb(SET_FUNC_ADDRESS, xl_mmio + MMIO_MACDATA) ;
1730 writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb | 6 , xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1731 writeb(xl_priv->xl_functional_addr[0], xl_mmio + MMIO_MACDATA) ;
1732 writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb | 7 , xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1733 writeb(xl_priv->xl_functional_addr[1], xl_mmio + MMIO_MACDATA) ;
1734 writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb | 8 , xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1735 writeb(xl_priv->xl_functional_addr[2], xl_mmio + MMIO_MACDATA) ;
1736 writel(MEM_BYTE_WRITE | 0xD0000 | xl_priv->srb | 9 , xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1737 writeb(xl_priv->xl_functional_addr[3], xl_mmio + MMIO_MACDATA) ;
1738 break ;
1739 } /* switch */
1740
1741
1742 xl_wait_misr_flags(dev) ;
1743
1744 /* Write 0xff to the CSRB flag */
1745 writel(MEM_BYTE_WRITE | MF_CSRB , xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1746 writeb(0xFF, xl_mmio + MMIO_MACDATA) ;
1747 /* Set csrb bit in MISR register to process command */
1748 writel(MMIO_BYTE_WRITE | MISR_SET, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1749 writeb(MISR_CSRB, xl_mmio + MMIO_MACDATA) ;
1750 xl_priv->srb_queued = 1 ;
1751
1752 return ;
1753 }
1754
1755 /*
1756 * This is nasty, to use the MISR command you have to wait for 6 memory locations
1757 * to be zero. This is the way the driver does on other OS'es so we should be ok with
1758 * the empty loop.
1759 */
1760
1761 static void xl_wait_misr_flags(struct net_device *dev)
1762 {
1763 struct xl_private *xl_priv = netdev_priv(dev);
1764 u8 __iomem * xl_mmio = xl_priv->xl_mmio ;
1765
1766 int i ;
1767
1768 writel(MMIO_BYTE_READ | MISR_RW, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1769 if (readb(xl_mmio + MMIO_MACDATA) != 0) { /* Misr not clear */
1770 for (i=0; i<6; i++) {
1771 writel(MEM_BYTE_READ | 0xDFFE0 | i, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1772 while (readb(xl_mmio + MMIO_MACDATA) != 0) {
1773 ; /* Empty Loop */
1774 }
1775 }
1776 }
1777
1778 writel(MMIO_BYTE_WRITE | MISR_AND, xl_mmio + MMIO_MAC_ACCESS_CMD) ;
1779 writeb(0x80, xl_mmio + MMIO_MACDATA) ;
1780
1781 return ;
1782 }
1783
1784 /*
1785 * Change mtu size, this should work the same as olympic
1786 */
1787
1788 static int xl_change_mtu(struct net_device *dev, int mtu)
1789 {
1790 struct xl_private *xl_priv = netdev_priv(dev);
1791 u16 max_mtu ;
1792
1793 if (xl_priv->xl_ring_speed == 4)
1794 max_mtu = 4500 ;
1795 else
1796 max_mtu = 18000 ;
1797
1798 if (mtu > max_mtu)
1799 return -EINVAL ;
1800 if (mtu < 100)
1801 return -EINVAL ;
1802
1803 dev->mtu = mtu ;
1804 xl_priv->pkt_buf_sz = mtu + TR_HLEN ;
1805
1806 return 0 ;
1807 }
1808
1809 static void __devexit xl_remove_one (struct pci_dev *pdev)
1810 {
1811 struct net_device *dev = pci_get_drvdata(pdev);
1812 struct xl_private *xl_priv=netdev_priv(dev);
1813
1814 release_firmware(xl_priv->fw);
1815 unregister_netdev(dev);
1816 iounmap(xl_priv->xl_mmio) ;
1817 pci_release_regions(pdev) ;
1818 pci_set_drvdata(pdev,NULL) ;
1819 free_netdev(dev);
1820 return ;
1821 }
1822
1823 static struct pci_driver xl_3c359_driver = {
1824 .name = "3c359",
1825 .id_table = xl_pci_tbl,
1826 .probe = xl_probe,
1827 .remove = __devexit_p(xl_remove_one),
1828 };
1829
1830 static int __init xl_pci_init (void)
1831 {
1832 return pci_register_driver(&xl_3c359_driver);
1833 }
1834
1835
1836 static void __exit xl_pci_cleanup (void)
1837 {
1838 pci_unregister_driver (&xl_3c359_driver);
1839 }
1840
1841 module_init(xl_pci_init);
1842 module_exit(xl_pci_cleanup);
1843
1844 MODULE_LICENSE("GPL") ;
Linux with added FPC-III support